Patents by Inventor Min-su Kim

Min-su Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • INTEGRATED CIRCUIT INCLUDING MULTI-HEIGHT STANDARD CELL AND METHOD OF DESIGNING THE SAME
    Publication number: 20200243502
    Abstract: An integrated circuit includes a semiconductor substrate, first through third power rails, and first through fourth clock gate lines. The first power rail through third power rails are formed above the semiconductor substrate, and extend in a first direction and arranged sequentially in a second direction perpendicular to the first direction. The first through fourth clock gate lines are formed above the semiconductor substrate, and extend in the second direction to pass through a first region between the first power rail and the second power rail and a second region between the second power rail and the third power rail. The first clock gate line and the second clock gate line are arranged to be adjacent to each other in the first direction, and the third clock gate line and the fourth clock gate line are arranged to be adjacent to each other in the first direction.
    Type: Application
    Filed: July 25, 2019
    Publication date: July 30, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Min-Su KIM
  • PERSONAL MOBILITY DEVICE
    Publication number: 20200238159
    Abstract: A personal mobility device includes a frame connected to at least one wheel, a connection part on the frame, a boarding part connected to the connection part to be tiltable, a first sensor disposed on the frame to measure an inclination of the frame, and a second sensor disposed on the boarding part to measure an inclination of the boarding part.
    Type: Application
    Filed: April 10, 2020
    Publication date: July 30, 2020
    Inventors: Dong Il CHOI, Min Su KIM
  • Organic light-emitting display device having bank insulating layer
    Patent number: 10714546
    Abstract: An organic light-emitting display device according to an embodiment includes a light-emitting structure. The light-emitting structure includes a lower electrode, an organic light-emitting layer, and an upper electrode, which are stacked one above another in sequence. The organic light-emitting display device further includes a bank insulating layer covering the edge of the lower electrode. The organic light-emitting layer extends onto the bank insulating layer. The organic light-emitting layer includes a side surface being vertically aligned with a side surface of the bank insulating layer.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: July 14, 2020
    Assignee: LG DISPLAY CO., LTD.
    Inventor: Min-Su Kim
  • System, Method, Infrastructure, and Vehicle for Automated Valet Parking
    Publication number: 20200207337
    Abstract: An apparatus for automated valet parking includes a transceiver and a processor. The transceiver is configured to receive vehicle information from a vehicle and transmit a target position and a guide route to the vehicle. The processor is configured to determine a parking policy based on the vehicle information received and parking lot information stored and to determine the target position and the guide route based on the determined parking policy.
    Type: Application
    Filed: December 31, 2019
    Publication date: July 2, 2020
    Inventor: Min Su Kim
  • SEMICONDUCTOR CIRCUIT AND SEMICONDUCTOR CIRCUIT LAYOUT SYSTEM
    Publication number: 20200192997
    Abstract: A semiconductor circuit and a layout system of the semiconductor circuit, the semiconductor circuit including a latch; a feedback inverter that receives an output signal of the latch via a first node and provides a feedback signal to the latch responsive to the output signal of the latch; and an output driver which receives the output signal of the latch via the first node and provides an output signal externally of the semiconductor circuit. The output driver includes an even number of inverters, and the latch, the feedback inverter, and the output driver share a single active region formed without isolation.
    Type: Application
    Filed: August 23, 2019
    Publication date: June 18, 2020
    Inventors: Ah Reum KIM, Min Su KIM, Young O LEE
  • SEMICONDUCTOR CIRCUIT AND SEMICONDUCTOR CIRCUIT LAYOUT SYSTEM
    Publication number: 20200195237
    Abstract: A semiconductor circuit and a semiconductor circuit layout system are provided. The semiconductor circuit includes a clock inverter which inverts a clock signal and outputs an inverted clock signal where the clock inverter is laid out between a second master latch main circuit configured to latch signals of a first node and a fourth node based on the clock signal and the inverted clock signal, respectively, and a second slave latch main circuit configured to latch signals of a second node and a fifth node based on the clock signal and the inverted clock signal, respectively.
    Type: Application
    Filed: August 8, 2019
    Publication date: June 18, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Young O LEE, Doo Seok YOON, Min Su KIM
  • INTEGRATED CIRCUITS AND METHODS OF MANUFACTURING AND DESIGNING THE SAME
    Publication number: 20200185375
    Abstract: Provided is an integrated circuit including a semiconductor substrate, a plurality of gate lines and a plurality of metal lines. The plurality of gate lines are formed in a gate layer above the semiconductor substrate, where the plurality of gate lines are arranged in a first direction and extend in a second direction perpendicular to the second direction. The plurality of metal lines are formed in a conduction layer above the gate layer, where the plurality of metal lines are arranged in the first direction and extend in the second direction. 6N metal lines and 4N gate lines form a unit wiring structure where N is a positive integer and a plurality of unit wiring structures are arranged in the first direction. Design efficiency and performance of the integrated circuit are enhanced through the unit wiring structure.
    Type: Application
    Filed: July 9, 2019
    Publication date: June 11, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Min-su KIM
  • Integrated circuit including asymmetric ending cells and system-on-chip including the same
    Patent number: 10680014
    Abstract: An integrated circuit including first and second macroblocks arranged in a first direction, and a plurality of cells between the first macroblock and the second macroblock, the plurality of cells including at least one first ending cell adjacent to the first macroblock and having a first width in the first direction, at least one second ending cell adjacent to the second macroblock and having a second width different from the first width in the first direction, and at least one standard cell between the at least one first ending cell and the at least one second ending cell may be provided.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: June 9, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-kyu Ryu, Min-su Kim, Dae-seong Lee
  • Non-module type dual regulator assembly
    Patent number: 10662694
    Abstract: A non-module type dual regulator assembly includes a pair of guide rails that are separated from each other and disposed in a door of a vehicle along a direction that a window glass is raised or lowered. A pair of glass holders are coupled to one side of the window glass and movably disposed on the respective guide rails. An upper connection member has a plurality of ends fastened to upper portions of the guide rails. A lower connection member has a plurality of ends fastened to lower portions of the guide rails. A cable is coupled to the glass holders and circulatably disposed along the guide rails to raise or lower the glass holders in the same direction at the same time. A driving motor is disposed on the lower connection member and circulates the cable.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: May 26, 2020
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Seok-Hyun Hong, Min-Su Kim, Sung-Won Hong, Seung-Chul Lee
  • ELECTRONIC DEVICE FOR MANAGING POWER AND METHOD OF CONTROLLING SAME
    Publication number: 20200159306
    Abstract: An electronic device is provided. The electronic device includes a battery, a power management integrated circuit (PMIC), that is electrically connected to the battery, adjusts at least part of power received from the battery, and outputs a controlled power, a processor electrically connected to the PMIC, at least one power sensor that is one of electrically connected between the battery and the PMIC and constitutes a part of the PMIC, and a control circuit electrically connected to the at least one power sensor. The control circuit acquires at least one of a current value and a power value input into the PMIC from the battery, determines whether at least one of the acquired current value and power value is greater than or equal to a threshold, and generates a first signal for controlling at least one of the PMIC and the processor, at least partially based on the determination.
    Type: Application
    Filed: January 24, 2020
    Publication date: May 21, 2020
    Inventors: Yun-Hui HAN, Min-Su KIM, Chul-Woo PARK, Seung-Chul CHOI
  • PULSE SENSING MODULE, BLOOD PRESSURE CALCULATION MODULE, BLOOD PRESSURE MEASURING DEVICE AND METHOD FOR MANUFACTURING PULSE SENSING MODULE
    Publication number: 20200155010
    Abstract: A pulse sensing module used in a blood pressure measuring device attached to the skin to allow at least one of systolic pressure Psystolic, diastolic pressure Pdiastolic, and blood pressure variation to be measured according to an embodiment of the present disclosure includes a piezoelectric layer that includes a piezoelectric material for generating a piezoelectric effect due to a pulse and a protective layer that is applied to the piezoelectric layer to protect the piezoelectric layer, allows a poling process of applying a high voltage to the first electrode line and the second electrode line formed on the piezoelectric layer to improve the polarity of the piezoelectric material, and has an opening for allowing a portion of the first electrode line and a portion of the second electrode line to be exposed.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 21, 2020
    Applicants: ROBOPRINT CO., LTD, KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jung Kyu PARK, Min Su KIM, Keon Jae LEE, Dae Yong PARK
  • Flip-flop and semiconductor system including the same
    Patent number: 10651828
    Abstract: A flip-flop generates a first feedback signal using a signal generated inside the flip-flop. The flip-flop includes a first stage circuit, a second stage circuit and a third stage circuit. The first stage circuit receives a first data signal and a clock signal and generates a first internal signal through a first node. The second stage circuit receives the first internal signal, the clock signal, and the first feedback signal and generates a second internal signal through a second node. The third stage circuit generates a second data signal by latching the second internal signal when the clock signal is at a first level, using the second internal signal and the clock signal. The second stage circuit cuts off at least one first current path between the second node and a power supply, based on the first feedback signal, when the clock signal is at a second level.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: May 12, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Chul Hwang, Ah-Reum Kim, Min-Su Kim
  • SEMICONDUCTOR DEVICE WITHOUT A BREAK REGION
    Publication number: 20200144267
    Abstract: A semiconductor device includes a first active region, a second active region, a first gate line disposed to overlap the first and second active regions, a second gate line disposed to overlap the first and second active regions, a first metal line electrically connecting the first and second gate lines and providing a first signal to both the first and second gate lines, a first contact structure electrically connected to part of the first active region between the first and second gate lines, a second contact structure electrically connected to part of the second active region between the first and second gate lines, and a second metal line electrically connected to the first and second contact structures and transmitting a second signal, wherein an overlapped region that is overlapped by the second metal line does not include a break region.
    Type: Application
    Filed: January 3, 2020
    Publication date: May 7, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dae Seong LEE, Min Su KIM
  • Gate driving circuit and display device including the same
    Patent number: 10629133
    Abstract: Disclosed is a display device including a gate driving circuit. The display device comprises a substrate including a display area and a non-display area, a pixel circuit in the display area, and a pair of scan driving circuits in the non-display area, the pair of scan driving circuits generating output signals inverted therebetween. The pixel circuit includes at least one n-type transistor and at least one p-type transistor, one of the pair of scan driving circuits includes a first transistor and a third transistor each including a gate electrode connected to a first node and a second transistor and a fourth transistor each including a gate electrode connected to a second node, the first transistor and the second transistor are serially connected to each other, and the third transistor and the fourth transistor are serially connected to each other.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: April 21, 2020
    Assignee: LG Display Co., Ltd.
    Inventors: Min Su Kim, Byung Jun Lim
  • Organic light-emitting display device having an encapsulating layer
    Patent number: 10629848
    Abstract: An organic light-emitting display device including an encapsulating layer for coupling an encapsulating substrate to a device substrate in which a light-emitting structure is formed, is provided. The encapsulating layer can include a lower encapsulating layer and an upper encapsulating layer which are sequentially disposed on the light-emitting structure. The lower encapsulating layer can be in direct contact with the light-emitting structure. The upper encapsulating layer can include a moisture-absorbing material. Thus, in the organic light-emitting display device, the permeation of external moisture can be prevented, and the heat dissipation can be improved.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: April 21, 2020
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Young-Hoon Shin, Min-Su Kim
  • Method for designing an integrated circuit, and method of manufacturing the integrated circuit
    Patent number: 10628550
    Abstract: A method of manufacturing an IC includes detecting connectivity between polygons from layout data of the IC and extracting a layout netlist, by performing a DRC on the layout data. The DRC includes loading a rule file including a DRC syntax. The method includes performing LVS verification on the extracted layout netlist and schematic data of the IC to generate LVS result data. The method includes manufacturing the IC according to a layout based on the layout data and the LVS result data.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: April 21, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min-su Kim, Yong-seok Lee, Han-shin Shin
  • Organic light-emitting display device having an organic insulating layer
    Patent number: 10622419
    Abstract: An organic light-emitting display device includes an organic insulating layer such as an over-coat layer, a bank insulating layer and a capping layer. The organic insulating layer extends onto a non-display area of a lower substrate. The organic insulating layer is in contact with an encapsulating layer having a moisture-absorbing material on the non-display area of the lower substrate. Thus, the organic light-emitting display may block a path of permeating the moisture by the organic insulating layer.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: April 14, 2020
    Assignee: LG Display Co., Ltd.
    Inventor: Min-Su Kim
  • Semiconductor device including retention reset flip-flop
    Patent number: 10608615
    Abstract: A semiconductor device may include a master latch that stores an input data signal, using a local power supply voltage and a clock signal, and outputs the input data signal to a first output signal; a slave latch that stores the first output signal, using a global power supply voltage, the clock signal and a retention signal, and outputs a second output signal; a first logic gate that receives input of one signal and another signal of the retention signal, the clock signal and the reset signal, and outputs a first control signal generated by performing a first logical operation; and a second logic gate that receives input of the rest of the retention signal, the clock signal and the reset signal, and the first control signal, and performs a second logical operation to at least one of the master latch and the slave latch.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: March 31, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Woo Kim, Ju Hyun Kang, Min Su Kim, Ka Ram Lee
  • Master-slave flip flop
    Patent number: 10587249
    Abstract: A master-slave flip flop includes a master latch and a slave latch which are sequentially disposed on a substrate in a first direction. The master latch includes a first NMOS transistor and a first PMOS transistor each gated by a first clock signal. The first NMOS transistor and the first PMOS transistor share a first gate line extending in a second direction intersecting with the first direction. The slave latch includes a second NMOS transistor and a second PMOS transistor each gated by the first clock signal. The second NMOS transistor and the second NMOS transistor share a second gate line extending in the second direction. The first gate line and the second gate line are electrically connected to each other.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: March 10, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min Su Kim, Dae Seong Lee
  • Integrated circuit including complex logic cell
    Patent number: 10586809
    Abstract: An integrated circuit includes a complex logic cell. The complex logic cell includes a first logic circuit providing a first output signal from a first input signal group and a common input signal group, and a second logic circuit providing a second output signal from a second input signal group and the common input signal group. The first and second logic circuits respectively include first and second transistors formed from a gate electrode, the gate electrode extending in a first direction and receiving a first common input signal of the common input signal group.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: March 10, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ju-Hyun Kang, Hyun Lee, Min-Su Kim, Ji-Kyum Kim, Jong-Woo Kim