Patents by Inventor Min-Su Park

Min-Su Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170084352
    Abstract: A repair device may be provided. The repair device may include a selection controller configured to control an upper select signal and a lower select signal in correspondence to a fail address and an upper signal and a lower signal which represent a failed region of each mat. The repair device may include a driving controller configured to selectively control a selection control signal in correspondence to the upper select signal and the lower select signal. The repair device may include a bank configured to selectively couple local input/output lines and a sensing circuit of a corresponding mat in correspondence to the selection control signal, and may replace and repair a failed cell of a normal mat with a dummy cell of an upper mat or a lower mat in correspondence to a column select signal.
    Type: Application
    Filed: March 7, 2016
    Publication date: March 23, 2017
    Inventor: Min Su PARK
  • Publication number: 20170068583
    Abstract: A memory device may include a plurality of memory cells; an error detection unit suitable for: latching data read a first time from at least one selected memory cell of the plurality of memory cells in a detection period, comparing data read a second time from the at least one selected memory cell with the latched data, and detecting an error of the at least one selected memory cell in the detection when the date read a second time from the at least one substantially the same with the latched data.
    Type: Application
    Filed: March 10, 2016
    Publication date: March 9, 2017
    Inventors: Min-Su PARK, Jae-Il KIM, Tae-Kyun KIM, Jun-Gi CHOI
  • Publication number: 20170068584
    Abstract: A memory device may include a plurality of memory cells; a refresh counter suitable for generating a refresh address; an address storage circuit suitable for storing an additional refresh address; an error detection unit suitable for detecting an error of selected memory cells of the plurality of memory cells in response to a refresh command in a detection period; and a refresh control unit suitable for refreshing memory cells corresponding to the refresh address or the additional refresh address among the memory cells in response to the refresh command, and controlling the refreshing of the memory cells to be delayed in the detection period.
    Type: Application
    Filed: March 10, 2016
    Publication date: March 9, 2017
    Inventors: Min-Su PARK, Jae-Il KIM
  • Publication number: 20170069398
    Abstract: A memory device may include a plurality of memory cells; and an error detection unit suitable for latching first read data of one or more memory cells selected from the plurality of memory cells after refreshing the selected memory cells, in a first phase, and suitable for detecting errors of the selected memory cells before refreshing the selected memory cells, in a second phase.
    Type: Application
    Filed: March 10, 2016
    Publication date: March 9, 2017
    Inventors: Min-Su PARK, Jae-Il KIM
  • Publication number: 20170032833
    Abstract: A semiconductor system includes a first semiconductor device and a second semiconductor device. The first semiconductor device outputs a command/address signal. The second semiconductor device extracts an active signal, a pre-charge signal, and addresses from the command/address signal, performs an active operation on a memory cell corresponding to the addresses, and performs a refresh operation on the memory cell corresponding to counting signals generated by counting a number of pulses in a refresh signal.
    Type: Application
    Filed: October 28, 2015
    Publication date: February 2, 2017
    Inventor: Min Su PARK
  • Publication number: 20170022850
    Abstract: A continuous variable valve timing apparatus for an engine includes: a housing, a rotor installed to be rotatable relative to the housing and connected to a camshaft, a locking pin configured to restrict rotation of the rotor relative to the housing when pushed by an elastic force to move linearly and pass through a relatively rotating surface between the housing and the rotor, an elastic member installed to provide the elastic force, a valve bolt coupled to the camshaft through the housing and the rotor, wherein the valve bolt includes a release passage through which a release pressure provided through the camshaft is transferred to the locking pin via the rotor, and a valve means for selectively blocking or unblocking the release passage, and an actuator installed to actuate the valve means of the valve bolt according to an actuation displacement.
    Type: Application
    Filed: November 25, 2015
    Publication date: January 26, 2017
    Applicants: Hyundai Motor Company, Kia Motors Corp.
    Inventors: Chung Han Oh, Min Su PARK, Yun Seok KIM
  • Publication number: 20170022852
    Abstract: A Continuous Variable Valve Timing (CVVT) apparatus for an engine may include a housing, a rotor disposed to be rotatable relative to the housing, a locking pin passing through a facing relatively rotating surface between the housing and the rotor by elastic force so as to restrict rotation of the rotor relative to the housing by linear movement, and an oil control valve disposed such that oil is supplied to an advance chamber and a delay chamber provided between the rotor and the housing, in which, when a control duty value applied to the oil control valve is “0”, the oil control valve is fixed in a state in which the oil is supplied to the advance chamber.
    Type: Application
    Filed: December 4, 2015
    Publication date: January 26, 2017
    Applicants: Hyundai Motor Company, Kia Motor Corp.
    Inventors: Chung Han Oh, Min Su Park, Yun Seok Kim
  • Publication number: 20170017258
    Abstract: A clock generation device and a semiconductor device including the same are disclosed, which may tune an internal clock to a desired frequency. The clock generation device may include an oscillator configured to tune an oscillation signal in response to a tuning signal, and adjust a period of an internal clock. The clock generation device may include a counter configured to count the internal clock in response to a count enable signal, and output a count signal. The clock generation device may include a comparator configured to compare the count signal with a test count signal including a target count number of the internal clock, and output the tuning signal.
    Type: Application
    Filed: November 3, 2015
    Publication date: January 19, 2017
    Inventors: Min Su PARK, Jae Il KIM
  • Publication number: 20160376941
    Abstract: A method of controlling a lock pin of a CVVT (continuous variable valve timing) system is provided. The method includes: an oil supply operation of operating a spool of a valve bolt by means of oil drawn into the CVVT system and supplying the oil to the lock pin and a switching valve; a switching-valve opening operation of opening the switching valve by means of pressure of the oil supplied in the oil supply operation; and a lock-pin releasing operation of supplying oil to a chamber when the switching valve opens and releasing the lock pin when there is no difference in oil pressure between an advanced chamber and a retarded chamber.
    Type: Application
    Filed: October 28, 2015
    Publication date: December 29, 2016
    Applicants: KIA MOTORS CORPORATION, HYUNDAI MOTOR COMPANY
    Inventors: Chung Han OH, Min Su PARK, Yun Seok KIM
  • Publication number: 20160376943
    Abstract: A bolt valve includes a body having an oil channel longitudinally formed therein to discharge oil flowing in the oil channel. An oil filtering member is disposed in the body for filtering oil flowing into the oil channel.
    Type: Application
    Filed: November 20, 2015
    Publication date: December 29, 2016
    Applicants: KIA MOTORS CORPORATION, HYUNDAI MOTOR COMPANY
    Inventors: Chung Han OH, Min Su PARK, Yun Seok KIM, Jong Kuk PARK
  • Publication number: 20160376945
    Abstract: The present disclosure provides a CVVT system including: an OCV supplying oil received from a cylinder block into a CVVT; an oil supply unit supplying oil from the OCV to a lock pin; and an actuator selectively opening or closing the oil supply unit such that oil is supplied to the lock pin and the lock pin is separated from a lock pin hole when the oil supply unit is opened.
    Type: Application
    Filed: November 10, 2015
    Publication date: December 29, 2016
    Applicants: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATION
    Inventors: Chung Han OH, Min Su PARK, Yun Seok KIM
  • Patent number: 9530472
    Abstract: A data alignment device includes a buffer configured to buffer a data strobe signal, output a data strobe pulse signal, and buffer inputted data, a latch configured to latch the data in correspondence to the data strobe pulse signal, a first delay configured to delay the data strobe pulse signal and output a delayed signal, a divider configured to divide the delayed signal at a time of activation of a division control signal and generate a plurality of divided signals, a control circuit configured to receive a command signal, a clock, the data strobe signal, and the plurality of divided signals, and control the division control signal for controlling an enable state of the divider, and an alignment circuit configured to align output data in correspondence to the plurality of divided signals.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: December 27, 2016
    Assignee: SK HYNIX INC.
    Inventors: Min Su Park, Hong Gyeom Kim
  • Patent number: 9530756
    Abstract: A semiconductor apparatus may include a first metal layer including a first unit pad. The semiconductor apparatus may include a second metal layer including first and second unit pads. The semiconductor apparatus may include a first through-via coupling the first unit pad of the first metal layer to a first bump; and a second through-via coupling the first unit pad of the second metal layer to a second bump. The second unit pad of the second metal layer may be disposed in a first direction from the first unit pad of the second metal layer, and may be electrically coupled to the first unit pad of the second metal layer.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: December 27, 2016
    Assignee: SK HYNIX INC.
    Inventor: Min Su Park
  • Publication number: 20160364309
    Abstract: An input/output (I/O) line test device and a method for controlling the same are disclosed, which may relate to a technology for testing a base die having no cell using various patterns. The I/O line test device may include an interface controller configured to perform signal transmission/reception between a pad and an input/output line (IOL), and a signal transceiver configured to perform signal transmission/reception between the IOL and a through silicon via (TSV). The I/O line test device may include a latch unit configured to latch output data of the signal transceiver, and a test controller configured to output a control signal for controlling whether the signal transceiver performs a reception operation in response to a write enable signal and a test signal.
    Type: Application
    Filed: October 9, 2015
    Publication date: December 15, 2016
    Inventors: Min Su PARK, Young Jun KU
  • Publication number: 20160343810
    Abstract: Disclosed is a method for manufacturing a semiconductor device, which includes providing a template having a first substrate and a patterned first III-V group compound layer located on the first substrate, forming a sacrificial layer on the patterned first III-V group compound layer by epitaxial growth, forming a second III-V group compound layer on the sacrificial layer by epitaxial growth, bonding a second substrate made of silicon onto the second III-V group compound layer, and separating the second III-V group compound layer and the second substrate from the template by removing the sacrificial layer.
    Type: Application
    Filed: September 15, 2015
    Publication date: November 24, 2016
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Sanghyeon KIM, Daemyeong GEUM, Min Su PARK, Won Jun CHOI
  • Patent number: 9466336
    Abstract: A semiconductor apparatus includes a first output control unit and a second output control unit. The first output control unit includes a plurality of non-inversion pipes and a plurality of inversion pipes. The non-inversion pipes non-invert input signals and output the non-inverted input signals to a signal transmission line as transmission signal, and the inversion pipes invert input signals and output the inverted input signals to the signal transmission line as the transmission signals. The second output control unit includes a plurality of non-inversion pipes and a plurality of inversion pipes. The non-inversion pipes non-invert the transmission signals and output the non-inverted transmission signals, and the inversion pipes invert the transmission signals and output the inverted transmission signals.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: October 11, 2016
    Assignee: SK HYNIX INC.
    Inventors: Min Su Park, Young Jun Ku
  • Publication number: 20160284891
    Abstract: Disclosed herein is a composition for solar cell electrodes. The composition includes silver powder; glass fits; and an organic vehicle, wherein the glass fits have a glass transition temperature of about 100° C. to about 300° C. and exhibit an exothermic peak starting temperature of about 200° C. to about 400° C. on a DTA curve in TG-DTA analysis. Solar cell electrodes formed of the composition have high open circuit voltage and short circuit current density, thereby providing excellent conversion efficiency and fill factor.
    Type: Application
    Filed: September 12, 2014
    Publication date: September 29, 2016
    Applicant: Samsung SDI Co., Ltd.
    Inventors: Seok Hyun JUNG, Dong Suk KIM, Min Su PARK, Young Ki PARK, Koon Ho KIM, Min Jae KIM, Seak Cheol KIM, Yong Je SEO
  • Publication number: 20160223308
    Abstract: Disclosed is a rifle grenade using a bullet trap. A propellent assembly is formed with a first housing configured to house a trapping unit that traps a bullet shot from a gun to travel from rear to front and absorbs kinetic energy of the bullet, and a second housing configured to house a propelling unit that is disposed in front of the first housing, and is activated by the kinetic energy of the bullet which is absorbed into the trapping unit to provide a propelling force in a trajectory direction of the rifle grenade.
    Type: Application
    Filed: December 13, 2013
    Publication date: August 4, 2016
    Applicant: HANWHA CORPORATION
    Inventors: Joon Seong RHEE, Min Su PARK, Soon Suk PARK, Jun Goo SHIN
  • Patent number: 9401229
    Abstract: An inspection apparatus for a penetration pipe of a nuclear reactor head comprising: a body; a probe module installed at the body and having a probe which is inserted in the penetration pipe to inspect damage of the penetration pipe; a fixing module installed along a longitudinal direction of the body and having an expanding cylinder which is inserted in the penetration pipe to support an inner diameter of the penetration pipe; and a rotating module installed in the longitudinal direction of the body and having an expanding cylinder which is inserted in the penetration pipe to support the inner diameter of the penetration pipe.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 26, 2016
    Assignee: KOREA PLANT SERVICE & ENGINEERING CO., LTD
    Inventors: Min Su Park, Hong Seok Ryu, Youn Kyu Kim, Dong il Kim, Bae Jun Kang, Joon Hong Kim, Won Taik Lim, Sak Lee
  • Patent number: 9397039
    Abstract: A semiconductor device includes: a second conductive layer formed over a first conductive layer; and a dummy conductive layer formed between the first and second conductive layers with through-holes formed therein. The first and second conductive layers include signal lines electrically coupled to each other through signal metal contacts passing through the through-holes, and the second conductive layer includes power lines electrically coupled to the dummy conductive layer through power metal contacts.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: July 19, 2016
    Assignee: SK hynix Inc.
    Inventor: Min Su Park