Abstract: A method for fabricating a semiconductor lighting chip includes steps of: providing a substrate; forming a first etching layer on the substrate; forming a connecting layer on the first etching layer; forming a second etching layer on the connecting layer; forming a lighting structure on the second etching layer; and etching the first etching layer, the connecting layer, the second etching layer and the lighting structure, wherein an etching rate of the first etching layer and the second etching layer is lager than that of the connecting layer and the lighting structure, thereby to form the connecting layer and the lighting structure each with an inverted frustum-shaped structure.

Abstract: A method for fabricating a semiconductor lighting chip includes steps of: providing a substrate with a first block layer dividing an upper surface of the substrate into a plurality of epitaxial regions; forming a first semiconductor layer on the epitaxial regions; forming a second block layer partly covering the first semiconductor layer; forming a lighting structure on an uncovered portion of the first semiconductor layer; removing the first and the second block layers thereby defining clearances at the bottom surfaces of the first semiconductor layer and the lighting structure; and permeating etching solution into the first and second clearances to etch the first semiconductor layer and the lighting structure, thereby to form each of the first semiconductor layer and the lighting structure with an inverted frustum-shaped structure.

Abstract: An epitaxial structure of a light emitting diode (LED) includes a substrate, an epitaxial layer, and a light capturing microstructure. The substrate has a top surface. The epitaxial layer is grown on the top surface of the substrate and has a P-type semiconductor layer, an active layer, and an N-type semiconductor layer in sequence. The light capturing microstructure is positioned on an upper portion of the epitaxial layer which is distant from the substrate. A manufacturing method of an epitaxial structure of an LED is also disclosed. The light capturing microstructure includes at least a concave and an insulating material filled in the at least a concave.

Abstract: A method for fabricating an LED chip includes: providing a sapphire substrate with a SiO2 pattern layer formed on the substrate; forming a lighting structure on the sapphire substrate with the SiO2 pattern layer; forming grooves in the lighting structure to divide the lighting structure into a number of light emitting regions, the grooves extending to the sapphire substrate and revealing the SiO2 pattern layer; removing the SiO2 pattern layer and forming spaces between the lighting structure and the substrate; etching part of the light emitting regions, and then forming electrodes on the light emitting regions; and cutting the sapphire substrate along the grooves to obtain a plurality of LED chips.

Abstract: A semiconductor device fabrication method is disclosed. A buffer layer is provided and a first semiconductor layer is formed on the buffer layer. Next, a first intermediate layer is formed on the first semiconductor layer by dopant with high concentration during an epitaxial process. A second semiconductor layer is overlaid on the first intermediate layer. A semiconductor light emitting device is grown on the second semiconductor layer. The formation of the intermediate layer and the second semiconductor layer is a set of steps.

Abstract: A method for fabricating a semiconductor lighting chip includes steps of providing a substrate with an epitaxial layer thereon. The epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer successively grown on the substrate. The epitaxial layer has dislocation defects traversing the first semiconductor layer, the active layer and the second semiconductor layer. The epitaxial layer is then subjected to an etching process which remove parts of the second semiconductor layer and the active layer along the dislocation defects to form recesses recessing from the second semiconductor layer to the active layer. Thereafter a first electrode and a second electrode are formed on the first semiconductor layer and the second semiconductor layer, respectively.

Abstract: A method for manufacturing light emitting chips includes steps of: providing a substrate having a plurality of separate epitaxy islands thereon, wherein the epitaxy islands are spaced from each other by channels; filling the channels with an insulation material; sequentially forming a reflective layer, a transition layer and a base on the insulation material and the epitaxy islands; removing the substrate and the insulation material to expose the channels; and cutting the reflective layer, the transition layer and the base to form a plurality of individual chips along the channels.

Abstract: A method for making a solid state semiconductor device includes: providing a substrate; forming a buffer layer on the substrate; forming a first epitaxial layer on the buffer layer; forming a surface-textured second epitaxial layer on the first epitaxial layer by chemical vapor deposition; and forming a solid state stacked layer structure having a PN-junction type light-emitting part on a textured surface of the second epitaxial layer.

Abstract: A light emitting diode chip includes an electrically conductive substrate, a reflecting layer disposed on the substrate, a semiconductor structure formed on the reflecting layer, an electrode disposed on the semiconductor structure, and a plurality of slots extending through the semiconductor structure. The semiconductor structure includes a P-type semiconductor layer formed on the reflecting layer, a light-emitting layer formed on the P-type semiconductor layer, and an N-type semiconductor layer formed on the light-emitting layer. A current diffusing region is defined in the semiconductor structure and around the electrode. The slots are located outside the current diffusing region.

Abstract: A semiconductor light-emitting structure includes a silicon substrate, a distributed Bragg reflector, a semiconductor structures layer and an epitaxy connecting layer. The silicon substrate has a top surface. The distributed Bragg reflector is formed on the top surface of the silicon substrate. The semiconductor structures layer is configured for emitting light. The epitaxy connecting layer is placed between the distributed Bragg reflector and the semiconductor structures layer. Grooves extend from the semiconductor structures layer through the epitaxy connecting layer and the distributed Bragg reflector to reach the semiconductor structures layer.

Abstract: A structure of semiconductor device includes a first semiconductor layer; an intermediate layer on a surface of said first semiconductor layer; a second semiconductor layer on said intermediate layer, wherein said intermediate layer and said second semiconductor layer are integrated to a set of sub-structures; and a semiconductor light emitting device on said second semiconductor layer.

Abstract: A method for separating a semiconductor from a substrate is disclosed. The method comprises the following steps: forming a plurality of columns on a substrate; epitaxially growing a semiconductor on the plurality of columns; and injecting etching liquid into the void among the plurality of columns so as to separate the semiconductor from the substrate. The method of this invention can enhance the etching efficiency of separating the semiconductor from the substrate and reduce the fabrication cost because the etching area is increased due to the void among the plurality of columns. In addition, the method will not confine the material of the above-mentioned substrate.

Abstract: An epitaxy substrate for growing a plurality of semiconductor epitaxial layers thereon, includes a plurality of growth areas and a plurality of protected areas. The growth areas are provided for growing the semiconductor epitaxial layers thereon. The growth areas and the protected areas are alternating. A thickness of the growth areas is less than ? of a thickness H of the protected areas.

Abstract: A light emitting diode comprises a substrate, a buffer layer, a semiconductor layer and a semiconductor light emitting layer. The buffer layer is disposed on the substrate. The semiconductor layer is disposed on the buffer layer. The semiconductor light emitting layer is disposed on the semiconductor layer. A plurality of voids is defined within the semiconductor layer. Each void encloses air therein. A method for manufacturing the light emitting diode is also provided. Light generated by the semiconductor light emitting layer toward the substrate is reflected by the voids to emit out of the light emitting diode.

Abstract: A gallium nitride-based semiconductor device includes a composite substrate and a gallium nitride layer. The composite substrate includes a silicon substrate and a filler. The silicon substrate includes a first surface and a second surface opposite to the first surface, and the first surface defines a number of grooves therein. The filler is filled into the number of grooves on the first surface of the silicon substrate. A thermal expansion coefficient of the filler is bigger than that of the silicon substrate. The gallium nitride layer is formed on the second surface of the silicon substrate.

Abstract: A method of fabricating a photoelectric device of Group III nitride semiconductor, where the method comprises the steps of: forming a first Group III nitride semiconductor layer on a surface of a temporary substrate; patterning the first Group III nitride semiconductor layer using photolithography and etching processes; forming a second Group III nitride semiconductor layer on the patterned first Group III nitride semiconductor layer; forming a conductive layer on the second Group III nitride semiconductor layer; and releasing the temporary substrate by removing the first Group III nitride semiconductor layer to obtain a composite of the second Group III nitride semiconductor layer and the conductive layer.

Abstract: A semiconductor structure includes a Si substrate, a supporting layer and a blocking layer formed on the substrate and an epitaxy layer formed on the supporting layer. The supporting layer defines a plurality of grooves therein to receive the blocking layer. The epitaxy layer is grown from the supporting layer. A plurality of slots is defined in the epitaxy layer and over the blocking layer. The epitaxy layer includes an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer. A method for manufacturing the semiconductor structure is also disclosed.

Abstract: A light emitting element package includes a substrate, at least two light emitting element modules and an encapsulation member. The substrate includes a circuit layer. The circuit layer includes a plurality of solder pads. The at least two light emitting element modules are mounted on the substrate. Each of the at least two light emitting element modules includes a plurality of light emitting elements. Each light emitting element of the at least two light emitting element modules is electrically coupled to neighboring light emitting element in serial through the solder pads. The at least two light emitting element modules are reversely arranged. The encapsulation member is configured to encapsulate the at least two light emitting element modules on the substrate.

Abstract: A light emitting diode includes a substrate, a buffer layer on the substrate, a patterned layer having a first reflective index on the buffer layer, a semiconductor layer having a second reflective index on the patterned layer, and an illumination structure on the semiconductor layer. A method for manufacturing the light emitting diode is also provided.

Abstract: A light emitting element includes a substrate, a GaN layer formed on the substrate, a first low refractive index semiconductor layer formed on the GaN layer, and a lighting structure having a high refractive index formed on the first low refractive index semiconductor layer. A second low refractive index semiconductor layer is embedded in the first low refractive index semiconductor layer. The first low refractive index semiconductor layer and the GaN layer exhibit a lattice mismatch therebetween.