Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

Abstract: A vehicle power supply system includes a high-voltage battery pack that has a battery housing and a battery cell provided in the battery housing. A PRA is electrically connected to the battery cell. A first battery connector is provided at one side of the battery housing, a connecting member electrically connects the power relay assembly and the first battery connector, and a second battery connector is electrically connected to the power relay assembly and provided at the other side of the battery housing. A first junction box is electrically connected to a first power electronic module of a vehicle and has a first junction box connector. A first battery connecting cable electrically connects the first junction box connector and the first battery connector. A second battery connecting cable electrically connects the second battery connector and a second power electronic module of the vehicle.

Abstract: A cylindrical battery cell assembly which includes a plurality of cylindrical battery cells arranged so that the cylindrical battery cells having the same polarity face in the same direction, a cell holder configured to confine the cylindrical battery cells as a bundle unit, a first electrode connection member located at an upper portion of the cell holder and a second electrode connection member located at the bottom ends of the cylindrical battery cells. The second electrode connection member includes a second connection portion located at a lower portion of the cell holder and disposed to contact the second electrode terminals. A rod-shaped second terminal portion extends vertically from the second connection portion through an empty space formed inside the cell holder so that one end of the rod-shaped second terminal portion is disposed above the cell holder.

Abstract: A bus bar capable of effectively securing safety of a battery module when an overcurrent is generated includes: a main body portion that includes a first metal, has a stepped structure, in which an outer surface of the main body portion in an outward direction of the battery module is recessed in an inward direction, formed in one region, and is configured to be electrically connected to at least one secondary battery; a current breaking portion that is inserted into a space formed by the stepped structure and includes a second metal having a melting point relatively lower than a melting point of the first metal; and a covering member configured to surround at least a part of an outer surface of the current breaking portion. A battery module including the bus bar is also provided.

Abstract: A semiconductor device and a method for fabricating the same, the device including an active pattern extending in a first direction on a substrate; a field insulating film surrounding a part of the active pattern; a first gate structure extending in a second direction on the active pattern and the field insulating film, a second gate structure spaced apart from the first gate structure and extending in the second direction on the active pattern and the field insulating film; and a first device isolation film between the first and second gate structure, wherein a side wall of the first gate structure facing the first device isolation film includes an inclined surface having an acute angle with respect to an upper surface of the active pattern, and a lowermost surface of the first device isolation film is lower than or substantially coplanar with an uppermost surface of the field insulating film.

Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

Abstract: Provided is a graphene quantum dot as a therapeutic agent for diseases associated with abnormal fibrillation or aggregation of neuroproteins. The graphene quantum dot according to the presently claimed subject matter suppresses ?-syn fibrillation or disaggregates already formed ?-syn fibrils, and shows the working effect of passing through the blood brain barrier (BBB). Therefore, the graphene quantum dot according to the presently claimed subject matter can be advantageously used as a therapeutic agent for diseases associated with abnormal fibrillation and aggregation of neuroproteins, such as neurodegenerative diseases, inflammatory diseases, and metabolic diseases.

Abstract: A battery module reduces the risk of secondary ignition or explosion and increases durability against external impacts. The battery module includes a plurality of secondary batteries respectively having a gas venting portion for discharging a gas generated therein to the outside at a predetermined pressure and arranged in a front and rear direction in two rows; and a cooling member including a body portion interposed between two rows of the plurality of secondary batteries and having a size corresponding to left and right sides of the plurality of secondary batteries, and a gas discharge portion provided to at least one of an upper portion and a lower portion of the body portion and having a gas discharge passage elongated from a front end to a rear end of the body portion.

Abstract: A semiconductor device may include active fins each of which extends in a first direction on a substrate, the active fins being spaced apart from each other in a second direction different from the first direction, a conductive structure extending in the second direction on the substrate, the conductive structure contacting the active fins, a first diffusion break pattern between the substrate and the conductive structure, the first diffusion break pattern dividing a first active fin of the active fins into a plurality of pieces aligned in the first direction, and a second diffusion break pattern adjacent to the conductive structure on the substrate, the second diffusion break pattern having an upper surface higher than a lower surface of the conductive structure, and dividing a second active fin of the active fins into a plurality of pieces aligned in the first direction.

Abstract: A syntactic analysis apparatus according to an embodiment of the present disclosure may include an input device receiving a phrase uttered from a user, and a learning device performing at least one or more of extension of an intent output layer for classifying an utterance intent of the user from the uttered phrase and extension of a slot output layer for classifying a slot including information of the phrase and extending a pre-generated utterance syntactic analysis model, such that the uttered phrase is classified into the extended intent output layer and the extended slot output layer, thereby broadly classifying an intent and a slot for the phrase uttered from a user.

Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.

Abstract: A semiconductor device and a method for fabricating the same, the device including an active pattern extending in a first direction on a substrate; a field insulating film surrounding a part of the active pattern; a first gate structure extending in a second direction on the active pattern and the field insulating film, a second gate structure spaced apart from the first gate structure and extending in the second direction on the active pattern and the field insulating film; and a first device isolation film between the first and second gate structure, wherein a side wall of the first gate structure facing the first device isolation film includes an inclined surface having an acute angle with respect to an upper surface of the active pattern, and a lowermost surface of the first device isolation film is lower than or substantially coplanar with an uppermost surface of the field insulating film.

Abstract: A dishwasher according to the present invention includes a tub having a double wall structure so that consumption of energy is reduced using water or air stored in an inner space of the double wall structure of the tub in a washing process and consumption of water is reduced using the water stored in the inner space of the double wall structure in a next washing process.

Abstract: Semiconductor devices and methods of forming the same are provided. Semiconductor devices may include a substrate including first and second regions, first active fins extending in a first direction on the first region, second active fins extending parallel to the first active fins on the second region, and single diffusion break regions between two first active fins. Single diffusion break regions may be spaced apart from each other in the first direction. The semiconductor devices may also include a lower diffusion break region between two second active fins and extending in a second direction that is different from the first direction and upper diffusion break regions on the lower diffusion break region. The upper diffusion break regions may be spaced apart from each other in the first direction, and each of the upper diffusion break regions may overlap the lower diffusion break region.

Abstract: A projectile is provided, including an arrowhead body formed of a predetermined length and coupled to a tip of an arrow shaft, and at least two blades protruding at equal intervals from an outer circumferential surface of the arrowhead body, and shaped to be curved to a predetermined direction to result in a rotation by air during a flight of an arrow, in which one or more ogives for reducing air resistance are formed on outer ends of the blades. Accordingly, the projectile is provided, which can significantly reduce the air resistance during flight compared to the related arrowheads, and since rotation can be induced in itself by the air encountered during the flight, the rotational force and the straightness of the projectile are greatly enhanced, and as a result, it is possible to improve the accuracy of hitting on targets, and increase the destructive power against the target when hitting the target.

Abstract: A computer-implemented system for verifying contents of a package and displaying packaging instructions is disclosed. The system may include a user interface configured for: retrieving a first order information from a first database; displaying one or more product identifiers included in the first order information; receiving a set of second unknown identifiers; displaying one or more product photos from a second database corresponding to a set of product identifiers that matches the set of second unknown identifiers; displaying packaging instructions for packaging the one or more products into a first package; receiving a third unknown identifier; matching the third unknown identifier to a first package identifier of the first order information; receiving a fourth unknown identifier; matching the fourth unknown identifier to the first order information; and transmitting a signal to the first database to update a first status information of the first order information.

Abstract: A substrate supporting plate that may prevent deposition on a rear surface of a substrate and may easily unload the substrate. The substrate supporting plate may include a substrate mounting portion and a peripheral portion surrounding the substrate mounting portion. An edge portion of a top surface of the substrate mounting portion may be anodized. A central portion of the top surface of the substrate mounting portion may not be anodized.

Abstract: A battery cell includes an electrode assembly, a pair of electrode leads electrically connected to the electrode assembly, a battery case configured to accommodate the pair of electrode leads such that the pair of electrode leads protrude at least partially in a front and rear direction of the battery cell, the battery case having an accommodation space formed to accommodate the electrode assembly, and a taping unit configured to integrally cover both side surfaces and upper and lower surfaces of the battery case.

Abstract: A battery pack includes a battery cell and a bus bar electrically connected to the battery cell, wherein the bus bar includes a rupture portion configured to melt due to electric resistance heat generated by overcurrent and thus to rupture, the rupture portion having a plurality of through-holes therein.

Abstract: Provided are semiconductor devices having various line widths and a method of manufacturing the semiconductor device. The semiconductor device includes: a substrate including a first region and a second region, a plurality of first gate lines extending in a first direction in the first region and each having a first width in a second; a plurality of second gate lines extending in the first direction in the second region and each having a second width that is different from the first width in the second direction and a pitch that is the same as a pitch of the plurality of first gate lines; a spacer layer covering opposite side walls of each of the plurality of first gate lines and each of the plurality of second gate lines; and a first base layer arranged between the substrate and the spacer layer in the first region.