Patents by Inventor Min Yoo

Min Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210035988
    Abstract: Provided is a substrate processing method that may prevent the non-uniformity of the thickness of landing pads deposited on each step in a vertical NAND device having a stepped structure. The substrate processing method includes stacking, a plurality of times, a stack structure including an insulating layer and a sacrificial layer and etching the stack structure to form a stepped structure having an upper surface, a lower surface, and a side surface connecting the upper surface and the lower surface.
    Type: Application
    Filed: October 16, 2020
    Publication date: February 4, 2021
    Inventors: Tae Hee Yoo, Yoon Ki Min, Yong Min Yoo
  • Patent number: 10910376
    Abstract: Semiconductor devices and methods of forming the same are provided. Semiconductor devices may include a substrate including first and second regions, first active fins extending in a first direction on the first region, second active fins extending parallel to the first active fins on the second region, and single diffusion break regions between two first active fins. Single diffusion break regions may be spaced apart from each other in the first direction. The semiconductor devices may also include a lower diffusion break region between two second active fins and extending in a second direction that is different from the first direction and upper diffusion break regions on the lower diffusion break region. The upper diffusion break regions may be spaced apart from each other in the first direction, and each of the upper diffusion break regions may overlap the lower diffusion break region.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: February 2, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun Mo Park, Ju Youn Kim, Hyung Joo Na, Sang Min Yoo, Eui Chul Hwang
  • Patent number: 10902846
    Abstract: A spoken language understanding apparatus according to embodiments of the present disclosure may include: a slot tagging module including: a morpheme analysis unit configured to analyze morphemes with respect to an uttered sentence, a slot tagging unit configured to tag slots corresponding to a semantic entity from a plurality of input tokens generated according to the analyzed morphemes, and a slot name conversion unit configured to convert phrases corresponding to the tagged slots into delexicalized slot names based on neighboring contextual information; and a language generation module configured to generate a combined sequence by combining the delexicalized slot names based on the plurality of input tokens.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: January 26, 2021
    Assignees: Hyundai Motor Company, Kia Motors Corporation, HYUNDAI MNSOFT, INC., SNU R&DB FOUNDATION
    Inventors: Bi Ho Kim, Sung Soo Park, Sang Goo Lee, You Hyun Shin, Kang Min Yoo, Sang Hoon Lee, Myoung Ki Sung
  • Patent number: 10888842
    Abstract: The present invention relates to a method for manufacturing a catalyst for synthesizing a fatty acid methyl or ethyl ester and a method for manufacturing a fatty acid methyl or ethyl ester using the catalyst. It provides a method for manufacturing a solid catalyst by mixing the oxides of manganese as active catalytic material and the soda lime glass as carrier wherein the content of the oxides of manganese is in the range of 0.1 w % to 70 w %, molding the mixture to spherical or cylindrical shape and sintering the molded catalyst. It also provides a method for manufacturing fatty acid methyl or ethyl ester with high purity by reacting fatty acid or a mixture of oil and fatty acid with methanol or ethanol by placing the solid catalyst in the reactor.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: January 12, 2021
    Inventor: Seong Min Yoo
  • Publication number: 20210005603
    Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.
    Type: Application
    Filed: September 18, 2020
    Publication date: January 7, 2021
    Inventors: Sang Min YOO, Ju Youn KIM, Hyung Joo NA, Bong Seok SUH, Joo Ho JUNG, Eui Chul HWANG, Sung Moon LEE
  • Patent number: 10876218
    Abstract: A substrate supporting plate that may prevent deposition on a rear surface of a substrate and may easily unload the substrate. The substrate supporting plate may include a substrate mounting portion and a peripheral portion surrounding the substrate mounting portion. An edge portion of a top surface of the substrate mounting portion may be anodized. A central portion of the top surface of the substrate mounting portion may not be anodized.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: December 29, 2020
    Assignee: ASM IP HOLDING B.V.
    Inventors: Yong Min Yoo, Jong Won Shon, Seung Woo Choi, Dong Seok Kang
  • Publication number: 20200395587
    Abstract: A cylindrical battery cell including a first electrode terminal and a second electrode terminal having different polarities: an electrode assembly in which a positive electrode, a negative electrode and a separator interposed between the positive electrode and the negative electrode are wound; a battery case configured to include the electrode assembly therein in a state of being impregnated with an electrolytic solution; a cap assembly mounted to a top end of the battery case; and a connection cap including a cap housing loaded on the battery case and the cap assembly and having an insulating material, and a first connection plate and a second connection plate placed on the cap housing and electrically connected to the first electrode terminal and the second electrode terminal, respectively.
    Type: Application
    Filed: October 2, 2018
    Publication date: December 17, 2020
    Applicant: LG CHEM, LTD.
    Inventors: Jae-Uk RYU, Dal-Mo KANG, Su-Chang KIM, Jeong-O MUN, Jae-Min YOO, Ji-Su YOON
  • Publication number: 20200385859
    Abstract: Methods of depositing a silicon oxide film are disclosed. One embodiment is a plasma enhanced atomic layer deposition (PEALD) process that includes supplying a vapor phase silicon precursor, such as a diaminosilane compound, to a substrate, and supplying oxygen plasma to the substrate. Another embodiment is a pulsed hybrid method between atomic layer deposition (ALD) and chemical vapor deposition (CVD). In the other embodiment, a vapor phase silicon precursor, such as a diaminosilane compound, is supplied to a substrate while ozone gas is continuously or discontinuously supplied to the substrate.
    Type: Application
    Filed: March 18, 2020
    Publication date: December 10, 2020
    Inventors: Tae Ho Yoon, Hyung Sang Park, Yong Min Yoo
  • Publication number: 20200388805
    Abstract: A battery module having excellent cooling efficiency and allowing easy recycling of inner components at disposal applies a heat-shrinkable tube serving as a module housing and a heatsink to the battery module. The battery module includes a cell assembly including a plurality of pouch-type secondary batteries having electrode leads formed to protrude in a front and rear direction and stacked on each other in a left and right direction; a heatsink located to contact an outer surface of the cell assembly and having a coolant flow path for allowing a coolant to move therein; and a heat-shrinkable tube having a tubular shape with a hollow structure in which the cell assembly and the heatsink are located, the heat-shrinkable tube being thermally shrunken so that the cell assembly and the heatsink are in contact with each other.
    Type: Application
    Filed: August 26, 2019
    Publication date: December 10, 2020
    Applicant: LG Chem, Ltd.
    Inventors: Jae-Min Yoo, Eun-Gyu Shin, Jeong-O Mun, Yoon-Koo Lee
  • Publication number: 20200381684
    Abstract: A battery module which includes a battery cell stack in which a plurality of battery cells are stacked; and a housing configured to accommodate the battery cell stack, wherein a disassembling guide for disassembling the housing is formed at the housing.
    Type: Application
    Filed: February 20, 2019
    Publication date: December 3, 2020
    Applicant: LG CHEM, LTD.
    Inventors: Hee-Jun JIN, Eun-Gyu SHIN, Jae-Min YOO, Jeong-O MUN, Ho-June CHI
  • Patent number: 10847529
    Abstract: Provided is a substrate processing method that may prevent the non-uniformity of the thickness of landing pads deposited on each step in the process of selectively depositing a landing pad in a vertical NAND device having a stepped structure. The substrate processing method includes stacking, a plurality of times, a stack structure including an insulating layer and a sacrificial layer and etching the stack structure to form a stepped structure having an upper surface, a lower surface, and a side surface connecting the upper surface and the lower surface. The method also includes forming a barrier layer on the stepped structure, forming a mask layer on the barrier layer and exposing at least a portion of the barrier layer by etching at least a portion of the mask layer with a first etching solution The method further includes etching the exposed barrier layer with a second etching solution and etching the mask layer with a third etching solution.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: November 24, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Tae Hee Yoo, Yoon Ki Min, Yong Min Yoo
  • Patent number: 10847514
    Abstract: A semiconductor device includes a substrate with a NMOS region and a PMOS region, a device isolation layer on the substrate to define active fins, and gate patterns on the substrate to have a length direction crossing the active fins, wherein the device isolation layer includes diffusion brake regions between respective pairs of the active fins, the diffusion brake regions being disposed adjacent to each other in a width direction of the gate patterns, and wherein a width of the diffusion brake region in the NMOS region is different from a width of the diffusion brake region in the PMOS region.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: November 24, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je-Min Yoo, Sangyoon Kim, Woosik Kim, Jongmil Youn, Hwasung Rhee, Heedon Jeong
  • Publication number: 20200350610
    Abstract: A method for assembling a secondary battery cell module by using an assembling jig including a plurality of guide rods disposed on a jig plate includes: mounting a lower frame on the jig plate while the guide rods are inserted into a plurality of arranging through-holes of the lower frame; disposing a plurality of battery cells on the lower frame; mounting an upper frame on the battery cells while the guide rods are inserted into a plurality of arranging through-holes of the upper frame; fastening the upper frame and the lower frame together; and separating the assembling jig from the upper frame and the lower frame.
    Type: Application
    Filed: October 17, 2018
    Publication date: November 5, 2020
    Applicant: LG Chem, Ltd.
    Inventors: Jae Min Yoo, Dal Mo Kang, Jeong Oh Moon, Jaeuk Ryu, Su Chang Kim, Ji Su Yoon
  • Publication number: 20200343499
    Abstract: A battery module includes a heat-shrinkable tube serving as a module housing. The battery module includes a cell assembly having a plurality of pouch-type secondary batteries; a bus bar assembly having a bus bar frame and a bus bar mounted to an outer surface of the bus bar frame; and a heat-shrinkable tube formed to be shrunk by heat and configured so that the cell assembly is located therein, the heat-shrinkable tube being provided to surround a side surface of the cell assembly and a portion of the bus bar assembly.
    Type: Application
    Filed: July 3, 2019
    Publication date: October 29, 2020
    Applicant: LG Chem, Ltd.
    Inventors: Jae-Min Yoo, Eun-Gyu Shin, Hee-Jun Jin, Dal-Mo Kang, Jeong-O Mun
  • Patent number: 10804265
    Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: October 13, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang Min Yoo, Ju Youn Kim, Hyung Joo Na, Bong Seok Suh, Joo Ho Jung, Eui Chul Hwang, Sung Moon Lee
  • Publication number: 20200312720
    Abstract: Provided are semiconductor devices having various line widths and a method of manufacturing the semiconductor device. The semiconductor device includes: a substrate including a first region and a second region, a plurality of first gate lines extending in a first direction in the first region and each having a first width in a second; a plurality of second gate lines extending in the first direction in the second region and each having a second width that is different from the first width in the second direction and a pitch that is the same as a pitch of the plurality of first gate lines; a spacer layer covering opposite side walls of each of the plurality of first gate lines and each of the plurality of second gate lines; and a first base layer arranged between the substrate and the spacer layer in the first region.
    Type: Application
    Filed: June 15, 2020
    Publication date: October 1, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Je-min YOO, Sang-deok KWON, Yuri MASUOKA
  • Patent number: 10772910
    Abstract: The present disclosure relates to a pharmaceutical composition for preventing or treating neurodegenerative diseases, the pharmaceutical composition including a graphene nanostructure as an active ingredient.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: September 15, 2020
    Assignees: Seoul National University R&DB Foundation, The Johns Hopkins University
    Inventors: Byung Hee Hong, Je Min Yoo, Hanseok Ko, Donghoon Kim
  • Patent number: 10770355
    Abstract: Provided are semiconductor devices having various line widths and a method of manufacturing the semiconductor device. The semiconductor device includes: a substrate including a first region and a second region, a plurality of first gate lines extending in a first direction in the first region and each having a first width in a second; a plurality of second gate lines extending in the first direction in the second region and each having a second width that is different from the first width in the second direction and a pitch that is the same as a pitch of the plurality of first gate lines; a spacer layer covering opposite side walls of each of the plurality of first gate lines and each of the plurality of second gate lines; and a first base layer arranged between the substrate and the spacer layer in the first region.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: September 8, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-min Yoo, Sang-deok Kwon, Yuri Masuoka
  • Publication number: 20200238257
    Abstract: The present invention relates to a method for manufacturing a catalyst for synthesizing a fatty acid methyl or ethyl ester and a method for manufacturing a fatty acid methyl or ethyl ester using the catalyst. It provides a method for manufacturing a solid catalyst by mixing the oxides of manganese as active catalytic material and the soda lime glass as carrier wherein the content of the oxides of manganese is in the range of 0.1 w % to 70 w %, molding the mixture to spherical or cylindrical shape and sintering the molded catalyst. It also provides a method for manufacturing fatty acid methyl or ethyl ester with high purity by reacting fatty acid or a mixture of oil and fatty acid with methanol or ethanol by placing the solid catalyst in the reactor.
    Type: Application
    Filed: June 1, 2017
    Publication date: July 30, 2020
    Inventor: Seong Min YOO
  • Publication number: 20200238050
    Abstract: Provided is an apparatus for injecting a lipolysis composition, the apparatus including a lipolysis composition storage, a pump, and at least one nozzle-type needle.
    Type: Application
    Filed: May 16, 2019
    Publication date: July 30, 2020
    Inventor: Seung Min YOO