Abstract: According to an embodiment of the present invention, a chip package is provided. The chip package includes: a patterned conducting plate having a plurality of conducting sections electrically separated from each other; a plurality of conducting pads disposed on an upper surface of the patterned conducting plate; a chip disposed on the conducting pads; a plurality of conducting bumps disposed on a lower surface of the patterned conducting plate, wherein each of the conducting bumps is electrically connected to a corresponding one of the conducting sections of the patterned conducting plate; and an insulating support layer partially surrounding the conducting bumps.

Abstract: Described herein are techniques pertaining to real-time propagation of an arbitrary audio signal in a fixed virtual environment with dynamic audio sources and receivers. A wave-based numerical simulator is configured to compute response signals in the virtual environment with respect to a sample signal at various source and receiver locations. The response signals are compressed and placed in the frequency domain to generate frequency responses. Such frequency responses are selectively convolved with the arbitrary audio signal to allow real-time propagation with moving sources and receivers in the virtual environment.

Abstract: According to an embodiment of the present invention, a method for forming a chip package is provided. The method includes: providing a conducting plate, wherein a plurality of conducting pads are disposed on an upper surface of the conducting plate; forming a plurality of conducting bumps on a lower surface of the conducting plate; patterning the conducting plate by removing a portion of the conducting plate, wherein the patterned conducting plate has a plurality of conducting sections electrically insulated from each other, and each of the conducting bumps is electrically connected to a corresponding one of the conducting sections of the patterned conducting plate; forming an insulating support layer to partially surround the conducting bumps; and disposing a chip on the conducting pads.

Abstract: A solar cell testing system includes a multifunctional testing light source, a measuring unit, and an arithmetic unit. The multifunctional testing light source is configured to be switched to output a simulated solar light to a solar cell or asynchronously output a plurality of narrowband lights to the solar cell. The measuring unit is coupled to the solar cell and measures the solar cell's response to the simulated solar light and response to the asynchronously outputted narrowband lights. The arithmetic unit is coupled to the multifunctional testing light source and the measuring unit; it determines the solar cell's conversion efficiency and spectral response based on the solar cell's response to the simulated solar light and response to the asynchronously outputted narrowband lights.

Abstract: The present invention provides a power bank comprising a battery protection board, controller board, and a host connector. The host connector is compatible with an accessory connector on a fast charger board, and the host connector is connected to the accessory connector for boosting the charging rate of the power bank. The fast charger board connected to the power bank may, for powering laptops and electric bicycles, elevate the output voltage of the power bank to 12V or above. The power bank may further connect with other external components, such as an LED module and a wireless transceiver module, in order to extend the functionality of the power bank.

Abstract: The present invention relates to a portable power bank comprising a battery pack, a first control module and a second control module, wherein the battery pack further comprises at least two cells connected in series, and wherein the first control module and the second control module both electrically connected to a first terminal and a second terminal of the battery pack; the first controller is configured for regulating the DC input voltage for charging the battery pack and the second controller is configured for regulating the DC output voltage for charging an external device.

Abstract: One of the advantages of direct frequency synthesis technique (e.g., flying-adder architecture) is its capability of generating arbitrary frequency by utilizing the time-average-frequency concept. In the clock output of the direct frequency synthesizer, instead of one type of cycle, there are two types of cycles. Unlike the conventional one-type-cycle clock wherein clock energy is concentrated at its designed frequency, Time-Average-Frequency based clock spreads some of its energy into spurious tones, which could be harmful to certain applications. The spurious tones are caused by the periodic carry sequence generated from a fractional part accumulator inside the frequency synthesizer. The invention suggests a method and an apparatus to break this periodicity and convert the spurious tones into broadband noise.

Abstract: A contact image sensing device includes a housing, a light emitting unit, a red lens array, a sensing unit, and a protecting component. The housing includes a top surface, a bottom surface, an accommodating groove, and a slot. The bottom surface is opposite to the top surface. The accommodating groove is formed on the top surface and concave toward to bottom surface. The slot penetrates the top surface and the bottom surface. The light-emitting unit is arrange within the accommodating groove. The rod lens array is arranged within the slot. The sensing unit is arranged below the housing. The protecting component includes a main body, a recess, and a lighting slot communicating with the recess, a top end of the rod lens array is assembled with the recess. The main body of the protecting member forms at least one containing recess. A combining component for combining the rod lens array and the protecting member is disposed within the containing recess.

Abstract: According to an embodiment of the present invention, a method for forming a chip package is provided. The method includes: providing a conducting plate, wherein a plurality of conducting pads are disposed on an upper surface of the conducting plate; forming a plurality of conducting bumps on a lower surface of the conducting plate; patterning the conducting plate by removing a portion of the conducting plate, wherein the patterned conducting plate has a plurality of conducting sections electrically insulated from each other, and each of the conducting bumps is electrically connected to a corresponding one of the conducting sections of the patterned conducting plate; forming an insulating support layer to partially surround the conducting bumps; and disposing a chip on the conducting pads.

Abstract: A power socket is to be electrically connected to an internal terminal of an electronic device and to be electrically and separably connected to a plug. The plug has a tubular interior surface and an exterior surface. The power socket includes a body, a central terminal, a first conductor, and a second conductor. The body includes a surrounding wall that has an inner surface defining an accommodating space. The central terminal is disposed in the accommodating space, and is electrically connected to the internal terminal. The first conductor is disposed on the inner surface and has a first elastic portion. The second conductor is electrically connected to the central terminal, and has a second elastic portion.

Abstract: A contact image sensing device includes a housing, a light emitting unit, a red lens array, a sensing unit, and a protecting component. The housing includes a top surface, a bottom surface, an accommodating groove, and a slot. The bottom surface is opposite to the top surface. The accommodating groove is formed on the top surface and concave toward to bottom surface. The slot penetrates the top surface and the bottom surface. The light-emitting unit is arrange within the accommodating groove. The rod lens array is arranged within the slot. The sensing unit is arranged below the housing. The protecting component includes a main body, a recess, and a lighting slot communicating with the recess, a top end of the rod lens array is assembled with the recess.

Abstract: According to an embodiment of the present invention, a chip package is provided. The chip package includes: a patterned conducting plate having a plurality of conducting sections electrically separated from each other; a plurality of conducting pads disposed on an upper surface of the patterned conducting plate; a chip disposed on the conducting pads; a plurality of conducting bumps disposed on a lower surface of the patterned conducting plate, wherein each of the conducting bumps is electrically connected to a corresponding one of the conducting sections of the patterned conducting plate; and an insulating support layer partially surrounding the conducting bumps.

Abstract: A wide range of temperature control equipment for controlling a tested object to a predetermined temperature is provided. The wide range of temperature control equipment includes a thermal conducting plate, a temperature regulating module, a carrier plate, and a thermoelectric cooling module. The temperature regulating module is thermally connected to the thermal conducting plate for regulating the thermal conducting plate to a reference temperature. The carrier plate is used to accommodate the tested object. The thermoelectric cooling module is thermally connected between the thermal conducting plate and the carrier plate for controlling the tested object to the predetermined temperature via the carrier plate based on the reference temperature.

Abstract: A solar cell testing system includes a multifunctional testing light source, a measuring unit, and an arithmetic unit. The multifunctional testing light source is configured to be switched to output a simulated solar light to a solar cell or asynchronously output a plurality of narrowband lights to the solar cell. The measuring unit is coupled to the solar cell and measures the solar cell's response to the simulated solar light and response to the asynchronously outputted narrowband lights. The arithmetic unit is coupled to the multifunctional testing light source and the measuring unit; it determines the solar cell's conversion efficiency and spectral response based on the solar cell's response to the simulated solar light and response to the asynchronously outputted narrowband lights.

Abstract: A solar cell inspection method and apparatus are disclosed. An embodiment of the solar cell inspection method includes the steps of: charging a diffusion capacitance of a solar cell; after charging the diffusion capacitance, discharging the diffusion capacitance; and detecting light emitted by the solar cell during the discharging step.

Abstract: A method for reducing resonance energy of an LCD panel includes providing a plurality of driving signal patterns, each defining a non-overlap area width of a synchronization signal and a scan-line charging frequency, and determining an order of the plurality of driving signal patterns to modulate driving signals of the LCD panel accordingly.

Abstract: An arbitration circuit and an arbitration method thereof are provided to arbitrate requests from a plurality of data processing devices for access to a shared resource. The arbitration method has steps of generating a first data stream for respectively identifying whether the data processing devices are currently serviced, generating a second data stream for identifying whether the data processing devices issue any request for access the shared resource, and performing AND operations on the first and second data streams in parallel to generate a third data stream that is used for determining which of the requests may be granted. Because the requests are processed in parallel, the arbitration time can be reduced.

Abstract: A power-saving control circuit and method suitable for circuits including a first-in-first-out (FIFO) register is provided. In the present invention, a logic circuit is disposed between two circuit modules with data transmitted in between. When there is data input into the FIFO register, the logic circuit activates a clock signal of the circuit module in the receiving end for reading the data. When all the data stored in the FIFO register is read, the clock signal is turned off so that the power consumed by the clock signal is reduced without affecting the data transmitting efficiency and the purpose of power-saving is achieved.

Abstract: A display interface circuit includes a physical layer circuit for receiving and modulating an original data signal and an original clock signal, a frame buffer for storing and outputting the data signal according to the clock signal and a command signal, a display serial interface for transmitting the data signal and the clock signal through packetization, a configuration register for generating the command signal according to an asynchronous clock signal and the data signal, and an asynchronous delay circuit for adjusting a clock latency that the clock signal takes to be sent to the configuration register to generate the asynchronous clock signal.

Abstract: One of the advantages of direct frequency synthesis technique (e.g., flying-adder architecture) is its capability of generating arbitrary frequency by utilizing the time-average-frequency concept. In the clock output of the direct frequency synthesizer, instead of one type of cycle, there are two types of cycles. Unlike the conventional one-type-cycle clock wherein clock energy is concentrated at its designed frequency, Time-Average-Frequency based clock spreads some of its energy into spurious tones, which could be harmful to certain applications. The spurious tones are caused by the periodic carry sequence generated from a fractional part accumulator inside the frequency synthesizer. The invention suggests a method and an apparatus to break this periodicity and convert the spurious tones into broadband noise.