Abstract: An integrated circuit includes a T-coil circuit, a silicon-controlled rectifier (SCR), and a signal-loss prevention circuit. The T-coil circuit is coupled to an input/output (I/O) pad and an internal circuit. The SCR is coupled to the T-coil circuit and the internal circuit. The signal-loss prevention circuit is coupled to the T-coil circuit and the SCR. The signal-loss prevention circuit includes a resistor coupled to the T-coil circuit and the SCR. An electrostatic current flows through the resistor and turns on the SCR. The signal-loss prevention circuit may also include a diode circuit coupled to the T-coil circuit and the SCR. The diode circuit is configured to prevent signal loss.

Abstract: An inductive module with a miniaturized metamaterial structure includes an insulating substrate, two coil units, and a magnetic unit. The insulating substrate has opposing first and second surfaces and a through hole extending between the first and second surfaces. The coil units are respectively disposed on the first surface and the second surface of the insulating substrate, and are electrically connected to each other through the through hole. Each of the coil units includes a closed loop coil. The magnetic unit corresponds in position to a portion of the coil unit, surrounds said portion of the coil unit, and has an opening.

Abstract: An inductive module with a miniaturized metamaterial structure includes an insulating substrate, two coil units, and a magnetic unit. The insulating substrate has opposing first and second surfaces and a through hole extending between the first and second surfaces. The coil units are respectively disposed on the first surface and the second surface of the insulating substrate, and are electrically connected to each other through the through hole. Each of the coil units includes a closed loop coil. The magnetic unit corresponds in position to a portion of the coil unit, surrounds said portion of the coil unit, and has an opening.

Abstract: An integrated circuit includes a T-coil circuit, a silicon-controlled rectifier (SCR), and a signal-loss prevention circuit. The T-coil circuit is coupled to an input/output (I/O) pad and an internal circuit. The SCR is coupled to the T-coil circuit and the internal circuit. The signal-loss prevention circuit is coupled to the T-coil circuit and the SCR. The signal-loss prevention circuit includes a resistor coupled to the T-coil circuit and the SCR. An electrostatic current flows through the resistor and turns on the SCR. The signal-loss prevention circuit may also include a diode circuit coupled to the T-coil circuit and the SCR. The diode circuit is configured to prevent signal loss.

Abstract: A wireless charging device includes a wireless charging transmitter transmitting a charging signal to a signal gain module to generate at least one gain signal. The signal gain module includes an insulation substrate with an upper surface thereof provided with a first conductive wire. The first conductive wire makes at least one turns arranged along the inner edge of the insulation substrate. The lower surface of the insulation substrate is provided with a second conductive wire whose position corresponds to the position of the first conductive wire. A connecting element is arranged between the first conductive wire and the second conductive wire, such that the first conductive wire is electrically connected to the second conductive wire through the connecting element. The present invention provides a charging signal with high intensity to avoid the low charging efficiency caused by deflection and too long a distance.

Abstract: A wireless charging device includes a wireless charging transmitter transmitting a charging signal to a signal gain module to generate at least one gain signal. The signal gain module includes an insulation substrate with an upper surface thereof provided with a first conductive wire. The first conductive wire makes at least one turns arranged along the inner edge of the insulation substrate. The lower surface of the insulation substrate is provided with a second conductive wire whose position corresponds to the position of the first conductive wire. A connecting element is arranged between the first conductive wire and the second conductive wire, such that the first conductive wire is electrically connected to the second conductive wire through the connecting element. The present invention provides a charging signal with high intensity to avoid the low charging efficiency caused by deflection and too long a distance.

Abstract: An active surge protection structure is provided between a power line and a core circuit, comprising a surge-to-digital converter and a clamp circuit. The surge-to-digital converter comprises a plurality of surge detection circuit. Each surge detection circuit detects a surge event occurring on the power line and generates a digital signal. The clamp circuit is disposed adjacent to the core circuit and electrically connected with the surge-to-digital converter and the power line where the core circuit is connected for dissipating surge energy. The clamp circuit receives and is driven by the digital signals from the surge-to-digital converter such that its protection flexibility can be achieved according to the digital signals. By employing the present invention, it is extraordinarily advantageous of improving system stability and achieving comprehensive surge protection with configuration of driving capability dependent on surge levels.

Abstract: A cochlear implant device comprises a receiver, a processing device, a first electrode and a second electrode. The receiver is configured to receive outside voice signal. The processing device is coupled to the receiver, configured to receive and transfer the voice signal to an electrical stimulation signal. The first electrode connects to the processing device, disposed on stapes footplate ligament or oval window. The second electrode connects to the processing device, disposed on round window. Wherein the electrical stimulation signal is applied to stapes footplate ligament, oval window or round window to stimulate acoustic nerve through the first electrode or the second electrode.

Abstract: An active surge protection structure is provided between a power line and a core circuit, comprising a surge-to-digital converter and a clamp circuit. The surge-to-digital converter comprises a plurality of surge detection circuit. Each surge detection circuit detects a surge event occurring on the power line and generates a digital signal. The clamp circuit is disposed adjacent to the core circuit and electrically connected with the surge-to-digital converter and the power line where the core circuit is connected for dissipating surge energy. The clamp circuit receives and is driven by the digital signals from the surge-to-digital converter such that its protection flexibility can be achieved according to the digital signals. By employing the present invention, it is extraordinarily advantageous of improving system stability and achieving comprehensive surge protection with configuration of driving capability dependent on surge levels.

Abstract: An electrostatic discharge (ESD) protection device and an operation method of the ESD protection device are provided. The ESD protection device includes an ESD current rail, an ESD protection element string, and a bias circuit. A first end and a second end of the ESD protection element string are electrically connected to the ESD current rail and a signal pad, respectively. The ESD protection element string includes a first ESD protection element and a second ESD protection element that are serially connected. The bias circuit is electrically connected to the ESD protection element string to provide a bias voltage to a common connection node between the first ESD protection element and the second ESD protection element.

Abstract: A negative high-voltage generation device with multi-stage selection includes an input, an output, negative charges pumps, electrical switches, and a control device. The negative charge pumps are electrically cascaded between the input and the output and configured to receive zero voltage through the input. The control device turns off at least one of the electrical switches close to the output and turns on the remains of the plurality of electrical switches, and the negative charge pumps and the electrical switches use zero voltage to generate a negative voltage at the output.

Abstract: The present disclosure relates to a high-voltage generator with multi-stage selection in low-voltage transistor process which include a boosted circuit, a plurality of switch and a feedback circuit. The boosted circuit includes multiple charge pump, so that can generate a DC output voltage higher or lower than the input signal. Turning on or turning off each switch controlled by a control signal respectively. Both ends of the circuit is connected to the output end of the high-voltage generator and charge pumps. By controlling the turning on or turning off each switch, it determines the magnitude of the boost and it also can ensure that switches will not be damaged due to excessive voltage difference.

Abstract: In the disclosure, an electrostatic discharge (ESD) protection circuit is coupled between a first power rail and a second power rail to discharge any ESD stress. The ESD protection circuit includes a detection circuit, a triggering circuit, and a dual silicon controlled rectifier (DSCR) device. When an ESD stresses is being applied to the first or second power rail, the detection circuit may first detect the ESD stresses and output a detection signal to the triggering circuit. The triggering circuit generates a triggering signal based on the detection signal and the polarity of the ESD stress. Then, the DSCR device is symmetrically triggered based on the triggering signal received at a common node between at least two transistors of the same type. The exemplary ESD protection circuit may be implemented in nanoscale manufactured integrated circuit and achieve good ESD robustness while maintaining low standby leakage current and relatively small silicon footprint.

Abstract: A silicon controlled rectifier including a semiconductor substrate, first and second semiconductor wells, first and second semiconductor regions, third and fourth semiconductor regions and a silicide layer is provided. The first and the second semiconductor wells are formed in the semiconductor substrate. The first and the second semiconductor regions are respectively formed in the first and the second semiconductor wells in spaced apart relation. The third and the fourth semiconductor regions are respectively formed in the first and the second semiconductor wells. The silicide layer is formed on the third and the fourth semiconductor regions. The silicon controlled rectifier is at least suitable for high frequency circuit application. The silicon controlled rectifier has a relatively low trigger voltage, a relatively high electrostatic discharge level, and a relatively low capacitance.

Abstract: A cochlear implant device comprises a receiver, a processing device, a first electrode and a second electrode. The receiver is configured to receive outside voice signal. The processing device is coupled to the receiver, configured to receive and transfer the voice signal to an electrical stimulation signal. The first electrode connects to the processing device, disposed on stapes footplate ligament or oval window. The second electrode connects to the processing device, disposed on round window. Wherein the electrical stimulation signal is applied to stapes footplate ligament, oval window or round window to stimulate acoustic nerve through the first electrode or the second electrode.

Abstract: In a test method for eliminating electrostatic charges, at least one test process is firstly performed by a test equipment comprising a tester and a platform, and electrostatic charges are generated on the test equipment in the test process. In the test process, the tester contacts and tests at least one tested integrated circuit (IC) on a test area of the platform, and then the tested IC is removed from the tester and the test area. Next, a conduction device which is grounded is moved to the test area, so that the tester contacts the conduction device to discharge the electrostatic charges to ground. Next, the conduction device is removed from the tester and the test area. Finally, the method returns to the test process to test the next tested IC.

Abstract: A diode includes a substrate, a first insulating layer, a second insulating layer, a well, a deep doped region, a first doped region, and a second doped region. The first insulating layer is disposed on the substrate. The second insulating layer is disposed on the substrate, and defines a cell region with the first insulating layer. The well is disposed on the substrate and beneath the cell region. The deep doped region is disposed in the well and beneath the cell region. The first doped region is disposed in the cell region and on the deep doped region. The second doped region is disposed adjacent to the first doped region. The second doped region is disposed on the deep doped region, and is electrically isolated from the well through the deep doped region and the first doped region.

Abstract: A power rail clamp circuit is coupled between a system power supply and a ground for alleviating an electrostatic discharge effect. The power rail clamp circuit includes a first conduction circuit, a second conduction circuit, an AND gate module and a switch module. The AND gate module receives a first conduction signal generated by the first conduction circuit and a second conduction signal generated by the second conduction circuit to generate an enabling signal. The switch module conducts the power rail clamp circuit according to the enabling signal, to process an electrostatic discharge operation. The first conduction circuit is operated to prevent a high voltage value of the system power supply, and the second conduction circuit is operated to prevent a short initiation period of the system power supply.

Abstract: A self-balanced diode device includes a substrate, a doped well, at least one first conductivity type heavily doped fin and at least two second conductivity type heavily doped fins. The doped well is arranged in the substrate. The first conductivity type heavily doped fin is arranged in the doped well, arranged in a line along a first direction, and protruded up from a surface of the substrate. The second conductivity type heavily doped fins is arranged in the doped well, arranged in a line along a second direction intersecting the first direction, respectively arranged at two opposite sides of the first conductivity type heavily doped fin, and protruded up from the surface of the substrate. Each second conductivity type heavily doped fin and the first conductivity type heavily doped fin are spaced at a fixed interval.

Abstract: A self-balanced diode device includes a substrate, a doped well, at least one first conductivity type heavily doped fin and at least two second conductivity type heavily doped fins. The doped well is arranged in the substrate. The first conductivity type heavily doped fin is arranged in the doped well, arranged in a line along a first direction, and protruded up from a surface of the substrate. The second conductivity type heavily doped fins is arranged in the doped well, arranged in a line along a second direction intersecting the first direction, respectively arranged at two opposite sides of the first conductivity type heavily doped fin, and protruded up from the surface of the substrate. Each second conductivity type heavily doped fin and the first conductivity type heavily doped fin are spaced at a fixed interval.