Patents by Inventor Ming Hsiao

Ming Hsiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11165019
    Abstract: An ReRAM structure includes a dielectric layer. A first ReRAM and a second ReRAM are disposed on the dielectric layer. The second ReRAM is at one side of the first ReRAM. A trench is disposed in the dielectric layer between the first ReRAM and the second ReRAM. The first ReRAM includes a bottom electrode, a variable resistive layer and a top electrode. The variable resistive layer is between the bottom electrode and the top electrode. A width of the bottom electrode is smaller than a width of the top electrode. The width of the bottom electrode is smaller than a width of the variable resistive layer.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: November 2, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shih-Min Chou, Kuo-Chih Lai, Wei-Ming Hsiao, Hui-Ting Lin, Szu-Yao Yu, Nien-Ting Ho, Hsin-Fu Huang, Chin-Fu Lin
  • Patent number: 11139384
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region, a second region, a third region, and a fourth region; forming a tuning layer on the second region; forming a first work function metal layer on the first region and the tuning layer of the second region; forming a second work function metal layer on the first region, the second region, and the fourth region; and forming a top barrier metal (TBM) layer on the first region, the second region, the third region, and the fourth region.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: October 5, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Chih Lai, Yun-Tzu Chang, Wei-Ming Hsiao, Nien-Ting Ho, Shih-Min Chou, Yang-Ju Lu, Ching-Yun Chang, Yen-Chen Chen, Kuan-Chun Lin, Chi-Mao Hsu
  • Publication number: 20210271174
    Abstract: An overlay error measurement method includes disposing a lower-layer pattern over a substrate that includes disposing a first pattern having a first plurality of first sub-patterns extending in a first interval along a first direction and being arranged with a first pitch in a second direction crossing the first direction. The method includes disposing a second pattern having a second plurality of second sub-patterns extending in a second interval along the first direction and being arranged with a second pitch, smaller than the first pitch, in the second direction crossing the first direction. The second sub-patterns are disposed interleaved between the first sub-patterns. The method includes disposing an upper-layer pattern including a third pattern having the first pitch and at least partially overlapping with the lower-layer pattern over the lower-layer pattern and determining an overlay error between the lower-layer pattern and the upper-layer pattern.
    Type: Application
    Filed: December 23, 2020
    Publication date: September 2, 2021
    Inventors: Hung-Chih HSIEH, Ming-Hsiao WENG
  • Publication number: 20210057643
    Abstract: An ReRAM structure includes a dielectric layer. A first ReRAM and a second ReRAM are disposed on the dielectric layer. The second ReRAM is at one side of the first ReRAM. A trench is disposed in the dielectric layer between the first ReRAM and the second ReRAM. The first ReRAM includes a bottom electrode, a variable resistive layer and a top electrode. The variable resistive layer is between the bottom electrode and the top electrode. A width of the bottom electrode is smaller than a width of the top electrode. The width of the bottom electrode is smaller than a width of the variable resistive layer.
    Type: Application
    Filed: September 20, 2019
    Publication date: February 25, 2021
    Inventors: Shih-Min Chou, Kuo-Chih Lai, Wei-Ming Hsiao, Hui-Ting Lin, Szu-Yao Yu, Nien-Ting Ho, Hsin-Fu Huang, Chin-Fu Lin
  • Patent number: 10926254
    Abstract: The invention provides microfluidic devices, methods for imaging cells, and methods for preparing such microfluidic devices. The microfluidic devices are contemplated to provide advantages for use in imaging of cells and subcellular compartments in an environment that mimics in vivo conditions. The microfluidic devices can used with a microscope equipped with an oil emersion objective lens.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: February 23, 2021
    Assignee: The Charles Stark Draper Laboratory, Inc.
    Inventors: Jeffrey T. Borenstein, Joseph L. Charest, Joseph Cuiffi, Alla Epshteyn, Angela B. Holton, James Ching-Ming Hsiao
  • Publication number: 20200039033
    Abstract: A quick clamping positioning device has a main body, a fixture block protruding therefrom and chucked in a chucking slot. The main body has a shoulder on both sides of the fixture block, a manipulation piece, a fastening piece fixed to the manipulation piece and corresponding to the top surface of the fixture block. The fastening piece has a major and a minor axis, wherein the major axis is shorter than the length of a chucking slot, and the minor axis is shorter than the width of the chucking slot, wherein the chucking slot is formed in an object. The fastening piece penetrates through the chucking slot and is held in a holding space. The fastening piece is driven by the manipulation piece to rotate at a specific rotation angle against the main body, and to clamp the parts on both sides of the chucking slot with the two shoulders.
    Type: Application
    Filed: August 6, 2018
    Publication date: February 6, 2020
    Inventors: Ming-Hsiao LAI, Kuo-Shu HUANG
  • Publication number: 20200006514
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region, a second region, a third region, and a fourth region; forming a tuning layer on the second region; forming a first work function metal layer on the first region and the tuning layer of the second region; forming a second work function metal layer on the first region, the second region, and the fourth region; and forming a top barrier metal (TBM) layer on the first region, the second region, the third region, and the fourth region.
    Type: Application
    Filed: September 4, 2019
    Publication date: January 2, 2020
    Inventors: Kuo-Chih Lai, Yun-Tzu Chang, Wei-Ming Hsiao, Nien-Ting Ho, Shih-Min Chou, Yang-Ju Lu, Ching-Yun Chang, Yen-Chen Chen, Kuan-Chun Lin, Chi-Mao Hsu
  • Patent number: 10490643
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region, a second region, a third region, and a fourth region; forming a tuning layer on the second region; forming a first work function metal layer on the first region and the tuning layer of the second region; forming a second work function metal layer on the first region, the second region, and the fourth region; and forming a top barrier metal (TBM) layer on the first region, the second region, the third region, and the fourth region.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: November 26, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Chih Lai, Yun-Tzu Chang, Wei-Ming Hsiao, Nien-Ting Ho, Shih-Min Chou, Yang-Ju Lu, Ching-Yun Chang, Yen-Chen Chen, Kuan-Chun Lin, Chi-Mao Hsu
  • Patent number: 10395370
    Abstract: A method and a wearable apparatus for disease diagnosis are provided. The method is applied to the wearable apparatus with an image capturing unit and a display unit. In this method, a plurality of input images in a field of view of the wearable apparatus are captured by using the image capturing unit, wherein each of the input images contains an array of pixels. The variations of the pixel values in a time domain are analyzed. The pixel variations within a specific frequency range are magnified and the magnified pixel variations are added onto the original ones to generate an output image. The output image is overlapped with a current image in the field of view of the wearable apparatus and displayed on the display unit.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: August 27, 2019
    Assignee: National Taiwan University
    Inventors: Hao-Ming Hsiao, Hsien-Li Kao, Kuang-Huei Lee, Dian-Ru Li
  • Patent number: 10368639
    Abstract: A structure includes: two abutted vertical bars having a rectangular tube shape; a plurality of hook hole groups on the side wall thereof; the side walls of the vertical bars are provided with first and second locking through holes, respectively, at the place adjacent to the butt-joining opening thereof; a hook hole group is arranged between one butt-joining opening and the first or second locking through hole; a bidirectional plug-in butt-joining member is assembled between the two butt-joining openings at the opposite ends of the two vertical bars, and the bidirectional plug-in butt-joining member further includes recess portions that are aligned with the hook hole groups arranged on the vertical bar adjacent to the butt-joining opening; and first and second positioning holes arranged on the side wall of the bidirectional plug-in butt-joining member and aligned with the respective locking through holes for locking through the respective locking member.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: August 6, 2019
    Assignee: SHENTER ENTERPRISE CO., LTD.
    Inventors: Ming-Hsiao Lai, Kuo-Shu Huang
  • Patent number: 10340350
    Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes an isolation layer, a gate dielectric layer, a tantalum nitride layer, a tantalum oxynitride layer, an n type work function metal layer and a filling metal. The isolation layer is formed on a substrate, and the isolation layer has a first gate trench. The gate dielectric layer is formed in the first gate trench, the tantalum nitride layer is formed on the gate dielectric layer, and the tantalum oxynitride layer is formed on the tantalum nitride layer. The n type work function metal layer is formed on the tantalum oxynitride layer in the first gate trench, and the filling metal is formed on the n type work function metal layer in the first gate trench.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: July 2, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shih-Min Chou, Yun-Tzu Chang, Wei-Ning Chen, Wei-Ming Hsiao, Chia-Chang Hsu, Kuo-Chih Lai, Yang-Ju Lu, Yen-Chen Chen, Chun-Yao Yang
  • Patent number: 10330114
    Abstract: A drainage device includes a cover body formed of a top and a cylindrical body portion, an opening defined in a bottom side of said cylindrical body portion of said over body, air outlets located in a top side of the cylindrical body portion, a shoulder extended around a middle part of the cylindrical body portion, an outer wall downwardly extended from the shoulder around the cylindrical body portion, and air inlets located on the outer wall. The drainage device cover is mounted on a mounting plate of a drainage device and covered over a motor such that the cylindrical body portion has the bottom edge thereof isolated from the mounting plate, the air outlets face toward the exhaust fan of the motor, and the bottom edge of the outer wall is abutted against the top surface of the mounting plate.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: June 25, 2019
    Assignee: Holimay Corporation
    Inventor: Yu-Ming Hsiao
  • Patent number: 10321761
    Abstract: A butt-joining and engaging structure that allows to a pair of columns to be connected. The butt-joining and engaging structure has a seat body with a first connecting portion and a through hole, a stop part extends from an inner wall of the through hole toward the center of the through hole, a connecting member has a pair of ends defining a plug-in portion and a second connecting portion, and a position limiting part protrudes from the abutment surface of the connecting member. The first connecting portion is adapted to be affixed to one of the pair of columns. The second connecting portion is adapted to be secured to an end of the other column.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: June 18, 2019
    Assignee: SHENTER ENTERPRISE CO., LTD.
    Inventors: Ming-Hsiao Lai, Kuo-Shu Huang
  • Patent number: 10299588
    Abstract: A modular frame with a U-shaped hook member includes multiple upright columns each having at least two faces of each of the multiple upright columns have multiple couples of first through hole and second through hole defined therein. Multiple horizontal columns are respectively connected to a corresponding one of the at least two faces of a corresponding one of the multiple upright columns. Two connecting blocks respectively mounted into a corresponding one of two opposite ends of the tube. Two U-shaped hook members are respectively mounted into a corresponding one of the two connecting blocks. Each U-shaped hook member includes a first hook and a second hook extending therefrom and respectively engaged to a lower portion of a corresponding on of the first through holes and the second through holes.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: May 28, 2019
    Inventors: Ming-Hsiao Lai, Kuo-Shu Huang
  • Patent number: 10299589
    Abstract: A frame hooking and connecting structure includes a column, each side of which is formed with a first through hole, and a parallel second through hole. A first support rod is provided to hook the column. The two ends of the first support rod are extended with a fastening part, and the free end of the fastening part is connected with a first hook, which is hooked and positioned to the bottom edge of the first through hole, and the fastening part is attached to a corresponding end surface of the column. A second support rod is provided to hook the column. The ends of the second support rod are respectively extended with a second hook, and the free end of the second hook penetrates through the hollow portion and the second through hole into the column, and is locked to the bottom edge of the second through hole.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: May 28, 2019
    Assignee: SHENTER ENTERPRISE CO., LTD.
    Inventors: Ming-Hsiao Lai, Kuo-Shu Huang
  • Patent number: 10206506
    Abstract: Disclosed is a frame with connecting and positioning structure. The frame has a plurality of cross bars and vertical bars which are correspondingly connected through the connecting and positioning structure. The connecting and positioning structure includes: a fixing seat fixed to the end of the cross bar; a fitting groove on the fixing seat; one end of the fitting groove is extended toward the bottom edge of the cross bar to form an opening end; an embedded block is provided for embedding in the retaining groove of the vertical bar; a plug-in column is connected with the embedded block; a fitting convex portion is connected to the other end of the plug-in column, and the fitting convex portion and the plug-in column are correspondingly inserted into the fitting groove; and a fixing member penetrates through the embedded block, the fitting convex portion, and the plug-in column to connect them together.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: February 19, 2019
    Assignee: SHENTER ENTERPRISE CO., LTD.
    Inventors: Ming-Hsiao Lai, Kuo-Shu Huang
  • Publication number: 20180331193
    Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes an isolation layer, a gate dielectric layer, a tantalum nitride layer, a tantalum oxynitride layer, an n type work function metal layer and a filling metal. The isolation layer is formed on a substrate, and the isolation layer has a first gate trench. The gate dielectric layer is formed in the first gate trench, the tantalum nitride layer is formed on the gate dielectric layer, and the tantalum oxynitride layer is formed on the tantalum nitride layer. The n type work function metal layer is formed on the tantalum oxynitride layer in the first gate trench, and the filling metal is formed on the n type work function metal layer in the first gate trench.
    Type: Application
    Filed: July 25, 2018
    Publication date: November 15, 2018
    Inventors: Shih-Min Chou, Yun-Tzu Chang, Wei-Ning Chen, Wei-Ming Hsiao, Chia-Chang Hsu, Kuo-Chih Lai, Yang-Ju Lu, Yen-Chen Chen, Chun-Yao Yang
  • Patent number: 10125885
    Abstract: A check valve mounting structure includes a seat plate including a mounting hole and linked notches, a tubular bottom fitting with the top end thereof aimed at the mounting hole and having lugs extended from the periphery, and a holder block including a top receptacle, a shoulder and a bottom receptacle, which includes protruding portions outwardly extended from the periphery, first channels upwardly extended from the bottom side to a predetermined distance and second channels respectively and horizontally extended from the top ends of the first channels toward the periphery thereof. The bottom receptacle is attached onto the tubular bottom fitting, allowing the protruding portions to pass through the notches. The lugs are respectively inserted into the first channels and the second channels.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: November 13, 2018
    Assignee: Holimay Corporation
    Inventor: Yu-Ming Hsiao
  • Patent number: D870544
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: December 24, 2019
    Assignee: SHENTER ENTERPRISE CO., LTD.
    Inventors: Ming-Hsiao Lai, Kuo-Shu Huang
  • Patent number: D932656
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: October 5, 2021
    Inventors: Ming-Hsiao Lai, Kuo-Shu Huang