Patents by Inventor Ming-Hsien Wu
Ming-Hsien Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11948278Abstract: An image quality improvement method and an image processing apparatus using the same are provided. Denoising filtering is performed to an original image by a filter to obtain a preliminary processing image. The preliminary processing image is input to a multi-stage convolutional network model to generate an optimization image through the multi-stage convolutional network model. The multi-stage convolutional network model includes multiple convolutional network sub-models, and these convolutional network sub-models respectively correspond to different network architectures.Type: GrantFiled: August 18, 2021Date of Patent: April 2, 2024Assignee: National Chengchi UniversityInventors: Yan-Tsung Peng, Sha-Wo Huang, Ming-Hao Lin, Chin-Hsien Wu, Chun-Lin Tang
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Patent number: 11935728Abstract: In order to reduce the occurrence of current alarms in a semiconductor etching or deposition process, a controller determines an offset in relative positions of a cover ring and a shield over a wafer within a vacuum chamber. The controller provides a position alarm and/or adjusts the position of the cover ring or shield when the offset is greater than a predetermined value or outside a range of acceptable values.Type: GrantFiled: January 5, 2021Date of Patent: March 19, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Tsung-Cheng Wu, Sheng-Ying Wu, Ming-Hsien Lin, Chun Fu Chen
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Publication number: 20240087980Abstract: A semiconductor device includes a substrate, a dielectric layer disposed over the substrate, and an interconnect structure extending through the dielectric layer. The dielectric layer includes a low-k dielectric material which includes silicon carbonitride having a carbon content ranging from about 30 atomic % to about 45 atomic %. The semiconductor device further includes a thermal dissipation feature extending through the dielectric layer and disposed to be spaced apart from the interconnect structure.Type: ApplicationFiled: February 17, 2023Publication date: March 14, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kai-Fang CHENG, Cherng-Shiaw TSAI, Cheng-Chin LEE, Yen-Ju WU, Yen-Pin HSU, Li-Ling SU, Ming-Hsien LIN, Hsiao-Kang CHANG
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Publication number: 20240072021Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.Type: ApplicationFiled: October 26, 2023Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Yu Chen, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Li-Hsien Huang, Po-Hao Tsai, Ming-Shih Yeh, Ta-Wei Liu
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Publication number: 20240071656Abstract: A circuit protection device includes a first temperature sensitive resistor, a second temperature sensitive resistor, an electrically insulating multilayer, a first and second electrode layer, and at least one external electrode. The first temperature sensitive resistor and the second temperature sensitive resistor are electrically connected in parallel, and have a first upper electrically conductive layer and a second lower electrically conductive layer, respectively. The electrically insulating multilayer includes an upper insulating layer, a middle insulating layer, and a lower insulating layer. The upper insulating layer is between the first upper electrically conductive layer and the first electrode layer. The middle layer is laminated between the first temperature sensitive resistor and the second temperature sensitive resistor. The lower insulating layer is between the second lower electrically conductive layer and the second electrode layer.Type: ApplicationFiled: January 13, 2023Publication date: February 29, 2024Inventors: Chien Hui WU, Yung-Hsien CHANG, Cheng-Yu TUNG, Ming-Hsun LU, Yi-An SHA
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Publication number: 20240027755Abstract: A head-mounted eye tracking system including an eye tracker, a signal processor, and a plurality of light-emitting optical guides is provided. The eye tracker is adaptable for sensing eyeballs of a wearer. The eye tracker includes a plurality of light-emitting devices and a plurality of sensing devices. The plurality of light-emitting devices are adaptable for emitting a tracking beam. The sensing devices are adaptable for receiving the tracking beam reflected by the eyeballs of the wearer. The signal processor is signally connected to the eye tracker. The plurality of light-emitting optical guides is disposed corresponding to the plurality of light-emitting devices.Type: ApplicationFiled: October 5, 2023Publication date: January 25, 2024Applicant: Industrial Technology Research InstituteInventors: Chia-Hsin Chao, Han-Kuei Fu, Meng-Han Lin, Ming-Hsien Wu
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Patent number: 11855062Abstract: A method for manufacturing a display array includes the following steps: providing a substrate and forming a semiconductor stacked layer on the substrate; forming an insulating layer and a plurality of electrode pads on an outer surface of the semiconductor stacked layer, the insulating layer and the electrode pads directly contacting the semiconductor stacked layer, wherein the insulating layer has a plurality of openings spaced apart from each other; and transferring the semiconductor stacked layer, the insulating layer and the electrode pads from the substrate to a driving backplane, wherein the electrode pads are respectively electrically connected to the driving backplane through the openings of the insulating layer to form a plurality of light emitting regions in the semiconductor stacked layer as the electrode pads and the semiconductor stacked layer are energized by the driving backplane.Type: GrantFiled: October 27, 2022Date of Patent: December 26, 2023Assignee: Industrial Technology Research InstituteInventors: Ming-Hsien Wu, Chia-Hsin Chao, Yen-Hsiang Fang
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Publication number: 20230394822Abstract: A dynamic image processing method, executed by an electronic device communicating with a photographing device and reading an executable code is introduced. The method includes the steps of identifying the preset object, image filtering and forming a concatenated video. In the step of image filtering, a filter condition is set, the filter condition includes that the preset object appears in a focus area of the initial image, and when the preset object in the initial image meets the filter condition, a catch moment in the initial image is selected. In the step of forming a concatenated video, at least one video clip in the initial image is selected according to the catch moment, and the at least one video clip is assembled to form the concatenated video. An electronic device, a terminal device and a mobile communication device are also introduced.Type: ApplicationFiled: August 24, 2022Publication date: December 7, 2023Inventors: PIN-YU CHOU, YU-NING CHANG, YUEH-HUA LEE, MING-HSIEN WU, YU-SYUAN HUANG
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Publication number: 20230396869Abstract: A dynamic image processing method is executed by an electronic device communicating with a photographing device and reading an executable code to identify a preset object by using artificial intelligence, and perform dynamic image processing for the preset object. The method includes the steps of identifying the preset object, image filtering and forming a concatenated video. In the step of image filtering, a filter condition is set, the filter condition includes detecting a movement variable of the preset object in the initial image, and when the filter condition meets a threshold, a catch moment in the initial image is selected. In the step of forming a concatenated video, at least one video clip in the initial image is selected according to the catch moment, and the video clip is assembled to form the concatenated video. The present disclosure also provides an electronic device and a terminal device.Type: ApplicationFiled: October 26, 2022Publication date: December 7, 2023Inventors: PIN-YU CHOU, YUEH-HUA LEE, YU-NING CHANG, MING-HSIEN WU, YU-SYUAN HUANG
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Patent number: 11837628Abstract: A display array including a semiconductor stacked layer, an insulating layer, a plurality of electrode pads, and a driving backplane is provided. The semiconductor stacked layer has a plurality of light emitting regions arranged along a reference plane. The insulating layer is disposed to an outer surface of the semiconductor stacked layer and contacts the semiconductor stacked layer. The insulating layer has a plurality of openings respectively corresponding to the plurality of light emitting regions. The electrode pads are disposed to the insulating layer and are respectively electrically connect the plurality of light emitting regions through the plurality of openings. The driving backplane is disposed to the semiconductor stacked layer and electrically connected to the plurality of electrode pads, wherein a light emitting material layer of the semiconductor stacked layer has consistency along an extension direction of the reference plane.Type: GrantFiled: July 27, 2021Date of Patent: December 5, 2023Assignee: Industrial Technology Research InstituteInventors: Ming-Hsien Wu, Chia-Hsin Chao, Yen-Hsiang Fang
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Patent number: 11817054Abstract: A pixel structure includes an original light emitting diode die and a repairing light emitting diode die emitting light of a same color, and an extending conductor. The original light emitting diode die includes a first epitaxial layer, and a first electrode and a second electrode disposed at opposite sides of the first epitaxial layer. The repairing light emitting diode die includes a second epitaxial layer, and a third electrode and a fourth electrode disposed at a same side of the second epitaxial layer. The extending conductor includes a first portion, a second portion and a cut-off region. The first portion is electrically connected to the second electrode of the original light emitting diode die. The second portion is electrically connected to the third electrode of the repairing light emitting diode die. The cut-off region is located in the first portion or between the first portion and the second portion.Type: GrantFiled: August 3, 2022Date of Patent: November 14, 2023Assignee: Industrial Technology Research InstituteInventors: Ming-Hsien Wu, Yao-Jun Tsai
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Patent number: 11810484Abstract: A spliced display including a transparent substrate, a plurality of micro (light-emitting diodes) LEDs, and a plurality of light sensors is provided. The transparent substrate has a display surface and a back surface opposite to each other. The driving backplanes are disposed on the back surface of the transparent substrate to be spliced with each other. The micro LEDs are disposed on the driving backplanes respectively and located between the micro LEDs and the transparent substrate. Each of the driving backplanes is corresponding to parts of the micro LEDs. The light sensors are disposed on the transparent substrate and located between the driving backplanes and the transparent substrate. Each of the light sensors is adjacent to at least two of the micro LEDs, and at least one of the at least two of the micro LEDs is adjacent to two of the light sensor.Type: GrantFiled: September 24, 2021Date of Patent: November 7, 2023Assignee: Industrial Technology Research InstituteInventors: Chia-Hsin Chao, Ming-Hsien Wu, Yen-Hsiang Fang, Po-Hsun Wang, Li-Chun Huang
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Publication number: 20230257931Abstract: A method of coating a three-dimensional fabric has the steps of: preparing a three-dimensional fabric having two fabric layers and a plurality of vertical yarns connected between the two fabric layers; guiding the three-dimensional fabric with the two fabric layers vertically in the horizontal plane to an coating space, when the three-dimensional fabric moves in the coating space, a tension on the surface of the two fabric layers is between 5 and 25 kilograms (kg); applying an adhesive to the surface of the two fabric layers, and the adhesive spreading vertically and fluidly; and providing a reaction condition such that the adhesive dries into a film and forms a bonding layer.Type: ApplicationFiled: April 20, 2023Publication date: August 17, 2023Inventor: Ming-Hsien Wu
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Publication number: 20230186795Abstract: A display panel including a bottom plate, a plurality of display modules, and a plurality of connection pixel packages is provided. The display modules are tiled in an array arrangement on the bottom plate. Each of the display modules includes a circuit substrate and a plurality of display pixels. The circuit substrate includes a plurality of connection electrodes. The display pixels are disposed on the circuit substrate and at least one of the display pixels has at least one second pixel unit. Each of the connection pixel packages includes at least one first pixel unit. The connection pixel packages are disposed on the connection electrodes of the adjacent circuit substrates to connect the display modules. A light emitting surface of the at least one first pixel unit and a light emitting surface of the at least one second pixel unit are coplanar.Type: ApplicationFiled: December 30, 2021Publication date: June 15, 2023Applicant: Industrial Technology Research InstituteInventors: Ming-Hsien Wu, Yao-Jun Tsai
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Publication number: 20230168433Abstract: An optical element includes a substrate, a first insulating layer, a first optical waveguide layer, a first edge coupler, and a first micro-optical element. The first insulating layer is disposed on the substrate. The first optical waveguide layer is disposed on the first insulating layer to transmit a light beam. The first edge coupler is disposed on the first insulating layer and coupled to an end of the first optical waveguide layer. The first micro-optical element is disposed on the substrate and includes a first inclined surface. The first micro-optical element is located within a first groove formed between the substrate, the first insulating layer, the first optical waveguide layer, and the first edge coupler. The light beam is sequentially transmitted from the first optical waveguide layer to the first edge coupler, emitted from the first edge coupler, and reflected by the first inclined surface to an optical fiber connector.Type: ApplicationFiled: November 28, 2022Publication date: June 1, 2023Applicant: Industrial Technology Research InstituteInventors: Kai-Ning Ku, Ming-Hsien Wu
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Publication number: 20230053079Abstract: A method for manufacturing a display array includes the following steps: providing a substrate and forming a semiconductor stacked layer on the substrate; forming an insulating layer and a plurality of electrode pads on an outer surface of the semiconductor stacked layer, the insulating layer and the electrode pads directly contacting the semiconductor stacked layer, wherein the insulating layer has a plurality of openings spaced apart from each other; and transferring the semiconductor stacked layer, the insulating layer and the electrode pads from the substrate to a driving backplane, wherein the electrode pads are respectively electrically connected to the driving backplane through the openings of the insulating layer to form a plurality of light emitting regions in the semiconductor stacked layer as the electrode pads and the semiconductor stacked layer are energized by the driving backplane.Type: ApplicationFiled: October 27, 2022Publication date: February 16, 2023Applicant: Industrial Technology Research InstituteInventors: Ming-Hsien Wu, Chia-Hsin Chao, Yen-Hsiang Fang
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Patent number: 11515299Abstract: A method for manufacturing a display array includes the following steps: providing a substrate and forming a semiconductor stacked layer on the substrate; forming an insulating layer and a plurality of electrode pads on an outer surface of the semiconductor stacked layer, the insulating layer and the electrode pads directly contacting the semiconductor stacked layer, wherein the insulating layer has a plurality of openings, and the electrode pads are respectively located in the openings of the insulating layer and separated by the insulating layer; and transferring the semiconductor stacked layer, the insulating layer and the electrode pads from the substrate to a driving backplane, wherein the electrode pads are respectively electrically connected to a portion of the semiconductor stacked layer and the driving backplane through the openings of the insulating layer to form a plurality of light emitting regions in the semiconductor stacked layer.Type: GrantFiled: December 26, 2018Date of Patent: November 29, 2022Assignee: Industrial Technology Research InstituteInventors: Ming-Hsien Wu, Chia-Hsin Chao, Yen-Hsiang Fang
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Publication number: 20220375407Abstract: A pixel structure includes an original light emitting diode die and a repairing light emitting diode die emitting light of a same color, and an extending conductor. The original light emitting diode die includes a first epitaxial layer, and a first electrode and a second electrode disposed at opposite sides of the first epitaxial layer. The repairing light emitting diode die includes a second epitaxial layer, and a third electrode and a fourth electrode disposed at a same side of the second epitaxial layer. The extending conductor includes a first portion, a second portion and a cut-off region. The first portion is electrically connected to the second electrode of the original light emitting diode die. The second portion is electrically connected to the third electrode of the repairing light emitting diode die. The cut-off region is located in the first portion or between the first portion and the second portion.Type: ApplicationFiled: August 3, 2022Publication date: November 24, 2022Applicant: Industrial Technology Research InstituteInventors: Ming-Hsien Wu, Yao-Jun Tsai
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Publication number: 20220367230Abstract: A micro device structure including a device and a fixed structure is provided. The device has an upper surface, a lower surface, and a first side surface. The lower surface is opposite to the upper surface. The first side surface connects the upper surface and the lower surface. The fixing structure includes a connecting portion and a first turning portion. The connecting portion extends at least from the upper surface of the device to the first side surface. The first turning portion is in contact to be connected with a first end of the connecting portion and extends outward from the first side surface to be away from the first side surface. The first end of the connecting portion is located on the first side surface between the upper surface and the lower surface. A display apparatus is also provided.Type: ApplicationFiled: September 22, 2021Publication date: November 17, 2022Applicant: Industrial Technology Research InstituteInventors: Ming-Hsien Wu, Wei-Hung Kuo, Chu-Li Chao, Chu-Yin Hung, Yu-Hsiang Chang
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Patent number: 11502232Abstract: A pixel structure including a substrate, a first conductor, a second conductor, and a plurality of dies is provided. The first conductor is disposed on the substrate and includes a plurality of first body portions extending along a first direction, a plurality of first branch portions extending along a second direction, and a plurality of second branch portions extending along the first direction. The second conductor is disposed on the substrate and includes a plurality of second body portions extending along the second direction and a plurality of third branch portions extending along the first direction. The die includes two electrodes, wherein the first branch portions are connected between the first body portions and the second branch portions, and the two electrodes are respectively connected to the first branch portions and the second body portions or respectively connected to the second branch portions and the third branch portions.Type: GrantFiled: July 14, 2020Date of Patent: November 15, 2022Assignee: Industrial Technology Research InstituteInventors: Ming-Hsien Wu, Yao-Jun Tsai