Patents by Inventor Ming-Hsien Wu

Ming-Hsien Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12087745
    Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.
    Type: Grant
    Filed: October 26, 2023
    Date of Patent: September 10, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yu Chen, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Li-Hsien Huang, Po-Hao Tsai, Ming-Shih Yeh, Ta-Wei Liu
  • Patent number: 12087612
    Abstract: A micro device structure including a device and a fixed structure is provided. The device has an upper surface, a lower surface, and a first side surface. The lower surface is opposite to the upper surface. The first side surface connects the upper surface and the lower surface. The fixing structure includes a connecting portion and a first turning portion. The connecting portion extends at least from the upper surface of the device to the first side surface. The first turning portion is in contact to be connected with a first end of the connecting portion and extends outward from the first side surface to be away from the first side surface. The first end of the connecting portion is located on the first side surface between the upper surface and the lower surface. A display apparatus is also provided.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: September 10, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Hsien Wu, Wei-Hung Kuo, Chu-Li Chao, Chu-Yin Hung, Yu-Hsiang Chang
  • Patent number: 12071699
    Abstract: An electrochemical plating apparatus for depositing a conductive material on a wafer includes a cell chamber. The plating solution is provided from a bottom of the cell chamber into the cell chamber. A plurality of openings passes through a sidewall of the cell chamber. A flow regulator is arranged with each of the plurality of openings configured to regulate an overflow amount of the plating solution flowing out through the each of the plurality of openings. The electrochemical plating apparatus further comprises a controller to control the flow regulator such that overflow amounts of the plating solution flowing out through the plurality of openings are substantially equal to each other.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: August 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Lung Hou, Ming-Hsien Lin, Tsung-Cheng Wu
  • Publication number: 20240276636
    Abstract: This disclosure is related to a circuit board structure with an embedded ceramic substrate. A circuit substrate includes an insulating base, a first copper foil and a through-hole portion. A ceramic substrate is disposed in the through-hole portion and includes a ceramic substrate and a second copper foil. A plurality of positioning parts are arranged between the insulating base and the ceramic base. An adhesive layer is disposed between the insulating base and the ceramic base to seal the through-hole portion. A metal layer is disposed on the first copper foil and the second copper foil to cover the adhesive layer exposed from the through-hole portion. The metal layer is patterned to form a circuit layer. This disclosure also provides a manufacturing process of a circuit board structure with an embedded ceramic substrate.
    Type: Application
    Filed: May 3, 2023
    Publication date: August 15, 2024
    Inventors: Yu-Hsien LIAO, Shih-Han WU, Jhih-Wei LAI, Jian-Yu SHIH, Ming-Yen PAN
  • Publication number: 20240276650
    Abstract: A manufacturing method of a circuit board. The manufacturing method includes: providing a first substrate; forming an opening on the first substrate; disposing a second substrate, which has a plurality of through holes in the opening; forming an adhesive layer between the first substrate and the second substrate; forming a bonding layer on the first substrate and the second substrate; forming a metal layer on the bonding layer; and patterning the metal layer to form a circuit layer. A circuit board is also disclosed in the disclosure.
    Type: Application
    Filed: May 25, 2023
    Publication date: August 15, 2024
    Inventors: Yu-Hsien LIAO, Shih-Han WU, Jhih-Wei LAI, Jian-Yu SHIH, Ming-Yen PAN
  • Patent number: 12062151
    Abstract: An image processing circuit performs super-resolution (SR) operations. The image processing circuit includes memory to store multiple parameter sets of multiple artificial intelligence (AI) models. The image processing circuit further includes an image guidance module, a parameter decision module, and an SR engine. The image guidance module operates to detect a representative feature in an image sequence including a current frame and past frames within a time window. The parameter decision module operates to adjust parameters of one or more AI models based on a measurement of the representative feature. The SR engine operates to process the current frame using the one or more AI models with the adjusted parameters to thereby generate a high-resolution image for display.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: August 13, 2024
    Assignee: MediaTek Inc.
    Inventors: Ming-En Shih, Ping-Yuan Tsai, Yu-Cheng Tseng, Kuo-Chen Huang, Kuo-Chiang Lo, Hsin-Min Peng, Chun Hsien Wu, Pei-Kuei Tsung, Tung-Chien Chen, Yao-Sheng Wang, Cheng Lung Jen, Chih-Wei Chen, Chih-Wen Goo, Yu-Sheng Lin, Tsu Jui Hsu
  • Publication number: 20240258280
    Abstract: An image compensation device including a substrate and island display units is provided. The substrate includes a central area and configuration rings surrounding the central area and spaced apart from the central area at different intervals. The island display units are disposed on the substrate. One of the island display units is disposed at the central area, and the other island display units are respectively disposed at the configuration rings. Each island display unit includes a real display area and a dummy display area located around the real display area, and includes real pixels and dummy pixels. The real pixels are disposed in the real display area. The dummy pixels are disposed in the dummy display area, and a number of the dummy pixels is greater than a number of the real pixels to compensate for a display image spliced by discrete images.
    Type: Application
    Filed: December 27, 2023
    Publication date: August 1, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Ren-Lu Chen, Chy-Lin Wang, Li-Chun Huang, Chia-Hsin Chao, Ming-Hsien Wu
  • Publication number: 20240258456
    Abstract: A transparent display includes a transparent substrate, a wiring layer, a plurality of light-emitting package units, and a plurality of connecting elements. The wiring layer is disposed on a surface of the transparent substrate. Each of the light-emitting package units includes a micro-substrate, frontward light-emitting elements, backward light-emitting elements, and a sealant. The micro-substrate has a first surface facing away from the transparent substrate and a second surface facing the transparent substrate. The frontward light-emitting elements are disposed on the first surface of the micro-substrate, in which the micro-substrate is configured to block the light from the frontward light-emitting elements toward the transparent substrate. The backward light-emitting elements are disposed on the second surface of the micro-substrate. The sealant covers the micro-substrate, the frontward light-emitting elements, and the backward light-emitting elements.
    Type: Application
    Filed: December 18, 2023
    Publication date: August 1, 2024
    Inventors: Yi-Chen LIN, Yao-Jun TSAI, Ming-Hsien WU
  • Publication number: 20240260366
    Abstract: An optical module including a red light emitting chip array, a green light emitting chip array, a blue light emitting chip array, and a flat optical element is provided. The red light emitting chip array is configured to emit red lights. The green light emitting chip array is configured to emit green lights. The blue light emitting chip array is configured to emit blue lights. After passing through the flat optical element, the red, green, and blue lights form a plurality of light spots. Each of the light spots includes a red light spot, a green light spot, and a blue light spot which are formed after one of the red lights, one of the green lights, and one of the blue lights pass through the flat optical element. A near-eye display is also provided.
    Type: Application
    Filed: December 21, 2023
    Publication date: August 1, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Chia-Hsin Chao, Ming-Hsien Wu
  • Publication number: 20240242942
    Abstract: To reduce the occurrence of current alarms in a semiconductor etching or deposition process, a controller determines an offset in relative positions of a cover ring and a shield over a wafer within a vacuum chamber. The controller provides a position alarm and/or adjusts the position of the cover ring or shield when the offset is greater than a predetermined value or outside a range of acceptable values.
    Type: Application
    Filed: January 23, 2024
    Publication date: July 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Cheng WU, Ming-Hsien LIN, Chun-Fu CHEN, Sheng-Ying WU
  • Publication number: 20240221169
    Abstract: An image cropping processing method includes calculating a human body area ratio of the human covering area occupying an original size of an initial image, and defining a cropping area in the initial image according to a cropping ratio corresponding to the human body area ratio. Then, coinciding the center points according to the focal coordinate of the human body coverage area and the focal coordinate of the cropping area, and when the human body coverage area is covered within the cropping area in the initial image, the cropping area is selected to crop a cropped image with the proportion and position of the characters that meet the expectations of users. An electronic device of image cropping processing and a non-transitory computer-readable recording medium are utilized to perform the image cropping processing method.
    Type: Application
    Filed: December 22, 2023
    Publication date: July 4, 2024
    Inventors: HUI-MEI HUNG, PIN-YU CHOU, YUEH-HUA LEE, MING-HSIEN WU
  • Publication number: 20240221421
    Abstract: A processing method for selecting a multimedia image based on a ranking performed by an electronic device includes reading an executable code, identifying multiple multimedia images by using artificial intelligence, and performing rating and sorting processing on the multiple multimedia images. The method includes the steps of target detection, interaction analysis, position assessment, facial confirmation, and ranking. The method obtains a total grading score for each multimedia image by summing according to a target confirmation grading score, an interaction grading score, a position grading score, and a facial confirmation grading score, and selects a user-desired multimedia image according to a ranking of the total grading score. An electronic device for selecting a multimedia image based on a ranking and a terminal device communicatively connected thereto, and a non-transitory computer-readable recording medium are also provided.
    Type: Application
    Filed: December 27, 2023
    Publication date: July 4, 2024
    Inventors: HUI-MEI HUNG, YU-NING CHANG, YUEH-HUA LEE, PIN-YU CHOU, MING-HSIEN WU
  • Publication number: 20240206070
    Abstract: A display device includes a first display module. The first display module includes a first support substrate, a first flexible substrate, a first conductive circuit, a plurality of first electronic elements, and a protection layer. The first flexible substrate is disposed on the first support substrate. The first conductive circuit is disposed on the first support substrate. The first electronic elements are disposed on the first conductive circuit, where the first conductive circuit is located between the first electronic elements and the first support substrate and is electrically connected to the first electronic elements. The protection layer covers the first electronic elements and the first conductive circuit. The first flexible substrate and the first conductive circuit are bent from a side surface of the first support substrate to a back surface of the first support substrate.
    Type: Application
    Filed: December 28, 2022
    Publication date: June 20, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Wan-Yi Lin, Ming-Hsien Wu
  • Publication number: 20240177482
    Abstract: A method for multimedia image processing includes steps of identifying objects and selecting images, and is characterized in that when a body position of a preset object is detected and conformed to match a preset posture; or a plurality of the preset objects are detected to have body movements and facial expressions that are emotional, and the preset objects have at least one of looking in similar directions, one looking at the other, and at least two looking at each other, an interception time point is selected for selecting a candidate image, and the candidate image can be collected to produce a concatenated video with rich contents. An electronic device is also introduced for multimedia image processing, a terminal device connected thereto, and a non-transitory computer-readable recording medium.
    Type: Application
    Filed: November 27, 2023
    Publication date: May 30, 2024
    Inventors: PIN-YU CHOU, YUEH-HUA LEE, MING-HSIEN WU, HUI-MEI HUNG
  • Patent number: 11996498
    Abstract: A subpixel structure includes a substrate and a light emitting diode chip. The light emitting diode chip is disposed on the substrate. The light emitting diode chip has a chip area and a light emitting area, and the light emitting area is less than or equal to one tenth of the chip area.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: May 28, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Hsien Wu, Yao-Jun Tsai
  • Publication number: 20240027755
    Abstract: A head-mounted eye tracking system including an eye tracker, a signal processor, and a plurality of light-emitting optical guides is provided. The eye tracker is adaptable for sensing eyeballs of a wearer. The eye tracker includes a plurality of light-emitting devices and a plurality of sensing devices. The plurality of light-emitting devices are adaptable for emitting a tracking beam. The sensing devices are adaptable for receiving the tracking beam reflected by the eyeballs of the wearer. The signal processor is signally connected to the eye tracker. The plurality of light-emitting optical guides is disposed corresponding to the plurality of light-emitting devices.
    Type: Application
    Filed: October 5, 2023
    Publication date: January 25, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Chia-Hsin Chao, Han-Kuei Fu, Meng-Han Lin, Ming-Hsien Wu
  • Patent number: 11855062
    Abstract: A method for manufacturing a display array includes the following steps: providing a substrate and forming a semiconductor stacked layer on the substrate; forming an insulating layer and a plurality of electrode pads on an outer surface of the semiconductor stacked layer, the insulating layer and the electrode pads directly contacting the semiconductor stacked layer, wherein the insulating layer has a plurality of openings spaced apart from each other; and transferring the semiconductor stacked layer, the insulating layer and the electrode pads from the substrate to a driving backplane, wherein the electrode pads are respectively electrically connected to the driving backplane through the openings of the insulating layer to form a plurality of light emitting regions in the semiconductor stacked layer as the electrode pads and the semiconductor stacked layer are energized by the driving backplane.
    Type: Grant
    Filed: October 27, 2022
    Date of Patent: December 26, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Hsien Wu, Chia-Hsin Chao, Yen-Hsiang Fang
  • Publication number: 20230394822
    Abstract: A dynamic image processing method, executed by an electronic device communicating with a photographing device and reading an executable code is introduced. The method includes the steps of identifying the preset object, image filtering and forming a concatenated video. In the step of image filtering, a filter condition is set, the filter condition includes that the preset object appears in a focus area of the initial image, and when the preset object in the initial image meets the filter condition, a catch moment in the initial image is selected. In the step of forming a concatenated video, at least one video clip in the initial image is selected according to the catch moment, and the at least one video clip is assembled to form the concatenated video. An electronic device, a terminal device and a mobile communication device are also introduced.
    Type: Application
    Filed: August 24, 2022
    Publication date: December 7, 2023
    Inventors: PIN-YU CHOU, YU-NING CHANG, YUEH-HUA LEE, MING-HSIEN WU, YU-SYUAN HUANG
  • Publication number: 20230396869
    Abstract: A dynamic image processing method is executed by an electronic device communicating with a photographing device and reading an executable code to identify a preset object by using artificial intelligence, and perform dynamic image processing for the preset object. The method includes the steps of identifying the preset object, image filtering and forming a concatenated video. In the step of image filtering, a filter condition is set, the filter condition includes detecting a movement variable of the preset object in the initial image, and when the filter condition meets a threshold, a catch moment in the initial image is selected. In the step of forming a concatenated video, at least one video clip in the initial image is selected according to the catch moment, and the video clip is assembled to form the concatenated video. The present disclosure also provides an electronic device and a terminal device.
    Type: Application
    Filed: October 26, 2022
    Publication date: December 7, 2023
    Inventors: PIN-YU CHOU, YUEH-HUA LEE, YU-NING CHANG, MING-HSIEN WU, YU-SYUAN HUANG
  • Patent number: 11837628
    Abstract: A display array including a semiconductor stacked layer, an insulating layer, a plurality of electrode pads, and a driving backplane is provided. The semiconductor stacked layer has a plurality of light emitting regions arranged along a reference plane. The insulating layer is disposed to an outer surface of the semiconductor stacked layer and contacts the semiconductor stacked layer. The insulating layer has a plurality of openings respectively corresponding to the plurality of light emitting regions. The electrode pads are disposed to the insulating layer and are respectively electrically connect the plurality of light emitting regions through the plurality of openings. The driving backplane is disposed to the semiconductor stacked layer and electrically connected to the plurality of electrode pads, wherein a light emitting material layer of the semiconductor stacked layer has consistency along an extension direction of the reference plane.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: December 5, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Hsien Wu, Chia-Hsin Chao, Yen-Hsiang Fang