Patents by Inventor Ming-Hua Chang

Ming-Hua Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240290869
    Abstract: A method of forming a gas spacer in a semiconductor device and a semiconductor device including the same are disclosed. In accordance with an embodiment, a method includes forming a gate stack over a substrate; forming a first gate spacer on sidewalls of the gate stack; forming a second gate spacer on sidewalls of the first gate spacer; removing the second gate spacer using an etching process to form a first opening, the etching process being performed at a temperature less than 0° C., the etching process using an etching solution including hydrogen fluoride; and depositing a dielectric layer over the first gate spacer and the gate stack, the dielectric layer sealing a gas spacer in the first opening.
    Type: Application
    Filed: April 23, 2024
    Publication date: August 29, 2024
    Inventors: Chen-Huang Huang, Ming-Jhe Sie, Cheng-Chung Chang, Shao-Hua Hsu, Shu-Uei Jang, An Chyi Wei, Shiang-Bau Wang, Ryan Chia-Jen Chen
  • Patent number: 12068322
    Abstract: An embodiment includes a first fin extending from a substrate. The device also includes a first gate stack over and along sidewalls of the first fin. The device also includes a first gate spacer disposed along a sidewall of the first gate stack. The device also includes a first epitaxial source/drain region in the first fin and adjacent the first gate spacer, an outer surface of the epitaxial first source/drain region having more than eight facets in a first plane, the first plane being orthogonal to a top surface of the substrate.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: August 20, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Han-Yu Tang, Hung-Tai Chang, Ming-Hua Yu, Yee-Chia Yeo
  • Publication number: 20240266435
    Abstract: A transistor with an embedded insulating structure set includes a substrate. A gate is disposed on the substrate. A first lightly doped region is disposed at one side of the gate. A second lightly doped region is disposed at another side of the gate. The first lightly doped region and the second lightly doped region have the same conductive type. The first lightly doped region is symmetrical to the second lightly doped region. A first source/drain doped region is disposed within the first lightly doped region. A second source/drain doped region is disposed within the second lightly doped region. A first insulating structure set is disposed within the first lightly doped region and the first source/drain doped region. The first insulating structure set includes an insulating block embedded within the substrate. A sidewall of the insulating block contacts the gate dielectric layer.
    Type: Application
    Filed: March 13, 2023
    Publication date: August 8, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Hua Tsai, Chin-Chia Kuo, Wei-Hsuan Chang
  • Patent number: 12040392
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a patterned mask on the buffer layer; using the patterned mask to remove the buffer layer for forming ridges and a damaged layer on the ridges; removing the damaged layer; forming a barrier layer on the ridges; and forming a p-type semiconductor layer on the barrier layer.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: July 16, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Wen Su, Ming-Hua Chang, Shui-Yen Lu
  • Patent number: 12040393
    Abstract: A high electron mobility transistor (HEMT) includes a buffer layer on a substrate, ridges extending along a first direction on the buffer layer, gaps extending along the first direction between the ridges, a p-type semiconductor layer extending along a second direction on the ridges and inserted into the gaps, and a source electrode and a drain electrode adjacent to two sides of the p-type semiconductor layer. Preferably, the source electrode and the drain electrode are extending along the second direction and directly on top of the ridges.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: July 16, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Wen Su, Ming-Hua Chang, Shui-Yen Lu
  • Patent number: 12039919
    Abstract: An electronic device includes: a circuit board; a plurality of diodes disposed on a first surface of the circuit board; a plurality of first driving circuits disposed on the first surface of the circuit board and electrically connected to the plurality of diodes; and a plurality of second driving circuits electrically connected to the plurality of first driving circuits, wherein a part of the plurality of second driving circuits are disposed on a first substrate, and another part of the second driving circuits are disposed on a second substrate.
    Type: Grant
    Filed: April 5, 2023
    Date of Patent: July 16, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Yi-Hua Hsu, Ker-Yih Kao, Ming-Chun Tseng, Mu-Fan Chang, Wen-Lin Huang
  • Publication number: 20240222133
    Abstract: A fabricating method of a high electron mobility transistor includes providing a substrate. Then, a channel layer, an active layer, a P-type group III-V compound material layer, a metal compound material layer, a hard mask material layer and a patterned photoresist are formed to cover the substrate. Later, a dry etching process is performed to etch the hard mask material layer and the metal compound material layer to form a hard mask and a metal compound layer by taking the patterned photoresist as a mask. During the dry etching process, a spacer generated by by-products is formed to surround the patterned photoresist, the hard mask and the metal compound layer. After the dry etching process, the P-type group III-V compound material layer is etched by taking the spacer and the patterned photoresist as a mask.
    Type: Application
    Filed: March 19, 2024
    Publication date: July 4, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Hua Chang, Kun-Yuan Liao, Lung-En Kuo, Chih-Tung Yeh
  • Patent number: 12002681
    Abstract: A fabricating method of a high electron mobility transistor includes providing a substrate. Then, a channel layer, an active layer, a P-type group III-V compound material layer, a metal compound material layer, a hard mask material layer and a patterned photoresist are formed to cover the substrate. Later, a dry etching process is performed to etch the hard mask material layer and the metal compound material layer to form a hard mask and a metal compound layer by taking the patterned photoresist as a mask. During the dry etching process, a spacer generated by by-products is formed to surround the patterned photoresist, the hard mask and the metal compound layer. After the dry etching process, the P-type group III-V compound material layer is etched by taking the spacer and the patterned photoresist as a mask.
    Type: Grant
    Filed: October 31, 2021
    Date of Patent: June 4, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Hua Chang, Kun-Yuan Liao, Lung-En Kuo, Chih-Tung Yeh
  • Publication number: 20240088279
    Abstract: A method for forming a semiconductor structure includes the steps of forming a stacked structure on a substrate, forming an insulating layer on the stacked structure, forming a passivation layer on the insulating layer, performing an etching process to form an opening through the passivation layer and the insulating layer to expose a portion of the stacked structure and an extending portion of the insulating layer, and forming a contact structure filling the opening and directly contacting the stacked structure, wherein the extending portion of the insulating layer is adjacent to a surface of the stacked structure directly contacting the contact structure.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 14, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Hua Chang, Po-Wen Su, Chih-Tung Yeh
  • Publication number: 20230112917
    Abstract: A fabricating method of a high electron mobility transistor includes providing a substrate. Then, a channel layer, an active layer, a P-type group III-V compound material layer, a metal compound material layer, a hard mask material layer and a patterned photoresist are formed to cover the substrate. Later, a dry etching process is performed to etch the hard mask material layer and the metal compound material layer to form a hard mask and a metal compound layer by taking the patterned photoresist as a mask. During the dry etching process, a spacer generated by by-products is formed to surround the patterned photoresist, the hard mask and the metal compound layer. After the dry etching process, the P-type group III-V compound material layer is etched by taking the spacer and the patterned photoresist as a mask.
    Type: Application
    Filed: October 31, 2021
    Publication date: April 13, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Hua Chang, Kun-Yuan Liao, Lung-En Kuo, Chih-Tung Yeh
  • Publication number: 20230102890
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a patterned mask on the buffer layer; using the patterned mask to remove the buffer layer for forming ridges and a damaged layer on the ridges; removing the damaged layer; forming a barrier layer on the ridges; and forming a p-type semiconductor layer on the barrier layer.
    Type: Application
    Filed: December 6, 2022
    Publication date: March 30, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Wen Su, Ming-Hua Chang, Shui-Yen Lu
  • Publication number: 20230100904
    Abstract: A high electron mobility transistor (HEMT) includes a buffer layer on a substrate, ridges extending along a first direction on the buffer layer, gaps extending along the first direction between the ridges, a p-type semiconductor layer extending along a second direction on the ridges and inserted into the gaps, and a source electrode and a drain electrode adjacent to two sides of the p-type semiconductor layer. Preferably, the source electrode and the drain electrode are extending along the second direction and directly on top of the ridges.
    Type: Application
    Filed: December 6, 2022
    Publication date: March 30, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Wen Su, Ming-Hua Chang, Shui-Yen Lu
  • Patent number: 11552187
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a patterned mask on the buffer layer; using the patterned mask to remove the buffer layer for forming ridges and a damaged layer on the ridges; removing the damaged layer; forming a barrier layer on the ridges; and forming a p-type semiconductor layer on the barrier layer.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: January 10, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Wen Su, Ming-Hua Chang, Shui-Yen Lu
  • Publication number: 20220367693
    Abstract: A semiconductor structure includes a substrate, a stacked structure on the substrate, an insulating layer on the stacked structure, a passivation layer on the insulating layer, and a contact structure through the passivation layer and the insulating layer and directly contacting the stacked structure. The insulating layer has an extending portion protruding from a sidewall of the passivation layer and adjacent to a surface of the stacked structure directly contacting the contact structure.
    Type: Application
    Filed: August 9, 2021
    Publication date: November 17, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Hua Chang, Po-Wen Su, Chih-Tung Yeh
  • Publication number: 20210249529
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a patterned mask on the buffer layer; using the patterned mask to remove the buffer layer for forming ridges and a damaged layer on the ridges; removing the damaged layer; forming a barrier layer on the ridges; and forming a p-type semiconductor layer on the barrier layer.
    Type: Application
    Filed: March 4, 2020
    Publication date: August 12, 2021
    Inventors: Po-Wen Su, Ming-Hua Chang, Shui-Yen Lu
  • Publication number: 20200003961
    Abstract: For a fiber optic connector including a casing sleeve receiving a ferrule with guide pins, a pin removal device includes a housing unit, a releasing unit and a removal member. The housing unit includes a receiving space to receive the guide pins. The releasing unit is to operate the pin retainer such that the pin retainer disengages from the guide pins, and is extendable through the housing unit into the casing sleeve. The removal member is inserted into the receiving space to clamp the guide pins and is movable relative to the housing unit to pull the guide pins and release the same from the pin retainer when the releasing unit operates the pin retainer to disengage from the guide pins.
    Type: Application
    Filed: November 29, 2018
    Publication date: January 2, 2020
    Inventors: Ming-Hua CHANG, Yen-Chang LEE
  • Publication number: 20190380173
    Abstract: A heating system includes a closed pipe for flowing kerosene, the closed pipe including lengthwise conductive ridges on an inner surface; a pump being in fluid communication with kerosene; heating assemblies each including an insulation cylinder put on a portion of the closed pipe, and a heating coil wound on the insulation cylinder for heating the kerosene; and a plurality of electric power sources each electrically connected to the heating coil.
    Type: Application
    Filed: May 28, 2019
    Publication date: December 12, 2019
    Inventor: Ming-Hua Chang
  • Patent number: 10185099
    Abstract: An optical fiber connector includes a housing unit and an operating unit. The housing unit includes a resilient retaining arm member. The operating unit includes a pivot seat, a hook member pivotally connected to the pivot seat, rotatable relative to the pivot seat, and having a front end that abuts against the resilient retaining arm member, and an operating rod pivotally connected to a rear end of the hook member. When the operating rod is pulled rearwardly, the hook member is driven to pivotally rotate relative to the pivot seat such that, the hook member presses and moves the rear end of the resilient retaining arm member, so as to deform the resilient retaining arm member, thereby allowing for removal of an adapter from the optical fiber connector.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: January 22, 2019
    Assignee: GLORIOLE ELECTROPTIC TECHNOLOGY CORP.
    Inventors: Ming-Hua Chang, Tung-Chun Huang
  • Publication number: 20180364421
    Abstract: A fiber optic connector includes a housing body, a spring push, a connecting plug, a sleeve and a conversion unit. The spring push and the connecting plug are disposed in the housing body. The sleeve is sleeved on the housing body. The conversion unit includes a clamping member and two guide pins. The clamping member is disposed in the housing body, and has two clamping portions. The clamping portions are switchable between a clamping state, in which the guide pins are clamped by the clamping portions and protrude from the connecting plug, and a non-clamping state, in which the guide pins are released from the clamping portions and removed from the connecting plug.
    Type: Application
    Filed: September 25, 2017
    Publication date: December 20, 2018
    Inventors: Ming-Hua CHANG, Yen-Chang LEE
  • Patent number: 9966468
    Abstract: A method for fabricating semiconductor device is disclosed. First, a fin-shaped structure is formed on a substrate, a first liner is formed on the substrate and the fin-shaped structure, a second liner is formed on the first liner, part of the second liner and part of the first liner are removed to expose a top surface of the fin-shaped structure, part of the first liner between the fin-shaped structure and the second liner is removed to form a recess, and an epitaxial layer is formed in the recess.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: May 8, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Tien-Chen Chan, Yi-Fan Li, Li-Wei Feng, Ming-Hua Chang, Yu-Shu Lin, Shu-Yen Chan