Patents by Inventor Ming-Jen Liang
Ming-Jen Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150193340Abstract: A data writing method for a rewritable non-volatile memory module having a plurality of physical erasing units, and a memory control circuit unit and the memory storage apparatus are provided. The method includes grouping the physical erasing units into at least a data area, a backup area and a spare area; and setting a value obtained by summing a minimum threshold and a predetermined number as a garbage collecting threshold. The data writing method also includes getting at least one physical erasing unit from the spare area, writing data into the gotten physical erasing unit, associating the gotten physical erasing unit with the backup area and re-adjusting the garbage collecting threshold according to the number of physical erasing units associated with the backup area and the minimum threshold.Type: ApplicationFiled: March 26, 2014Publication date: July 9, 2015Applicant: PHISON ELECTRONICS CORP.Inventor: Ming-Jen Liang
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Patent number: 9063888Abstract: A method of loading a program code from a rewritable non-volatile memory module is provided, wherein the program code includes data segments and two program code copies corresponding to the program code are stored in the rewritable non-volatile memory module. The method includes loading a first data segment of a first program code copy and determining whether the first data segment contains any uncorrectable error bit. The method still includes, when the first data segment does not contain any uncorrectable error bit, loading a second data segment of the first program code copy. The method further includes, when the first data segment contains an uncorrectable error bit, loading a first data segment of a second program code copy, and then loading a second data segment of the first program code copy or the second program code copy. Thereby, the program code can be successfully loaded.Type: GrantFiled: August 2, 2011Date of Patent: June 23, 2015Assignee: PHISON ELECTRONICS CORP.Inventor: Ming-Jen Liang
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Publication number: 20150161042Abstract: A memory management method, a memory controlling circuit unit and a memory storage device are provided. The method includes: configuring a plurality of super physical erasing units, wherein each of the super physical erasing units includes at least two physical erasing units. A first super physical erasing unit includes a first physical erasing unit and a second physical erasing unit that belong to different operation units. The first physical erasing unit and the second physical erasing unit store different parts of first data. The physical erasing unit storing least valid data from each operation unit is selected for executing a garbage collection procedure. Accordingly, an efficiency of the garbage collection procedure is increased.Type: ApplicationFiled: January 22, 2014Publication date: June 11, 2015Applicant: PHISON ELECTRONICS CORP.Inventors: Ming-Jen Liang, Kheng-Chong Tan
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Publication number: 20150134887Abstract: A data writing method for a rewritable non-volatile memory module having a plurality of physical erasing units, and a memory control circuit unit and the memory storage apparatus are provided. The method includes: grouping the physical erasing units into at least a data area and a spare area; configuring a plurality of logical units for mapping to the physical erasing units of the data area; and dynamically reserving a predetermined number of physical erasing units dedicating to write sequential data. Accordingly, the method can fast write the sequential data with the page-based memory management.Type: ApplicationFiled: January 28, 2014Publication date: May 14, 2015Applicant: PHISON ELECTRONICS CORP.Inventor: Ming-Jen Liang
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Patent number: 9009389Abstract: A memory management table processing method for storing a plurality of entries belonging to a plurality of memory management tables into a buffer memory of a memory storage apparatus is provided, wherein each of the entries has at least one invalid bit. The present method includes following steps. An area corresponding to each of the memory management tables is configured in the buffer memory. Invalid bit information corresponding to each of the memory management tables is recorded. The invalid bit in each of the entries is removed according to the invalid bit information corresponding to each of the memory management tables, so as to generate a valid data stream corresponding to each of the entries. Each of the valid data streams is written into the corresponding area in the buffer memory. Accordingly, the storage space of the buffer memory can be efficiently utilized.Type: GrantFiled: August 21, 2011Date of Patent: April 14, 2015Assignee: Phison Electronics Corp.Inventors: Wei-Chen Teo, Ming-Jen Liang, Chih-Kang Yeh
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Patent number: 8966344Abstract: A data protecting method, a memory controller, and a memory storage device are provided. The data protecting method includes following steps. A first flush command and a first write command instructing to write a first data are received from a host system. A first error correcting code and a corresponding second error correcting code having different protection capabilities are generated according to the first data. A second write command instructing to write a second data is received. After the first write command is received, a second flush command is received from the host system, and the second error correcting code corresponding to the first data is then written into a rewritable non-volatile memory module. A second error correcting code corresponding to the second data is not generated or is generated but not written into the rewritable non-volatile memory module. Thereby, data from the host system is protected.Type: GrantFiled: August 2, 2013Date of Patent: February 24, 2015Assignee: Phison Electronics Corp.Inventor: Ming-Jen Liang
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Publication number: 20140372667Abstract: A data writing method for a rewritable non-volatile memory module is provided. The method includes receiving a write command and data corresponding to the write command from a host system and temporarily storing the data into a buffer memory, and the data includes a plurality of sub-data streams. The method still includes transmitting the sub-data streams into the rewritable non-volatile memory module, thereby writing the sub-data streams into at least one physical erasing unit of the rewritable non-volatile memory module. The method further includes generating parity information based on at least portion of the sub-data streams; storing the parity information into the buffer memory and deleting the data from the buffer memory. Accordingly, the method can effectively utilize the storage space of the buffer memory.Type: ApplicationFiled: August 5, 2013Publication date: December 18, 2014Applicant: PHISON ELECTRONICS CORP.Inventors: Kheng-Chong Tan, Ming-Jen Liang
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Publication number: 20140372833Abstract: A data protecting method, a memory controller, and a memory storage device are provided. The data protecting method includes following steps. A first flush command and a first write command instructing to write a first data are received from a host system. A first error correcting code and a corresponding second error correcting code having different protection capabilities are generated according to the first data. A second write command instructing to write a second data is received. After the first write command is received, a second flush command is received from the host system, and the second error correcting code corresponding to the first data is then written into a rewritable non-volatile memory module. A second error correcting code corresponding to the second data is not generated or is generated but not written into the rewritable non-volatile memory module. Thereby, data from the host system is protected.Type: ApplicationFiled: August 2, 2013Publication date: December 18, 2014Applicant: Phison Electronics Corp.Inventor: Ming-Jen Liang
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Publication number: 20140337681Abstract: A data writing method, a memory storage device, and a memory controller for controlling a rewritable non-volatile memory module are provided. The rewritable non-volatile memory module includes at least one memory chip, and each memory chip includes a plurality of physical erasing units. The data writing method includes following steps. A data is written into at least one first physical erasing unit. A first error correction code and a second error correction code are respectively generated according to the data, where a number of bits correctable to the second error correction code is greater than a number of bits correctable to the first error correction code. The second error correction code is written into a second physical erasing unit. The first physical erasing unit and the second physical erasing unit belong to the same memory chip. Thereby, the memory space can be efficiently used.Type: ApplicationFiled: July 11, 2013Publication date: November 13, 2014Inventor: Ming-Jen Liang
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Publication number: 20140331033Abstract: A firmware code loading method for loading a firmware code from a rewritable non-volatile memory module of a memory storage apparatus is provided. The method includes: obtaining a storage address for storing a first portion firmware code copy corresponding to a first portion of the firmware code in a first memory part; and obtaining a storage address for storing a second portion firmware code copy corresponding to a second portion of the firmware code in a second memory part. The method further includes: using a parallel mode or a interleave mode to load the first portion firmware code copy and the second portion firmware code copy respectively from the first memory part and the second memory part into a buffer memory. Accordingly, the method can effectively shorten the time of loading the firmware code.Type: ApplicationFiled: June 24, 2013Publication date: November 6, 2014Inventor: Ming-Jen Liang
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Patent number: 8729432Abstract: A capacitance sensing switch module is provided. The capacitance sensing switch module for controlling a cooktop includes a plate, at least one key, an insulating pad, a circuit board and at least one foil. The plate is disposed in a side of the cooktop and has at least one hole passing through the plate. The key is disposed in the hole. The insulating pad is disposed between the key and the plate. The key and the plate are separated by the insulating pad. The circuit board is disposed under the plate. The foil is disposed on the circuit board and on the position corresponding to the key. There is an insulation gap between the foil and the key.Type: GrantFiled: August 24, 2011Date of Patent: May 20, 2014Assignee: Delta Electronics, Inc.Inventors: I-Shen Lin, Ming-Jen Liang, Yu-Tang Liu
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Patent number: 8508499Abstract: A touch sensing circuit is provided. Signal generators output a pulse signal according to a control signal. Touch detection circuits are arranged as an array, generating a sensing signal according a touch event and the pulse signal. The touch detection circuits in the same row are coupled to the same signal generator. The sensing circuits are respectively coupled to the touch detection circuits in the same column, generating an output signal according to the sensing signal. The controller receives the output signal, outputs the control signal to control one of the signal generators outputting the pulse signal, and detects the touch detection circuit corresponding to the touch event according to the output control signal and the output signal.Type: GrantFiled: June 11, 2010Date of Patent: August 13, 2013Assignee: Delta Electronics, Inc.Inventor: Ming-Jen Liang
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Publication number: 20120324205Abstract: A memory management table processing method for storing a plurality of entries belonging to a plurality of memory management tables into a buffer memory of a memory storage apparatus is provided, wherein each of the entries has at least one invalid bit. The present method includes following steps. An area corresponding to each of the memory management tables is configured in the buffer memory. Invalid bit information corresponding to each of the memory management tables is recorded. The invalid bit in each of the entries is removed according to the invalid bit information corresponding to each of the memory management tables, so as to generate a valid data stream corresponding to each of the entries. Each of the valid data streams is written into the corresponding area in the buffer memory. Accordingly, the storage space of the buffer memory can be efficiently utilized.Type: ApplicationFiled: August 21, 2011Publication date: December 20, 2012Applicant: PHISON ELECTRONICS CORP.Inventors: Wei-Chen Teo, Ming-Jen Liang, Chih-Kang Yeh
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Publication number: 20120297115Abstract: A method of loading a program code from a rewritable non-volatile memory module is provided, wherein the program code includes data segments and two program code copies corresponding to the program code are stored in the rewritable non-volatile memory module. The method includes loading a first data segment of a first program code copy and determining whether the first data segment contains any uncorrectable error bit. The method still includes, when the first data segment does not contain any uncorrectable error bit, loading a second data segment of the first program code copy. The method further includes, when the first data segment contains an uncorrectable error bit, loading a first data segment of a second program code copy, and then loading a second data segment of the first program code copy or the second program code copy. Thereby, the program code can be successfully loaded.Type: ApplicationFiled: August 2, 2011Publication date: November 22, 2012Applicant: PHISON ELECTRONICS CORP.Inventor: Ming-Jen Liang
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Publication number: 20120234822Abstract: A capacitance sensing switch module is provided. The capacitance sensing switch module for controlling a cooktop includes a plate, at least one key, an insulating pad, a circuit board and at least one foil. The plate is disposed in a side of the cooktop and has at least one hole passing through the plate. The key is disposed in the hole. The insulating pad is disposed between the key and the plate. The key and the plate are separated by the insulating pad. The circuit board is disposed under the plate. The foil is disposed on the circuit board and on the position corresponding to the key. There is an insulation gap between the foil and the key.Type: ApplicationFiled: August 24, 2011Publication date: September 20, 2012Applicant: DELTA ELECTRONICS, INC.Inventors: I-Shen LIN, Ming-Jen LIANG, Yu-Tang LIU
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Patent number: 8037233Abstract: A system, a controller, and a method for data storage are provided. The system includes a first storage unit, a second storage unit, and a controller. The first storage unit comprises a single-layer structure for storing data, and the second storage unit comprises a multi-layer structure for storing data. The controller is coupled to the first storage unit, the second storage unit, and a host and controls the host to set the first storage unit as a master storage device and set the second storage unit as a slave storage device. As a result, the host can recognize the first storage unit and the second storage unit as two independent storage devices for storing data. Thereby, the data storage process can be simplified.Type: GrantFiled: July 18, 2008Date of Patent: October 11, 2011Assignee: Phison Electronics Corp.Inventors: Khein-Seng Pua, Chung-Hsun Ma, Ming-Jen Liang, Cheng-Chi Hsieh, Chih-Ling Wang
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Publication number: 20110231621Abstract: A system recovery method is provided. The system recovery method includes grouping storage addresses corresponding to a storage device into a first memory area and a second memory area. The system recovery method also includes storing initial data from a host system into the storage addresses of the first memory area, storing update data for updating the initial data into the storage addresses of the second memory area, and establishing an address corresponding table to record update information corresponding to the storage addresses for storing the update data. The system recovery method further includes erasing the update information from the address corresponding table when the storage device is powered off and re-coupled to the host system. Thereby, the system recovery method can instantly recover system settings.Type: ApplicationFiled: May 11, 2010Publication date: September 22, 2011Applicant: PHISON ELECTRONICS CORP.Inventor: Ming-Jen Liang
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Publication number: 20110155477Abstract: A touch sensing circuit is provided. Signal generators output a pulse signal according to a control signal. Touch detection circuits are arranged as an array, generating a sensing signal according a touch event and the pulse signal. The touch detection circuits in the same row are coupled to the same signal generator. The sensing circuits are respectively coupled to the touch detection circuits in the same column, generating an output signal according to the sensing signal. The controller receives the output signal, outputs the control signal to control one of the signal generators outputting the pulse signal, and detects the touch detection circuit corresponding to the touch event according to the output control signal and the output signal.Type: ApplicationFiled: June 11, 2010Publication date: June 30, 2011Inventor: Ming-Jen LIANG
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Patent number: 7949929Abstract: A controller for controlling an access of a non-volatile memory having an error-correcting code area and a data area is provided. The controller includes an error-correcting module and a first inverting circuit electrically connected to the error-correcting module for inverting data and error-correcting codes corresponding to the data. When the controller both writes all 0xFF data in the data area and writes all 0xFF error-correcting codes in the error-correcting code area, the first inverting circuit inverts the all 0xFF data and the all 0xFF error-correcting codes into all 0x00 data and all 0x00 error-correcting codes, respectively.Type: GrantFiled: June 5, 2007Date of Patent: May 24, 2011Assignee: Phison Electronics Corp.Inventors: Ming-Jen Liang, Wee-Kuan Gan, Chih-Jen Hsu
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Publication number: 20090198877Abstract: A system, a controller, and a method for data storage are provided. The system includes a first storage unit, a second storage unit, and a controller. The first storage unit comprises a single-layer structure for storing data, and the second storage unit comprises a multi-layer structure for storing data. The controller is coupled to the first storage unit, the second storage unit, and a host and controls the host to set the first storage unit as a master storage device and set the second storage unit as a slave storage device. As a result, the host can recognize the first storage unit and the second storage unit as two independent storage devices for storing data. Thereby, the data storage process can be simplified.Type: ApplicationFiled: July 18, 2008Publication date: August 6, 2009Applicant: PHISON ELECTRONICS CORP.Inventors: Khein-Seng Pua, Chung-Hsun Ma, Ming-Jen Liang, Cheng-Chi Hsieh, Chih-Ling Wang