Patents by Inventor Ming-Jen Liang

Ming-Jen Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080071968
    Abstract: A method of managing blocks of a flash memory device suitable for a flexible correspondence between logic blocks and physical blocks of the flash memory device is provided. First, a sum of good physical blocks and defective physical blocks is calculated. Next, the good physical blocks and the defective physical blocks are distributed into a number of predetermined sectors of a flash memory, wherein each predetermined sector has a predetermined number of temporary blocks in order to equalize the sum of logic blocks and the temporary blocks with the physical blocks in each predetermined sector. The distribution information is recorded into a good physical block. When executing to initialize said flash memory, a control chip locates and reads the block where the distribution information is stored and stores the distribution information into a SRAM of said control chip to create a block correspondence chart in the predetermined sector to manage said flash memory.
    Type: Application
    Filed: September 18, 2006
    Publication date: March 20, 2008
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Ming-Jen Liang, Chu-Cheng Liang
  • Publication number: 20070266297
    Abstract: A controller for controlling an access of a non-volatile memory having an error-correcting code area and a data area is provided. The controller includes an error-correcting module and a first inverting circuit electrically connected to the error-correcting module for inverting data and error-correcting codes corresponding to the data. When the controller both writes all 0×FF data in the data area and writes all 0×FF error-correcting codes in the error-correcting code area, the first inverting circuit inverts the all 0×FF data and the all 0×FF error-correcting codes into all 0×00 data and all 0×00 error-correcting codes, respectively.
    Type: Application
    Filed: June 5, 2007
    Publication date: November 15, 2007
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Ming-Jen Liang, Wee-Kuan Gan, Chih-Jen Hsu
  • Publication number: 20050138314
    Abstract: The write-protected micro memory device of the present invention comprises at least one flash memory that is divided into one or multiple blocks, and the single chip flash memory controller has a write-protected parameter. The write-protect parameter can be set particularly for protecting data of certain block(s) of the flash memory. The memory device is connected to a host, such as a computer or card reader, through an interface circuit, to enable the host to retrieve data or program from the flash memory. The single chip flash memory controller prohibits the host to store or write data into the write-protected block(s) according to the preset write-protect parameter. Accordingly, the present invention do not require altering of the hardware structure or circuit connection of the memory device, but rather merely proposes to set up the write-protect parameter into the single chip flash memory controller to mark any block for substantially protecting the data or program therein.
    Type: Application
    Filed: December 23, 2003
    Publication date: June 23, 2005
    Inventors: Ming-Jen Liang, Soo-Ching Ng