Patents by Inventor Ming-Jer Kao

Ming-Jer Kao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10541233
    Abstract: A display device including a circuit substrate, a plurality of pixels, and a light-shielding layer is provided. The pixels include a plurality of light-emitting elements. The light-emitting elements are disposed on the circuit substrate and are electrically connected to the circuit substrate. The light-emitting elements in the pixels are arranged along an arrangement direction. The light-shielding layer is disposed on the circuit substrate and has a plurality of pixel apertures. The pixels are disposed in a corresponding pixel aperture. The light-shielding layer includes a plurality of first light-shielding patterns extending in the arrangement direction and a plurality of second light-shielding patterns connected to the first light-shielding patterns. The extending direction of the second light-shielding patterns is different from the extending direction of the first light-shielding patterns.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: January 21, 2020
    Assignees: Industrial Technology Research Institute, Macroblock, Inc.
    Inventors: Po-Hsun Wang, Chia-Hsin Chao, Ming-Hsien Wu, Yen-Hsiang Fang, Chien-Chung Lin, Ming-Jer Kao, Feng-Pin Chang
  • Publication number: 20190198483
    Abstract: A display device including a circuit substrate, a plurality of pixels, and a light-shielding layer is provided. The pixels include a plurality of light-emitting elements. The light-emitting elements are disposed on the circuit substrate and are electrically connected to the circuit substrate. The light-emitting elements in the pixels are arranged along an arrangement direction. The light-shielding layer is disposed on the circuit substrate and has a plurality of pixel apertures. The pixels are disposed in a corresponding pixel aperture. The light-shielding layer includes a plurality of first light-shielding patterns extending in the arrangement direction and a plurality of second light-shielding patterns connected to the first light-shielding patterns. The extending direction of the second light-shielding patterns is different from the extending direction of the first light-shielding patterns.
    Type: Application
    Filed: March 26, 2018
    Publication date: June 27, 2019
    Applicants: Industrial Technology Research Institute, Macroblock, Inc.
    Inventors: Po-Hsun Wang, Chia-Hsin Chao, Ming-Hsien Wu, Yen-Hsiang Fang, Chien-Chung Lin, Ming-Jer Kao, Feng-Pin Chang
  • Patent number: 7800937
    Abstract: A method for writing a memory cell of a magnetoresistive random access memory (MRAM) device includes, sequentially, providing a first magnetic field in a first direction, providing a second magnetic field in a second direction substantially perpendicular to the first direction, turning off the first magnetic field, providing a third magnetic field in a third direction opposite to the first direction, turning off the second magnetic field, and turning off the third magnetic field. A method for switching magnetic moments in an MRAM memory cell includes providing a magnetic field in a direction forming a blunt angle with a direction of a bias magnetic field. A method for reading an MRAM device includes partially switching magnetic moments in a reference memory cell to generate a reference current; measuring a read current through a memory cell to be read; and comparing the read current with the reference current.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: September 21, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Yuan-Jen Lee, Lien-Chang Wang
  • Patent number: 7577019
    Abstract: A multi-bit magnetic memory cell in a stacked structure controlled by at least one read bit line and one read word line is provided. The multi-bit magnetic memory cell includes at least two magnetic memory units and a switching device. Each magnetic memory unit has a magneto-resistance value and at least the two magnetic memory units are stacked to form a circuit of serial connection or parallel connection. The circuit and the read bit line are connected. The switching device is connected to the circuit, wherein the switching device is controlled by the read word line to be conducting or non-conducting so as to connect the circuit with a ground voltage. Furthermore, a plurality of the multi-bit magnetic cells is used to form a magnetic memory device.
    Type: Grant
    Filed: September 12, 2007
    Date of Patent: August 18, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Yuan-Jen Lee
  • Patent number: 7577017
    Abstract: A method for accessing a memory cell of a magnetoresistive random access memory (MRAM) device, where the memory cell includes a plurality of memory units, includes writing the memory cell by identifying ones of the memory units having stored therein a datum different from a datum to be written thereto; and simultaneously writing all of the ones of the memory units. An MRAM device includes a plurality of write word lines, a plurality of write bit lines, and a plurality of memory cells. Each memory cell includes a plurality of memory units. Each memory unit includes a free magnetic region having one or more easy axes non-perpendicular to the write bit lines and non-perpendicular to the write word lines, a pinned magnetic region, and a tunneling barrier between the free magnetic region and the pinned magnetic region.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: August 18, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Yuan-Jen Lee
  • Patent number: 7539049
    Abstract: A magnetic random access memory includes at least a first-direction write current line and multiple second-direction write current line, intersecting with the first-direction write current line in substantial perpendicular and forming several intersecting regions. Multiple magnetic memory cells are respectively located at the intersecting regions for receiving an induced magnetic field in a time sequence. Every at least two adjacent memory cells are in parallel or series connection, to form at least one memory unit. An easy axis of a free layer of each magnetic memory cell is substantially perpendicular to a magnetization of a pinned layer. The easy axis and the first-direction write current line form an including angle of about 45°. A read bit-line circuit connects to a first terminal of the memory unit. A read word-line circuit connects to a second terminal of the memory unit.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: May 26, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Ding-Yeong Wang, Yuan-Jen Lee
  • Patent number: 7535081
    Abstract: A metal nanoline process and applications on growth of aligned nanostructures thereof. A nano-structure is provided with a substrate with at least one nanodimensional metal catalyst line disposed thereon and at least one carbon nanotube or silicon nanowire extending along an end of the metal catalyst line.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: May 19, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Jiunn Lai, Jeng-Hua Wei, Hung-Hsiang Wang, Po-Yuan Lo, Ming-Jer Kao
  • Patent number: 7515458
    Abstract: A magnetic memory cell, used in a magnetic memory device, includes a stacked magnetic pinned layer, serving as a part of the base structure. The stacked magnetic pinned stacked layer has a top pinned layer and a bottom pinned layer, between which there is a sufficient large magnetic coupling force to maintain magnetization of the top pinned layer on a reference direction. A tunnel barrier layer is disposed on the stacked magnetic pinned layer. A magnetic free stacked layer is disposed on the tunnel barrier layer. The magnetic free stacked layer includes a bottom free layer having a bottom magnetization and a top free layer having a top magnetization. When no assisted magnetic field is applied, the bottom magnetization is anti-parallel to the top magnetization and is perpendicular to the reference direction on the top pinned layer. A magnetic bias layer can be also disposed on the top free layer.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: April 7, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Yung-Hsiang Chen, Ming-Jer Kao, Yuan-Jen Lee, Yung-Hung Wang
  • Patent number: 7515462
    Abstract: A writing method for a magnetic memory cell which has a magnetic free stack layer with a bi-directional easy axis. A magnetic X axis and a magnetic Y axis are taken as reference directions, and the bi-directional easy axis is substantially on the magnetic X axis. The method includes applying a first magnetic field in a first direction of the magnetic Y axis. Then, a second magnetic field added onto the first magnetic field is applied in a first direction of the magnetic X axis. Next, the application of the first magnetic field is terminated. Thereafter, a third magnetic field is applied on the magnetic Y axis in a second direction opposite to the first direction. The second magnetic field is terminated and the third magnetic field is terminated.
    Type: Grant
    Filed: June 13, 2007
    Date of Patent: April 7, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Yuan-Jen Lee, Ming-Jer Kao
  • Publication number: 20090034322
    Abstract: A magnetic random access memory includes at least a first-direction write current line and multiple second-direction write current line, intersecting with the first-direction write current line in substantial perpendicular and forming several intersecting regions. Multiple magnetic memory cells are respectively located at the intersecting regions for receiving an induced magnetic field in a time sequence. Every at least two adjacent memory cells are in parallel or series connection, to form at least one memory unit. An easy axis of a free layer of each magnetic memory cell is substantially perpendicular to a magnetization of a pinned layer. The easy axis and the first-direction write current line form an including angle of about 45°. A read bit-line circuit connects to a first terminal of the memory unit. A read word-line circuit connects to a second terminal of the memory unit.
    Type: Application
    Filed: November 27, 2007
    Publication date: February 5, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Ding-Yeong Wang, Yuan-Jen Lee
  • Publication number: 20090014705
    Abstract: A phase change memory device is provided. The phase change memory device comprises a substrate. A first conductive layer is formed on the substrate. A heating electrode is formed on the first conductive layer, and electrically connected to the first conductive layer, wherein the heating electrode comprises a carbon nanotube (CNT). A phase change material layer covers the heating electrode. A second conductive layer is formed on the phase change material layer, and electrically connected to the phase change material layer.
    Type: Application
    Filed: May 27, 2008
    Publication date: January 15, 2009
    Applicants: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE, POWERCHIP SEMICONDUCTOR CORP., NANYA TECHNOLOGY CORPORATION, PROMOS TECHNOLOGIES INC., WINBOND ELECTRONICS CORP.
    Inventors: Hong-Hui Hsu, Frederick T. Chen, Ming-Jer Kao
  • Publication number: 20090003043
    Abstract: A method for writing a memory cell of a magnetoresistive random access memory (MRAM) device includes, sequentially, providing a first magnetic field in a first direction, providing a second magnetic field in a second direction substantially perpendicular to the first direction, turning off the first magnetic field, providing a third magnetic field in a third direction opposite to the first direction, turning off the second magnetic field, and turning off the third magnetic field. A method for switching magnetic moments in an MRAM memory cell includes providing a magnetic field in a direction forming a blunt angle with a direction of a bias magnetic field. A method for reading an MRAM device includes partially switching magnetic moments in a reference memory cell to generate a reference current; measuring a read current through a memory cell to be read; and comparing the read current with the reference current.
    Type: Application
    Filed: July 18, 2008
    Publication date: January 1, 2009
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Yuan-Jen Lee, Lien-Chang Wang
  • Patent number: 7463510
    Abstract: A magnetoresistive random access memory (MRAM) device includes a memory cell corresponding to one read bit line, one read word line, one write word line, and two or more write bit lines. The memory cell includes a first memory unit and a second memory unit each corresponding to a respective write bit line. Each of the first and second memory units comprises: a free magnetic region having a first easy axis, a pinned magnetic region having a second easy axis, and a tunneling barrier between the free magnetic region and the pinned magnetic region.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: December 9, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Yuan-Jen Lee, Ming-Jer Kao
  • Publication number: 20080298119
    Abstract: A multi-bit magnetic memory cell in a stacked structure controlled by at least one read bit line and one read word line is provided. The multi-bit magnetic memory cell includes at least two magnetic memory units and a switching device. Each magnetic memory unit has a magneto-resistance value and at least the two magnetic memory units are stacked to form a circuit of serial connection or parallel connection. The circuit and the read bit line are connected. The switching device is connected to the circuit, wherein the switching device is controlled by the read word line to be conducting or non-conducting so as to connect the circuit with a ground voltage. Furthermore, a plurality of the multi-bit magnetic cells is used to form a magnetic memory device.
    Type: Application
    Filed: September 12, 2007
    Publication date: December 4, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Yuan-Jen Lee
  • Patent number: 7420837
    Abstract: A method for writing a memory cell of a magnetoresistive random access memory (MRAM) device includes, sequentially, providing a first magnetic field in a first direction, providing a second magnetic field in a second direction substantially perpendicular to the first direction, turning off the first magnetic field, providing a third magnetic field in a third direction opposite to the first direction, turning off the second magnetic field, and turning off the third magnetic field. A method for switching magnetic moments in an MRAM memory cell includes providing a magnetic field in a direction forming a blunt angle with a direction of a bias magnetic field. A method for reading an MRAM device includes partially switching magnetic moments in a reference memory cell to generate a reference current; measuring a read current through a memory cell to be read; and comparing the read current with the reference current.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: September 2, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Yuan-Jen Lee, Lien-Chang Wang
  • Publication number: 20080198648
    Abstract: A writing method for a magnetic memory cell which has a magnetic free stack layer with a bi-directional easy axis. A magnetic X axis and a magnetic Y axis are taken as reference directions, and the bi-directional easy axis is substantially on the magnetic X axis. The method includes applying a first magnetic field in a first direction of the magnetic Y axis. Then, a second magnetic field added onto the first magnetic field is applied in a first direction of the magnetic X axis. Next, the application of the first magnetic field is terminated. Thereafter, a third magnetic field is applied on the magnetic Y axis in a second direction opposite to the first direction. The second magnetic field is terminated and the third magnetic field is terminated.
    Type: Application
    Filed: June 13, 2007
    Publication date: August 21, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yuan-Jen Lee, Ming-Jer Kao
  • Patent number: 7359237
    Abstract: A low-power magnetic random access memory (MRAM) with high write selectivity is provided. Write word lines and pillar write word lines covered with a magnetic material are disposed in an zigzag relation, solving the magnetic interference problem generated by cells adjacent to the pillar write word line in the magnetic RAM with the pillar write word line form. According to the disclosed structure, each of the cells has a smaller bit size and a lower write current. This effectively reduces the power consumption of the MRAM.
    Type: Grant
    Filed: May 17, 2004
    Date of Patent: April 15, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Yung-Hsiang Chen, Shu-En Li
  • Publication number: 20080003701
    Abstract: A non-via method of connecting a magnetoelectric element with a conductive line is provided. A magnetoelectric element is formed on a substrate. Spacers are formed on side walls of the magnetoelectric element. A first dielectric layer is deposited over the substrate and the magnetoelectric element. The first dielectric layer is planarized to a level above the magnetoelectric element. A second dielectric layer is deposited over the first dielectric layer. The first and second dielectric layers are etched to form a trench, exposing an upper surface of the magnetoelectric element. A conductive material layer is filled into the trench to form a conductive line on the magnetoelectric element.
    Type: Application
    Filed: July 20, 2007
    Publication date: January 3, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Young-Shying Chen, Wei-Chuan Chen, Ming-Jer Kao
  • Publication number: 20070242501
    Abstract: A magnetic memory cell, used in a magnetic memory device, includes a stacked magnetic pinned layer, serving as a part of the base structure. The stacked magnetic pinned stacked layer has a top pinned layer and a bottom pinned layer, between which there is a sufficient large magnetic coupling force to maintain magnetization of the top pinned layer on a reference direction. A tunnel barrier layer is disposed on the stacked magnetic pinned layer. A magnetic free stacked layer is disposed on the tunnel barrier layer. The magnetic free stacked layer includes a bottom free layer having a bottom magnetization and a top free layer having a top magnetization. When no assisted magnetic field is applied, the bottom magnetization is anti-parallel to the top magnetization and is perpendicular to the reference direction on the top pinned layer. A magnetic bias layer can be also disposed on the top free layer.
    Type: Application
    Filed: August 18, 2006
    Publication date: October 18, 2007
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Chung Hung, Yung-Hsiang Chen, Ming-Jer Kao, Yuan-Jen Lee, Yung-Hung Wang
  • Publication number: 20070223270
    Abstract: A low-power magnetic random access memory (MRAM) with high write selectivity is provided. Write word lines and pillar write word lines covered with a magnetic material are disposed in an zigzag relation, solving the magnetic interference problem generated by cells adjacent to the pillar write word line in the magnetic RAM with the pillar write word line form. According to the disclosed structure, each of the cells has a smaller bit size and a lower write current. This effectively reduces the power consumption of the MRAM.
    Type: Application
    Filed: May 31, 2007
    Publication date: September 27, 2007
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Yung-Hsiang Chen, Shu-En Li