Abstract: The invention is directed to compositions and methods for improving the physicomechanical and electro-optical properties of an electrophoretic or liquid crystal display and also to semi-finished or finished display panels with improved physicomechanical properties. The invention is further directed to a display device comprising display cells filled with a display fluid and top-sealed with a top-sealing layer, wherein the top-sealing layer has a thickness of less than 10 microns measured at the center area.

Abstract: A peripheral circuit disposed on a substrate having an active device array is provided. The peripheral circuit includes first test pads, second test pads, first lines, and second lines. The first and the second lines are electrically connected to the active device array. Each first test pad includes a first conductive layer and a second conductive layer electrically connected to the first conductive layer. The first conductive layer electrically connects at least two of the adjacent first lines. The second test pads are interposed between the first test pads and the active device array. Each second test pad includes third conductive layers and a fourth conductive layer electrically connected to the third conductive layers. The first lines pass through the third conductive layers and are insulated from the fourth conductive layer. Each third conductive layer is electrically connected to one of the adjacent second lines respectively.

Abstract: The present invention provides a wireless communications system comprising a first radio transceiver configured to communicate on a first radio channel, a second radio transceiver configured to communicate on a second radio channel, a first base transceiver unit (BTU) configured to communicate with the first radio transceiver, a second BTU configured to communicate with the second radio transceiver, and a client transceiver unit (CTU) configured to communicate with both the first BTU and the second BTU. The CTU is thereby configured to communicate on the first radio channel via the first radio transceiver and the first BTU. The CTU is also configured to communicate on the second radio channel via the second radio transceiver and the second BTU. The CTU comprises at least one speaker for enabling a user to listen to communications on the first and second radio channels concurrently.

Abstract: A data communication device with a receiver for receiving and processing incoming signal having intersymbol interference component to produce resultant signals with less interference. The processor includes a timing recovery processor for recovering a clock signal from the sample streams of the incoming signal. The recovered clock signal is also suitable for signal detection of the incoming signals under strong intersymbol interference.

Abstract: A solid-state illumination lamp structure includes a sleeve, a first electrode, a second electrode and a light-emitting assembly. The first electrode is mounted on one end of the sleeve and the second electrode is mounted on the other end of the sleeve. The light emitting assembly is mounted inside the sleeve and includes a circuit substrate, at least one light-emitting diode and two conducting assemblies. The two conducting assemblies are electrically connected to the first electrode and the second electrode, respectively, so that the light emitting assembly emits light.

Abstract: A novel light source device assembly comprises a substrate, a plurality of light source devices and a heat dissipation plate. In the substrate, a plurality of through holes is provided at a plurality of predetermined positions, to support the plurality of light source devices. In the heat dissipation plate, at positions corresponding to that of the plurality of through holes, a plurality of upwardly protruded tongue pieces is provided, whereby each tongue piece is in contact with its respectively corresponding light source device in the plurality of through holes. Metal solders may be applied in between the plurality of tongue pieces and their corresponding plurality of light source devices to enhance the heat dissipation efficiencies. Necessary circuitry may be provided in the substrate and the circuitry may be in connection with the light source device electrically.

Abstract: The present invention relates to methods for inspection of defects in an electrophoretic display and related devices. The method may be carried out with one or more testing electrodes. The method comprises applying a voltage difference to two testing electrodes which are in contact with the display panel, or applying a voltage difference to a testing electrode and a electrode layer. The methods may be applied in in-line or off-line inspection of a display panel.

Abstract: An improved type of application-specific integrated circuit block (ASIC) is disclosed that is optimized for use in a communications system, and is somewhat programmble through the use of particular data objects that can specify an instruction and operand for the ASIC. The ASIC can be multi-tasking to perform multiple receive or transmit operations, two different kinds of transmit or receive operations, and operaions for mulitple ports. The ASIC generally uses an input data decoder block for decoding an input data object; a computation logic block for performing application specific computations in connection with the input data object, and an output data encoder block for encoding an output data object based on the specific computations. Using a common memory, a set of such ASICs can be arranged in a form of logical (or logical hybrid) pipeline.

Abstract: In a track control method for marking a label side of an optical disc, a data side of the optical disc is first oriented to an optical head. A light beam is then emitted and a sled carrying the optical head moves. A series of moving distances of the sled are calculated according to the light beam reflected by the optical disc, which are then recorded in a memory. The optical disc is then flipped to have the label side face the optical head, and the shift of the optical head is controlled to mark on tracks of the label side according to the series of moving distances recorded in the memory.

Abstract: A loading device for loading a substrate includes: a support module having at least a contact region contacted with the substrate for providing a supporting force to load the substrate; and a conductive media, electrically connected to the contact region and a voltage level, for eliminating electrostatic discharges between the contact region and the substrate.

Abstract: After the learning step of an optical disc recording apparatus for writing a label side of an optical disc is accomplished, the focusing servo control signal includes an offset voltage component. Before or after the focusing servo control signal is converted into an analog output signal, the signal is processed by a low pass filter to remove a high-frequency portion so as to smoothen the signal, thereby removing the color or grey level gaps of the resulting pattern marked on the label side of the optical disc.

Abstract: A wheel rim assembly has a wheel rim and cover. The wheel rim has a disk, a rim flange, a join and a mounting ditch. The disk is mounted to a wheel axle and has a periphery. The rim flange is formed on and around the periphery of the disk and has a mounting edge portion. The join is mounted between the disk and the rim flange. The mounting ditch is defined in and around the join. The cover is mounted on the rim flange and has an inside mounting portion and an outside mounting portion. The inside mounting portion is mounted in the mounting ditch. The outside mounting portion is mounted on the mounting edge portion. Accordingly, to mount the inside and outside mounting portion to the mounting ditch and mounting edge portion is convenient to make the cover to be mounted on the wheel rim securely.

Abstract: A drawing control method for producing label pattern is disclosed.

Abstract: A physical medium dependent (PMD) transport subsystem is disclosed which is used in an xDSL communication system. The PMD subsystem coordinates movement of data from an analog front end to a logical pipeline based TC layer, and exchanges common data objects with the latter to increase flexibility of the system. The PMD subsystem includes a number of ASIC blocks for performing signal processing operations, and these ASIC blocks are also shared between ports and are multi-tasking to reduce hardware costs.

Abstract: A chair includes a seat, a back, and a headrest; the back has several adjustment members thereon; a supporting frame is connected to the adjustment members in such a way as to be separable from the back; therefore, position and angle of the supporting frame can be adjusted by means of replacing the adjustment members with other ones that have different dimensions from the original ones; people are allowed to select and use another supporting frame having different shape and size from the original one according to their needs and situations; the seat and the headrest have the same structure as the back.

Abstract: An improved type of application-specific integrated circuit block (ASIC) is disclosed that is optimized for use in a communications system, and is somewhat programmble through the use of particular data objects that can specify an instruction and operand for the ASIC. The ASIC can be multi-tasking to perform multiple receive or transmit operations, two different kinds of transmit or receive operations, and operaions for mulitple ports. The ASIC generally uses an input data decoder block for decoding an input data object; a computation logic block for performing application specific computations in connection with the input data object, and an output data encoder block for encoding an output data object based on the specific computations. Using a common memory, a set of such ASICs can be arranged in a form of logical (or logical hybrid) pipeline.

Abstract: A communications system including a shared signal circuit for performing a set of signal processing operations on both receive data and transmit data. The signal processing circuit is also shared by a plurality of communication ports. To further enhance operation of the system, the computing resources include a set of independent application specific (ASIC) logic circuits, with at least some of the ASICs selectively performing at least one of a first signal processing operation and a second signal processing operation on data in response to control information embedded in an input data object.

Abstract: A multi-port communications system is described, which includes hardware based subsystems for performing both physical medium dependent operations and transport convergence operations on a data transmission. A software based subsystem performs other operations as needed. Both types of subsystems are shareable by the communications ports so as to reduce a total hardware requirement of a communications system. In addition, processing blocks within both subsystems are adapted to be multi-tasking, in that they can perform multiple operations for a receive/transmit task, or even a mixture of receive/transmit tasks. The subsystems are arrangeable in a logical/hybrid pipeline arrangement with a common memory to further maximize the flexibilty and configurability of a communications system.

Abstract: A system that can be dynamically configured to achieve an optimal routing path for an end-to-end data link connection is disclosed. An optimal data path can be determined by a digital subscriber loop (DSL) user based on particular bandwidth requirements, data rate cost constraints, and/or data delay requirements. The data path can be set up to include one or more data routes, including the regular digital public switching telephone network (PSTN), a wide area networks (WAN), or virtual permanent circuit links via digital cross-connects (DCS).

Abstract: A task scheduler for a TC subsystem is disclosed. The task scheduler is responsible for responding to computation block requests from the TC subsystem, and retrieving/storing data objects for such computation blocks. The task scheduler thus facilitates a type of logical pipeline by exchanging such data objects with a common TC memory used by each computation block. The task scheduler generally includes a queue, a state machine and a bus master for satisfying the data object requests.