Abstract: A new type of pipeline, generally referred to as a logical pipeline is disclosed. A logical pipeline generaly includes a set of hardware based pipeline stages that exchange data through a common pipeline memory, instead of only through intermediate fixed physical buffers. Thus, operational data is retrieved and stored by each stage using a single memory, and this permits flexible and programmable forms of pipelines that can be adapted as needed in response to a desired computation task. A common pipeline clock initiates processing of the data. Another variation is disclosed in the form of a logical “hybrid” pipeline, consisting of both software and hardware based pipeline stages, that are used to perform a set of computations in an interleaved fashion. In this manner, a data item can be handled first by a hardware pipeline stage, followed immediately by a software pipeline stage, etc.

Abstract: A communications system operates with an internal pipeline clock rate that is higher than that of any port used in the system. In an xDSL environment, this rate is higher than a DMT symbol rate used in the channel. In this manner, communications for the various ports can be synchronized and pipelined for transmit/receive operations. In addition, the higher rate results in idle processing periods, during which stuffing symbols are generate to maintain synchronism and/or pass along control information. The internal pipeline clock rate is selected to be higher than rate that may be encountered as well during an initialization routine and normal transmissions. The pipeline clock is also programmable so as to permit power management of the system.

Abstract: Underpants having a protective structure are provided with a front piece and a corresponding rear piece which are joined and form underpants. The underpants are further provided with a pocket piece attached to the rear piece so that a pocket space is formed to connect with an opening formed between the front piece and the rear piece. Thus, the wearer's scrotum is received through the opening. A cover piece is attached to the pocket piece by one end and detachably affixed to the front piece by the other end such that the wearer's phallus, passing through the opening, can be held in position between the cover piece and the front piece, thereby preventing discomfort or skin disease due to perspiration from occurring.

Abstract: A circuit and method that optimizes and adapts the bit and energy configurations of data sub-channels in a multi-channel data transmission signal is disclosed. A high speed system can select either of a first or a second adaptation routine to handle changes in the bit and gain loadings of sub-channel carriers based on line disturbances or transmission change requests, based on which is most aptly suited to handle the particular change. In a preferred embodiment the resulting bit/energy loadings can be adjusted to be fully compliant with applicable Discrete Multi-Tone (DMT) implementations of Asymmetric Digital Subscriber Loop (ADSL) protocols.

Abstract: Frame synchronization between Asymmetric Digital Subscriber Line (ADSL) transceivers operating using Discrete Multi-tone (DMT) line code is effectuated by boundary detection logic executing a rapid, computationally simple correlation process. The invention is particularly suited for ADSL software modem implementations, where conservation of computing resources is especially critical, and loss of synchronization can lead to significant unrecoverable data errors.

Abstract: A high speed communications system is provided which uses a selectable, desirable portion of the total available bandwidth of a transmission channel. In a preferred embodiment, the invention is an ADSL compatible modem which selects a sub-set of the available downstream DMT sub-channels based on an evaluation of such sub-channels by appropriate signal processing circuitry. An analog front end (AFE) contains sub-band filtering causes an upstream transceiver to use only this selected number of available sub-channels for downstream data transmission. This reduces hardware costs and complexity while still preserving compatibility with applicable ADSL standards and providing a high speed data link. The target data rate of the modem can be further enhanced to the point of achieving fill protocol capability by increasing or upgrading the AFEs, and/or the signal processing circuitry in order to increase the number of processable transmitted downstream sub-channels.

Abstract: An ADSL physical transmission layer retrieves data to be transmitted from either a transmit data buffer, or a dummy cell buffer in the case when no actual data is being transmitted to maintain a continuous data stream in an ADSL data link. The ADSL physical transmission layer and an associated ATM protocol layer are implemented as an interrupt service routine and delayed procedure call respectively in an ADSL software modem application. Because the ATM protocol layer does not fill the transmit data buffer with dummy cell data, it is simpler and faster. Moreover, latency is minimized, and overall system throughput enhanced since the maximum latency is independent of any operating system latency, and is no greater than the size of the cell stored in the dummy cell buffer.

Abstract: A high speed communications system is provided which uses a selectable, desirable portion of the total available bandwidth of a transmission channel. In a preferred embodiment, the invention is an ADSL compatible modem which selects a sub-set of the available downstream DMT sub-channels based on an evaluation of such sub-channels by appropriate signal processing circuitry. An analog front end (AFE) contains sub-band filtering causes an upstream transceiver to use only this selected number of available sub-channels for downstream data transmission. This reduces hardware costs and complexity while still preserving compatibility with applicable ADSL standards and providing a high speed data link. The target data rate of the modem can be further enhanced to the point of achieving full protocol capability by increasing or upgrading the AFEs, and/or the signal processing circuitry in order to increase the number of processable transmitted downstream sub-channels.

Abstract: An ADSL physical transmission layer retrieves data to be transmitted from either a transmit data buffer, or a dummy cell buffer in the case when no actual data is being transmitted to maintain a continuous data stream in an ADSL data link. The ADSL physical transmission layer and an associated ATM protocol layer are implemented as an interrupt service routine and delayed procedure call respectively in an ADSL software modem application. Because the ATM protocol layer does not fill the transmit data buffer with dummy cell data, it is simpler and faster. Moreover, latency is minimized, and overall system throughput enhanced since the maximum latency is independent of any operating system latency, and is no greater than the size of the cell stored in the dummy cell buffer.

Abstract: A circuit and method that optimizes a set up time and control of bit and energy loadings of data sub-channels in a multi-channel data transmission signal is disclosed. A time out period, or an iteration count are used to control a setup time. An initialization routine attempts to make appropriate loadings within such time out period or within an iteration count parameter. If it is unable to do so, a handoff is made to a second routine to complete the loadings. In a preferred embodiment the initialization routine calculates rough parameters, while the second routine finalizes the capacity calculations. Another aspect of the invention ensures that the initialization routine can be repeated at a later time to re-compute appropriate bit and energy loadings to ensure that significant changes caused by line disturbances or large data rate variations can be quickly accommodated.

Abstract: A signaling protocol process is described for setting up and controlling end to end data link connections. An optimal data path can be selected and configured by a digital subscriber loop (DSL) user based on particular bandwidth requirements, data rate cost constraints, and/or data delay requirements. The data path can be set up to include one or more data routes, including through a regular digital public switching telephone network (PSTN), various kinds of wide area networks (WANs), and virtual permanent circuit links via digital cross-connects (DCS).

Abstract: A high speed software modem is described which uses a selectable, desirable portion of the total available bandwidth of a transmission channel. In a preferred embodiment, the invention is implemented in a personal computer connected to an upstream transceiver through a channel supporting an Asymmetric Digital Subscriber Loop (ADSL) standard. The achievable target data rate of the modem is based on the capabilities of an analog front end (AFE) used in the modem, and a host processor within such personal computer. In particular, the modem AFE contains subband filtering which causes an upstream transceiver to use only a selected number of available sub-channels for downstream data transmission. The data rate of the modem is increased by upgrading the AFE or the host processor in order to increase the number of processable transmitted downstream sub-channels.

Abstract: A process for optimizing the bit and energy configurations of data sub-channels in a multi-channel data transmission signal is disclosed. The inventive process is preferably embodied in an microcode routine executable by a high speed digital signal processor. The routine monitors, analyzes and stores sub-channel signal-to-noise characteristics, determines theoretical bit capacity loadings, evaluates power performance margins, and optimizes sub-channel configurations based on a series of iterative calculations intended to maximize the overall system power performance margin for any given target data rate. Alternatively, for a given power performance margin, the achieved data rate can be maximized. To achieve these results, a number of non-zero bit sub-channels (N.sub.CH) are remembered from iteration to iteration, which results in a more optimal loading of the sub-channels. A unique new approach is also disclosed for deciding which of the sub-channels should be disabled to have a zero bit loading.

Abstract: A circuit for optimizing the bit and energy configurations of data sub-channels in a multi-channel data transmission signal is disclosed. The circuit preferably includes a high speed memory coupled to a digital signal processor running an executable routine for analyzing sub-channel signal-to-noise characteristics, determining theoretical bit capacity loadings, evaluating power performance margins, and optimizing sub-channel configurations based on a series of iterative calculations intended to maximize the overall system power performance margin for any given target data rate. The circuit keeps track of the number of non-zero bit sub-channels (N.sub.CH) from iteration to iteration, which results in a more accurate loading of the sub-channels.

Abstract: A high speed modem is provided which uses a selectable, desirable portion of the total available bandwidth of a transmission channel. In a preferred embodiment, the invention is incorporated in a dedicated hardware circuit which is connected on one end to a data processor and on the other end to an upstream transceiver through a channel supporting an Asymmetric Digital Subscriber Loop (ADSL) standard. The achievable target data rate of the modem is based on the capabilities of an analog front end (AFE) used in the modem, and a signal processor within the dedicated hardware. In particular, the modem AFE contains subband filtering which causes an upstream transceiver to use only a selected number of available sub-channels for downstream data transmission. The data rate of the modem is increased by upgrading the AFE or the signal processor in order to increase the number of processable transmitted downstream sub-channels.

Abstract: A high speed modem is described that implements a scalable data rate ADSL link. The target data rate of the modem is scaled appropriately relative to a maximum available protocol rate by a factor M based on the signal processing capabilities available for performing DMT modulation and demodulation. An upstream transceiver is informed of the proposed scaling factor during a handshaking procedure, and thereafter the data rate of the channel is then scaled down by sending M copies of the same DMT symbol to the upstream transceiver, which effectively reduces the rate by such factor M. A self-executing calibration routine can be used for determining the appropriate scaling factor for such device, or alternatively, in some contexts a user can configure such scaling factor directly through a suitable interface.

Abstract: A circuit for optimizing and adapting the bit and energy configurations of data sub-channels in a multi-channel data transmission signal is disclosed. The circuit preferably includes a high speed memory coupled to a digital signal processor running an executable routine for analyzing sub-channel signal-to-noise characteristics, determining theoretical bit capacity loadings, evaluating power performance margins, and optimizing initial and adaptive sub-channel configurations based on a series of iterative calculations intended to maximize the overall system power performance margin for any given target data rate. The circuit keeps track of the number of non-zero bit sub-channels (N.sub.CH) from iteration to iteration, which results in a more accurate loading of the sub-channels.

Abstract: An ADSL transceiver includes a new circuit and various iterative initialization and fine tuning routines for optimizing the bit and energy configurations of data sub-channels in a multi-channel data transmission signal. The routines quickly converge to a target data rate by first estimating a power margin, and generating a bounded interval that includes the target rate. Thereafter, a binary iterative portion of the routine takes over and effectuates a final convergence to the target rate. A new mechanism for determining useful sub-channels is also disclosed. The resulting routines are extremely useful in that they maximize a data rate for a given power margin, and conversely, maximize a power margin for a given data rate. Two variants of a fine tuning process are also disclosed, and both can be used in combination to maximize system performance.

Abstract: A digital subscriber loop access and multiplexing (DSLAM) circuit for use at a central office site is disclosed. The DSLAM circuit couples to a digital subscriber loop (DSL) and permits a downstream user to set up and configure an end-to-end connection with destination customer promise equipment (CPE) at a target data rate using any one or more of a regular switching telephone network, various kinds of wide area networks, or virtual permanent circuit links via digital cross-connects.

Abstract: An adaptive process for optimizing the bit and energy configurations of data sub-channels in a multi-channel data transmission signal is disclosed. The inventive process is preferably embodied in one or more microcode routines executable by a high speed digital signal processor. A first routine initializes the transmission system, while a second routine adaptively changes system parameters as necessary to accommodate channel performance changes, varying target bit rates, etc. Both of the routines monitor, analyze and store sub-channel signal-to-noise characteristics, determine theoretical bit capacity loading, evaluates power performance margin, and optimize sub-channel configurations based on a series of iterative calculations intended to maximize the overall system power performance margin for any given target data rate. Alternatively, for a given power performance margin, the achieved data rate can be maximized. To achieve these results, a number of non-zero bit sub-channels (N.sub.