Patents by Inventor Ming Lee

Ming Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11735474
    Abstract: A FinFET device structure is provided. The FinFET device structure includes a fin structure formed over a substrate, and a gate structure formed over the fin structure. The FinFET device structure includes a source/drain (S/D) structure formed over the fin structure and adjacent to the gate structure, and an S/D contact structure formed over the S/D structure and adjacent to the gate structure. The FinFET device structure also includes a protection layer formed on the S/D contact structure, and the protection layer and the S/D contact structure are made of different materials. The protection layer has a bottommost surface in direct contact with a topmost surface of the S/D contact structure.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: August 22, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Yuan Chen, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 11735809
    Abstract: An antenna system and a terminal device, where the antenna system includes a first feed point, a first ground point, a second feed point, a second ground point, a third ground point, a fourth ground point, a first radiator, a second radiator, a first resonance structure, and a second resonance structure, where the first feed point is coupled to the first radiator, the second feed point is coupled to the second radiator, the first radiator is coupled to the first ground point, and the second radiator is coupled to the second ground point, the first resonance structure is electromagnetically coupled to the first radiator at a first distance from the first radiator, and the second resonance structure is electromagnetically coupled to the second radiator at a second distance from the second radiator.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: August 22, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Hanyang Wang, Lei Wang, Yan Wang, Jiaqing You, Dong Yu, Liang Xue, Chien-ming Lee
  • Patent number: 11733143
    Abstract: An external gas detecting device is provided. The external gas detecting device includes a casing, a gas detection module and an external connector. The gas detection module is disposed in the casing and detects a gas transported into the casing to generate a gas information. The external connector is connected to and disposed on the casing. The external connector is used to be connected to an external power supply so as to enable the gas detection module, and is used to transmit the gas information so as to achieve the outward transmission of the gas information.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: August 22, 2023
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Ching-Sung Lin, Chin-Chuan Wu, Yung-Lung Han, Chi-Feng Huang, Chang-Yen Tsai, Wei-Ming Lee
  • Patent number: 11735481
    Abstract: An improved work function layer and a method of forming the same are disclosed. In an embodiment, the method includes forming a semiconductor fin extending from a substrate; depositing a dielectric layer over the semiconductor fin; depositing a first work function layer over the dielectric layer; and exposing the first work function layer to a metastable plasma of a first reaction gas, a metastable plasma of a generation gas, and a metastable plasma of a second reaction gas, the first reaction gas being different from the second reaction gas.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: August 22, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shao-Jyun Wu, Hung-Chi Wu, Chia-Ching Lee, Pin-Hsuan Yeh, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen, Sheng-Liang Pan, Huan-Just Lin
  • Publication number: 20230261068
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a source/drain region formed in a semiconductor substrate, a source/drain contact structure formed over the source/drain region, and a gate electrode layer formed adjacent to the source/drain contact structure. The semiconductor device structure also includes a first spacer and a second spacer laterally and successively arranged from the sidewall of the gate electrode layer to the sidewall of the source/drain contact structure. The semiconductor device structure further includes a silicide region formed in the source/drain region. The top width of the silicide region is greater than the bottom width of the source/drain contact structure and less than the top width of the source/drain region.
    Type: Application
    Filed: February 15, 2022
    Publication date: August 17, 2023
    Inventors: Kai-Hsuan LEE, Shih-Che LIN, Po-Yu HUANG, Shih-Chieh WU, I-Wen WU, Chen-Ming LEE, Fu-Kai YANG, Mei-Yun WANG
  • Patent number: 11728397
    Abstract: Examples of an integrated circuit with an interconnect structure and a method for forming the integrated circuit are provided herein. In some examples, the method includes receiving a workpiece that includes an inter-level dielectric layer. A first contact that includes a fill material is formed that extends through the inter-level dielectric layer. The inter-level dielectric layer is recessed such that the fill material extends above a top surface of the inter-level dielectric layer. An etch-stop layer is formed on the inter-level dielectric layer such that the fill material of the first contact extends into the etch-stop layer. A second contact is formed extending through the etch-stop layer to couple to the first contact. In some such examples, the second contact physically contacts a top surface and a side surface of the first contact.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: August 15, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Hung Tsai, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 11728394
    Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, an exemplary method of forming the semiconductor structure includes forming a fin structure extending from a front side of a substrate, recessing a source region of the fin structure to form a source opening, forming a semiconductor plug under the source opening, planarizing the substrate to expose the semiconductor plug from a back side of the substrate, performing a pre-amorphous implantation (PAI) process to amorphize the substrate, replacing the amorphized substrate with a dielectric layer, and replacing the semiconductor plug with a backside source contact. By performing the PAI process, crystalline semiconductor is amorphized and may be substantially removed. Thus, the performance and reliability of the semiconductor structure may be advantageously improved.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: August 15, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Yu Huang, Chen-Ming Lee, I-Wen Wu, Fu-Kai Yang, Mei-Yun Wang
  • Publication number: 20230254107
    Abstract: The present invention discloses a signal communication method having re-sampling mechanism that includes steps outlined below. Sampled data of a data signal is obtained. A time difference between an actual sampling time point and an ideal sampling time point is calculated. A closet time point closest to the ideal sampling time point within a sampling time interval is selected. Operation sampled data within a predetermined range around the target sampled data is selected from the sampled data. A group of response terms are retrieved from a pre-stored lookup table according to the closest time point to substitute the response terms and the time difference into a parameter calculation equation to generate a group of re-sampling response parameters. A calculation is performed based on the operation sampled data and the re-sampling response parameters to generate a re-sampled value of the target sampled data.
    Type: Application
    Filed: January 12, 2023
    Publication date: August 10, 2023
    Inventors: CHIH-HSIU ZENG, CHANG-MING LEE
  • Patent number: 11719455
    Abstract: A method for intelligently preventing and handling indoor air pollution is adapted to be implemented in an indoor space and includes providing a cloud processing device to receive and intelligently compare an outdoor gas detection data, an indoor gas detection data, and device gas detection data with each other. Then, the cloud processing device remotely transmits a control signal to the communication relay station and further to an indoor gas exchange system, so that the indoor gas exchange system is capable of intelligently enabling the gas processing device and controlling the operation time of the gas processing device for exchanging a polluted gas in the indoor space with the outdoor gas. Moreover, the gas exchanger can perform purification for the polluted gas at the location of the gas exchanger, thereby allowing the polluted gas in the indoor space to be exchanged into a clean, safe, and breathable gas.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: August 8, 2023
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Ching-Sung Lin, Chin-Chuan Wu, Yung-Lung Han, Chi-Feng Huang, Wei-Ming Lee
  • Patent number: 11721740
    Abstract: Provided is a semiconductor device including a first n-type transistor comprising a first work function layer, the first work function layer comprising a first underlying layer; and a second n-type transistor comprising a second work function layer, the second work function layer comprising a second underlying layer. The first and second underlying layers each comprises a metal nitride layer with at least two kinds of metals, and a thickness of the first underlying layer is greater than a thickness of the second underlying layer. A method of manufacturing a gate structure for a semiconductor device is also provided.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: August 8, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui-Fen Chien, Hsiao-Kuan Wei, Hsien-Ming Lee, Chin-You Hsu
  • Patent number: 11719674
    Abstract: A monitoring and gas detection information notification system includes monitoring devices and a cloud data processing device. The monitoring devices are respectively disposed at corresponding fixed positions, each of the monitoring devices includes a monitoring module and an actuator-sensor module. The monitoring module captures an image and converts the image into an image data. The actuator-sensor module is disposed in the monitoring module and includes one or more actuators for guiding a gas into the monitoring module and includes one or more sensors for generating a gas detecting data. The cloud data processing device stores and intelligently analyzes the image data and the gas detecting data to generate a processed data, and the cloud data processing device transmits the processed data to a notification processing system so as to conduct a notification of monitoring information and gas detecting information.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: August 8, 2023
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Yung-Lung Han, Chi-Feng Huang, Chun-Yi Kuo, Chang-Yen Tsai, Wei-Ming Lee
  • Patent number: 11721561
    Abstract: A system includes a chemical storage tank, a pipeline, a pump, a first electrostatic probe, and a control unit. The pipeline is connected to the chemical storage tank. The pump is connected to the pipeline and configured to pump a chemical solution from the chemical storage tank into the pipeline. The first electrostatic probe is coupled to the pump and configured to measure an electrostatic voltage of the pump. The control unit is coupled to the first electrostatic probe and configured to obtain a measurement of an electrostatic voltage from the first electrostatic probe.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: August 8, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chih-Chiang Tseng, Ming-Lee Lee, Chiang Jen Chen
  • Patent number: 11718094
    Abstract: A wafer structure is disclosed and includes a chip substrate and at least one inkjet chip. The chip substrate is a silicon substrate which is fabricated by a semiconductor process on a wafer of at least 12 inches. The at least one inkjet chip is directly formed on the chip substrate by the semiconductor process, and the wafer is diced into the at least one inkjet chip, to be implemented for inkjet printing.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: August 8, 2023
    Assignee: Microjet Technology Co., Ltd.
    Inventors: Hao-Jan Mou, Ying-Lun Chang, Hsien-Chung Tai, Chi-Feng Huang, Yung-Lung Han, Wei-Ming Lee
  • Publication number: 20230245489
    Abstract: A fingerprint identification module includes a light guiding member, a flexible circuit board, two light emitting members, and a fingerprint identification chip. The light guiding member includes a bottom and a protruding edge. The protruding edge surrounds to form a first space. A first through-hole is formed on the bottom. The flexible circuit board is disposed in the first space and has a first portion, a second portion, a third portion, and a fourth portion connected in sequence. The first portion goes out of the light guiding member through the first through-hole. The third portion faces a direction opposite to the bottom. The second portion and the fourth portion face the bottom of the light guiding member. The light emitting members are disposed on the flexible circuit board and face the light guiding member. The fingerprint identification chip is disposed on the third portion of the flexible circuit board.
    Type: Application
    Filed: August 9, 2022
    Publication date: August 3, 2023
    Applicant: MIYABI TECHNOLOGY CO., LTD.
    Inventors: HSIEN-MING LEE, TSUNG-YI LU
  • Publication number: 20230246369
    Abstract: A power connector system having a right-angle type plug connector or a straight type plug connector engageable with a header connector. The right-angle type plug connector is a plug connector having a mating direction, which is 90 degrees from the centerline of the cables exiting from the plug connector. The straight type plug connector is a plug connector having a mating direction, which is parallel to the centerline of the cables exiting the back of the plug connector. The header connector holds at least a female receiving terminal or receptacle made of a high electrical conductivity material. The female receiving terminal or receptacle includes fingers that extend parallel to each other, and are spaced apart from each other, and further includes a reinforcing spring member. The plug connector holds at least a male rectangular tab terminal, the male rectangular tab terminal having a short edge and a long edge.
    Type: Application
    Filed: May 27, 2022
    Publication date: August 3, 2023
    Applicant: J.S.T. CORPORATION
    Inventors: Sen Ming LEE, Pei Weon CHOO
  • Publication number: 20230246335
    Abstract: An antenna apparatus and an electronic device. The antenna apparatus includes a feed source, a transmission line, a first radiator including a first feed point, and a second radiator including a second feed point. The transmission line is electrically connected to the feed source. A second end part of the second radiator is disposed away from the first radiator compared to the first end part of the second radiator, a first gap is formed between the first end part of the first radiator and the first end part of the second radiator, the first end part of the first radiator is a ground end, and the first end part of the second radiator is an open end. The two feed points are electrically connected to the transmission line, and the transmission line input a radio frequency signal in a same frequency band to the two feed points.
    Type: Application
    Filed: June 15, 2021
    Publication date: August 3, 2023
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Pengfei Wu, Hanyang Wang, Dong Yu, CHIEN-MING LEE, Liang Xue
  • Patent number: 11715656
    Abstract: In accordance with some embodiments, a method for processing semiconductor wafer is provided. The method includes connecting a drum which stores the chemical liquid with a testing pipe. The method also includes guiding the chemical liquid in the drum into the testing pipe. In addition, the method includes detecting a condition of the chemical liquid in the testing pipe. The method further includes determining if the condition of the chemical liquid is acceptable. When the condition of the chemical liquid is acceptable, supplying the chemical liquid to a processing tool at which the semiconductor wafer is processed.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: August 1, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Cheng Chang, Keng-Hui Pan, Chieh-Jan Huang, Ming-Lee Lee, Chiang-Jeh Chen
  • Publication number: 20230238284
    Abstract: A semiconductor device and a method of forming the same are provided. In an embodiment, an exemplary semiconductor device includes two stacks of channel members; a source/drain feature extending between the two stacks of channel members along a direction; a source/drain contact disposed under and electrically coupled to the source/drain feature; two gate structures over and interleaved with the two stacks of channel members; a low-k spacer horizontally surrounding the source/drain contact; and a dielectric layer horizontally surrounding the low-k spacer.
    Type: Application
    Filed: March 27, 2023
    Publication date: July 27, 2023
    Inventors: Po-Yu Huang, I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 11710638
    Abstract: Generally, the present disclosure provides example embodiments relating to formation of a gate structure of a device, such as in a replacement gate process, and the device formed thereby. In an example method, a gate dielectric layer is formed over an active area on a substrate. A dummy layer that contains a passivating species (such as fluorine) is formed over the gate dielectric layer. A thermal process is performed to drive the passivating species from the dummy layer into the gate dielectric layer. The dummy layer is removed. A metal gate electrode is formed over the gate dielectric layer. The gate dielectric layer includes the passivating species before the metal gate electrode is formed.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: July 25, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsiao-Kuan Wei, Hsien-Ming Lee, Chin-You Hsu, Hsin-Yun Hsu, Pin-Hsuan Yeh
  • Publication number: 20230231302
    Abstract: This application provides a wearable device. The wearable device includes a cover, a screen component, an antenna bracket, a first antenna, a metal middle frame, a circuit board, and a bottom cover. The cover and the bottom cover are respectively connected to two sides of the metal middle frame, the screen component is connected to a side of the cover facing the bottom cover, and the circuit board is located in a space enclosed by the metal middle frame, the screen component, and the bottom cover. An accommodating space is jointly enclosed by an end of the screen component, an inner wall of the metal middle frame, and an inner wall of the cover, the antenna bracket is disposed in the accommodating space, and the first antenna is disposed on the antenna bracket and is connected to the circuit board by using a feedpoint.
    Type: Application
    Filed: June 9, 2021
    Publication date: July 20, 2023
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Bing Liu, Menglong Zhao, Jianming Gao, Xiaoyu Sun, YUCHAN YANG, CHIEN-MING LEE