Abstract: The home device capable of gas detection is provided and includes a main body and a gas detection module. The main body has at least one inlet, at least one outlet and a gas flowing channel disposed between the at least one inlet and the at least one outlet. The gas detection module is disposed in the gas flowing channel of the main body and includes a piezoelectric actuator and at least one sensor. Gas is inhaled into the gas flowing channel through the inlet by the piezoelectric actuator, is discharged out through the outlet, and is transported to the at least one sensor to be detected so as to obtain gas information.

Abstract: A piezoelectric actuator includes a square suspension plate, an outer frame, a plurality of brackets and a square piezoelectric ceramic plate. The outer frame is arranged around the suspension plate. A second surface of the outer frame and a second surface of the suspension plate are coplanar with each other. Each of the plurality of brackets has two ends, a first end is perpendicular to and connected with the suspension plate, and a second end is perpendicular to and connected with the outer frame for elastically supporting the suspension plate. Each bracket has a length in a range between 1.22 mm and 1.45 mm and a width in a range between 0.2 mm and 0.6 mm. A length of the piezoelectric ceramic plate is not larger than a length of the suspension plate. The piezoelectric ceramic plate is attached on a first surface of the suspension plate.

Abstract: A gas exchange device for filtering a gas is provided. The gas exchange device includes a gas-intake channel having a gas-intake-channel inlet and a gas-intake-channel outlet, a gas-exhaust channel disposed aside the gas-intake channel and including a gas-exhaust-channel inlet and a gas-exhaust-channel outlet, a purification unit disposed in the gas-intake channel for filtering the gas passing through the gas-intake channel, a gas-intake guider and a gas-exhaust guider for guiding the gas, a driving controller disposed in the gas-intake channel near the gas-intake guider for controlling enablement and disablement of the purification unit, the gas-intake guider and the gas-exhaust guider, and a gas detection main body for detecting the gas and generating detection data.

Abstract: An antenna apparatus for an electronic device having a middle frame, a cover, and a battery located between the middle frame and the cover. The antenna apparatus includes at least one group of coupling feeding elements and at least one group of radiation elements. A first radiator and a second radiator in each group of radiation elements are arranged on an inner surface of a cover. The first radiator and the second radiator are respectively located on two sides of a coupling feeding element, and the coupling feeding element is separately coupled to feed the first radiator and the second radiator.

Abstract: A die-level electrical parameter extraction method includes: obtaining electrical parameters of a plurality of transistor types; obtaining measurement results of a plurality of logic blocks; estimating a mapping relationship between the electrical parameters of the plurality of transistor types and the measurement results of the plurality of logic blocks; and regarding a specific die of a wafer, obtaining die-level measurement of the plurality of logic blocks, and generating die-level electrical parameters of the plurality of transistor types according to the mapping relationship and the die-level measurement results.

Abstract: A fingerprint identification module includes a light guiding member, a flexible circuit board, two light emitting members, and a fingerprint identification chip. The light guiding member includes a bottom and a protruding edge. The protruding edge surrounds to form a first space. A first through-hole is formed on the bottom. The flexible circuit board is disposed in the first space and has a first portion, a second portion, a third portion, and a fourth portion connected in sequence. The first portion goes out of the light guiding member through the first through-hole. The third portion faces a direction opposite to the bottom. The second portion and the fourth portion face the bottom of the light guiding member. The light emitting members are disposed on the flexible circuit board and face the light guiding member. The fingerprint identification chip is disposed on the third portion of the flexible circuit board.

Abstract: Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary device includes a dielectric substrate. The device further includes a channel layer, a gate disposed over the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer. The channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate. The epitaxial source/drain structure includes an inner portion having a first dopant concentration and an outer portion having a second dopant concentration that is less than the first dopant concentration. The inner portion physically contacts the dielectric substrate, and the outer portion is disposed between the inner portion and the channel layer. In some embodiments, the outer portion physically contacts the dielectric substrate.

Abstract: A rack temperature controlling method includes performing the following operations through a controller: obtaining a rack temperature data, calculating a temperature variant according to the rack temperature data, calculating a temperature deviation according to the temperature variant and a reference temperature, calculating a target speed according to the temperature deviation, and adjusting a speed of a fan to the target speed. A rack temperature controlling system including a thermometer and a controller is further provided. The thermometer measures and outputs a rack temperature data. The controller receives the rack temperature data, and calculates a temperature variant according to the rack temperature data. The controller further calculates a temperature deviation according to the temperature variant and a reference temperature, calculates a target speed according to the temperature deviation, and adjusts a speed of a fan to the target speed.

Abstract: A device includes a gate stack; a gate spacer on a sidewall of the gate stack; a source/drain region adjacent the gate stack; a silicide; and a source/drain contact electrically connected to the source/drain region through the silicide. The silicide includes a conformal first portion in the source/drain region, the conformal first portion comprising a metal and silicon; and a conformal second portion over the conformal first portion, the conformal second portion further disposed on a sidewall of the gate spacer, the conformal second portion comprising the metal, silicon, and nitrogen.

Abstract: A wafer structure is disclosed and includes a chip substrate and an inkjet chip. The chip substrate is a silicon substrate fabricated by a semiconductor process on a wafer of 12 inches. The inkjet chips are formed on the chip substrate by the semiconductor process and diced into the inkjet chip. The inkjet chip includes plural ink-drop generators generated by the semiconductor process on the chip substrate. Each of the plurality of ink-drop generators includes a nozzle. A diameter of the nozzle is in a range between 0.5 micrometers and 10 micrometers. A volume of an inkjet drop discharged from the nozzle is in a range between 1 femtoliter and 3 picoliters. The ink-drop generators form plural longitudinal axis array groups having a pitch and plural horizontal axis array groups having a central stepped pitch equal to or less than 1/600 inches.

Abstract: Methods and devices including an air gap adjacent a contact element extending to a source/drain feature of a device are described. Some embodiments of the method include depositing a dummy layer, which is subsequently removed to form the air gap. The dummy layer and subsequent air gap may be formed after a SAC dielectric layer such as silicon nitride is formed over an adjacent metal gate structure.

Abstract: The present invention provides an electronic device. The electronic device includes a mainboard, a metal frame, a display module, and a shield structure. The mainboard includes a radio frequency circuit. The metal frame is coupled to the radio frequency circuit, and configured to receive or transmit a radio frequency signal. The shield structure is located in the display module or on a side of the display module closer to the mainboard, and is connected to the display module. The shield structure includes a metal shield layer. The metal shield layer is insulated from the metal frame and the radio frequency circuit, and the metal shield layer can generate reflection between the metal frame and the display module, weaken field strength generated in the display module by radiated energy from the metal frame, and shield the energy radiated from the metal frame to the display module.

Abstract: A fan control method for controlling a set of fans of a system includes collecting M first sets of characteristic variables of a first period; inputting the M first sets of characteristic variables to a neural network to generate N third sets of characteristic variables of a second period corresponding to a second set of characteristic variables; adjusting the second set of characteristic variables to generate P adjusted second sets of characteristic variables to accordingly generate Q adjusted third sets of characteristic variables; generating an optimized second set of characteristic variables according to the N third sets of characteristic variables and the Q adjusted third sets of characteristic variables; generating a set of weights according to the optimized second set of characteristic variables; and controlling the set of fans according to the set of weights. The first period precedes the second period. M, N, P, Q are positive integers.

Abstract: The present disclosure provides semiconductor devices and methods of forming the same. A semiconductor device according to one embodiment of the present disclosure includes a first fin-shaped structure extending lengthwise along a first direction over a substrate, a first epitaxial feature over a source/drain region of the first fin-shaped structure, a gate structure disposed over a channel region of the first fin-shaped structure and extending along a second direction perpendicular to the first direction, and a source/drain contact over the first epitaxial feature. The bottom surface of the gate structure is closer to the substrate than a bottom surface of the source/drain contact.

Abstract: Semiconductor devices and methods are provided. An exemplary method according to the present disclosure includes providing a workpiece having a channel region, a gate structure over the channel region, gate spacers extending along sidewalls of the gate structure, and an etch stop layer extending along sidewalls of the gate spacers. The method also includes performing an etching process to recess the gate spacers and the gate structure, thereby forming a funnel-shaped trench, depositing a dielectric layer over the workpiece to partially fill the funnel-shaped trench, etching back the dielectric layer to form dielectric spacers on the recessed gate spacers, forming a metal cap on the gate structure without forming the metal cap on the recessed gate spacers, and forming a dielectric cap on the metal cap.

Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, an exemplary semiconductor structure includes a gate structure disposed over a channel region of an active region, a drain feature disposed over a drain region of the active region; a source feature disposed over a source region of the active region, a backside source contact disposed under the source feature, an isolation feature disposed on and in contact with the source feature, a drain contact disposed over and electrically coupled to the drain feature, and a gate contact via disposed over and electrically coupled to the gate structure. A distance between the gate contact via and the drain contact is greater than a distance between the gate contact via and the isolation feature. The exemplary semiconductor structure would have a reduced parasitic capacitance and an enlarged leakage window.

Abstract: The present disclosure describes a patterning process for a strap region in a memory cell for the removal of material between polysilicon lines. The patterning process includes depositing a first hard mask layer in a divot formed on a top portion of a polysilicon layer interposed between a first polysilicon gate structure and a second polysilicon gate; depositing a second hard mask layer on the first hard mask layer. The patterning process also includes performing a first etch to remove the second hard mask layer and a portion of the second hard mask layer from the divot; performing a second etch to remove the second hard mask layer from the divot; and performing a third etch to remove the polysilicon layer not covered by the first and second hard mask layers to form a separation between the first polysilicon gate structure and the second polysilicon structure.

Abstract: A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.

Abstract: A mobile terminal and a mobile terminal antenna production method. The mobile terminal uses an insulation film layer on an insulation rear housing as a carrier of a radiating element of an antenna, and the radiating element is located within the entire mobile terminal. A feed and an electric-conductor are disposed on a circuit board, and the electric-conductor is electrically connected to the feed. There is a gap between the radiating element and the electric-conductor, and the electric-conductor indirectly couples the radiating element in a capacitively coupled manner.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a substrate having one or more devices formed thereon, one or more bonding pads disposed over the substrate, and a first passivation layer disposed over the one or more bonding pads. The first passivation layer includes a first passivation sublayer having a first dielectric material, a second passivation sublayer disposed over the first passivation sublayer, and the second passivation sublayer has a second dielectric material different from the first dielectric material. The first passivation layer further includes a third passivation sublayer disposed over the second passivation sublayer, and the third passivation sublayer has a third dielectric material different from the second dielectric material. At least two of the first, second, and third passivation sublayers each includes a nitride.