Patents by Inventor Ming Qiao

Ming Qiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10607987
    Abstract: A BIPOLAR-CMOS-DMOS (BCD) semiconductor device and manufacturing method, which can integrate a Junction Field-Effect Transistor (JFET), two classes of Vertical Double-diffusion Metal Oxide Semiconductor (VDMOS), a Lateral Insulated-Gate Bipolar Transistor (LIGBT) and seven kinds of Laterally Diffused Metal Oxide Semiconductor (LDMOS), a low-voltage Negative channel Metal Oxide Semiconductor (NMOS), a low-voltage Positive channel Metal Oxide Semiconductor (PMOS), a low-voltage Negative-Positive-Negative (NPN) transistor and a low-voltage Positive-Negative-Positive (PNP) transistor, and a diode in the same chip. Bipolar devices in the analog circuit, power components in the switch circuit, Complementary Metal Oxide Semiconductor (CMOS) devices in the logic circuit and other kinds of lateral and vertical components are integrated. This present invention saves costs at the same time greatly improve chip integration.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: March 31, 2020
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Ming Qiao, Song Pu, Bo Zhang
  • Patent number: 10608106
    Abstract: A power semiconductor device including a first conductivity type semiconductor substrate, a drain metal electrode, a first conductivity type semiconductor drift region, and a second conductivity type semiconductor body region. The second conductivity type semiconductor body region includes a first conductivity type semiconductor source region and anti-punch-through structure; the anti-punch-through structure is a second conductivity type semiconductor body contact region or metal structure; the lower surface of the anti-punch-through structure coincides with the upper surface of the first conductivity type semiconductor drift region or the distance between the two is less than 0.5 ?m, so that make the device avoid from punch-through. An anti-punch-through structure is introduced at the source end of the device to avoid punch-through breakdown caused by short channel and light-doped body region.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: March 31, 2020
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Ming Qiao, Zhengkang Wang, Ruidi Wang, Zhao Qi, Bo Zhang
  • Publication number: 20200066714
    Abstract: A BIPOLAR-CMOS-DMOS (BCD) semiconductor device and manufacturing method, which can integrate a Junction Field-Effect Transistor (JFET), two classes of Vertical Double-diffusion Metal Oxide Semiconductor (VDMOS), a Lateral Insulated-Gate Bipolar Transistor (LIGBT) and seven kinds of Laterally Diffused Metal Oxide Semiconductor (LDMOS), a low-voltage Negative channel Metal Oxide Semiconductor (NMOS), a low-voltage Positive channel Metal Oxide Semiconductor (PMOS), a low-voltage Negative-Positive-Negative (NPN) transistor and a low-voltage Positive-Negative-Positive (PNP) transistor, and a diode in the same chip. Bipolar devices in the analog circuit, power components in the switch circuit, Complementary Metal Oxide Semiconductor (CMOS) devices in the logic circuit and other kinds of lateral and vertical components are integrated. This present invention saves costs at the same time greatly improve chip integration.
    Type: Application
    Filed: January 24, 2019
    Publication date: February 27, 2020
    Applicant: University of Electronic Science and Technology of China
    Inventors: Ming QIAO, Song PU, Bo ZHANG
  • Patent number: 10510747
    Abstract: A BCD semiconductor device includes devices integrated on a single chip. The devices include a first high voltage nLIGBT device, a second high voltage nLIGBT device, a first high voltage nLDMOS device, a second high voltage nLDMOS device, a third high voltage nLDMOS device, a first high voltage pLDMOS device and low voltage NMOS, PMOS and PNP devices, and a diode device. A dielectric isolation is applied to the high voltage nLIGBT, nLDMOS and pLDMOS devices to realize a complete isolation between the high and low voltage devices. The nLIGBT, nLDMOS, NPN and low voltage NMOS and PMOS are integrated on the substrate of a single chip. The isolation region composed of the dielectric, the second conductivity type buried layer, the dielectric trench, and the first conductivity type implanted region realizes full dielectric isolation of high and low voltage devices. The six types of high voltage transistors have multiple channels.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: December 17, 2019
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Ming Qiao, Chunlan Lai, Linrong He, Li Ye, Bo Zhang
  • Patent number: 10476956
    Abstract: A device may include one or more processors. The device may receive an instruction identifying a set of objects to be generated by a kernel associated with the device. The kernel may generate the set of objects based on receiving information identifying a corresponding set of write operations. The device may provide a first message to cause the kernel to perform first operations corresponding to a first subset of objects of the set of objects. The device may receive one or more notifications indicating whether each operation, of the first operations, was successfully performed. The device may determine, based on whether each operation was successfully performed, a quantity of objects to include in a second subset of objects, of the set of objects. The device may provide a second message to cause the kernel to perform second operations corresponding to the second subset of objects.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: November 12, 2019
    Assignee: Juniper Networks, Inc.
    Inventors: Debi Prasad Sahoo, Ajay V Gaonkar, Eswaran Srinivasan, Madhu N. Kopalle, SelvaKumar Sivaraj, Rajagopalan Subbiah, MooJin Jeong, Ming Qiao
  • Publication number: 20190304966
    Abstract: The present invention provides a high voltage ESD protection device including a P-type substrate; a first NWELL region located on the left of the upper part of the P-type substrate; an NP contact region located on the upper part of the first NWELL region; an N+ contact region located on the right of the upper part of the P-type substrate apart from the first NWELL region; a P+ contact region tangential to the right side of the N+ contact region; a NTOP layer arranged on the right of the NP contact region inside the first NWELL region. The NP contact region is connected to a metal piece to form a metal anode. The N+ contact region and the P+ contact region are connected by a metal piece to form a metal cathode.
    Type: Application
    Filed: June 25, 2018
    Publication date: October 3, 2019
    Applicant: University of Electronic Science and Technology of China
    Inventors: Ming QIAO, Zhao QI, Jiamu XIAO, Longfei LIANG, Danye LIANG, Bo ZHANG
  • Publication number: 20190286361
    Abstract: In various embodiments, a computer-implemented method includes identifying data files in external storage, where the data files correspond to a computer software application (application) on a mobile device. The method may also include sorting the one or more data files into different access levels. The method may also include predicting the sorted one or more data files that will be accessed on the mobile device using a prediction engine. The method may also include locating the predicted one or more data files in the external storage using a migration map. The method may also include determining whether the predicted one or more data files were previously migrated to the external storage from the mobile device. The method may also include migrating the predicted one or more data files from the external storage to the mobile device.
    Type: Application
    Filed: June 5, 2019
    Publication date: September 19, 2019
    Inventors: Kai Yao Cao, Ming Qiao Shang Guan, Hui Wang, Ying-Chen Yu, Jia Wei Zhou
  • Publication number: 20190237576
    Abstract: A power semiconductor device including a first conductivity type semiconductor substrate, a drain metal electrode, a first conductivity type semiconductor drift region, and a second conductivity type semiconductor body region. The second conductivity type semiconductor body region includes a first conductivity type semiconductor source region and anti-punch-through structure; the anti-punch-through structure is a second conductivity type semiconductor body contact region or metal structure; the lower surface of the anti-punch-through structure coincides with the upper surface of the first conductivity type semiconductor drift region or the distance between the two is less than 0.5 ?m, so that make the device avoid from punch-through. An anti-punch-through structure is introduced at the source end of the device to avoid punch-through breakdown caused by short channel and light-doped body region.
    Type: Application
    Filed: April 18, 2018
    Publication date: August 1, 2019
    Applicant: University of Electronic Science and Technology of China
    Inventors: Ming QIAO, Zhengkang WANG, Ruidi WANG, Zhao QI, Bo ZHANG
  • Patent number: 10353617
    Abstract: In various embodiments, a computer-implemented method includes identifying data files in external storage, where the data files correspond to a computer software application (application) on a mobile device and where the data files were previously stored on the mobile device. The method may also include sorting the data files into different access levels, where the access levels designate a hierarchy for the data files. The method may also include predicting the sorted data files that will be accessed on the mobile device using a prediction engine. The method may also include locating, in response to the predicting, the predicted data files in the external storage. The method may also include migrating the predicted data files from the external storage to the mobile device, where the migrating is done in order of the access levels.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: July 16, 2019
    Assignee: International Business Machines Corporation
    Inventors: Kai Yao Cao, Ming Qiao Shang Guan, Hui Wang, Ying-Chen Yu, Jia Wei Zhou
  • Patent number: 10248355
    Abstract: In various embodiments, a computer-implemented method includes identifying computer software applications (applications) on a mobile device. The method may also include generating migration profiles for the applications, where each application corresponds (corresponding application) to a migration profile and where the migration profile includes data files about the corresponding application. The method may also include monitoring storage space of the applications on the mobile device, where the monitoring includes identifying data files of the applications. The method may also include calculating an amount of storage space to determine whether there is a shortage of storage space for the data files. The method may also include, in response to calculating that there is a shortage of storage space, determining when the data files will be migrated. The method may also include, in response to determining when the data files will be migrated, migrating the data files to external storage.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: April 2, 2019
    Assignee: International Business Machines Corporation
    Inventors: Kai Yao Cao, Ming Qiao Shang Guan, Hui Wang, Ying-Chen Yu, Jia Wei Zhou
  • Patent number: 10068965
    Abstract: The present invention relates to a lateral high-voltage device. The device includes a dielectric trench region. A doping-overlapping structure with different doping types alternating mode is provided at least below, on a left side of, or on a right side of the dielectric trench region. The device also includes a dielectric layer, a body field plate, a polysilicon gate, a gate oxide layer, a first N-type heavy doping region, a second N-type heavy doping region, a P-type heavy doping region, a P-well region, the first N-type doping pillar, the second N-type doping pillar, the third N-type doping pillar, the first P-type doping pillar, and the second P-type doping pillar. The invention adopts a dielectric trench region in the drift region to keep the breakdown voltage BV of the device while reducing the surface area of the device, and effectively reducing the device's specific On-Resistance RON,sp.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: September 4, 2018
    Assignee: University of Electronic Science and Technology of China
    Inventors: Ming Qiao, Yang Yu, Wentong Zhang, Zhengkang Wang, Zhenya Zhan, Bo Zhang
  • Publication number: 20180239555
    Abstract: In various embodiments, a computer-implemented method includes identifying computer software applications (applications) on a mobile device. The method may also include generating migration profiles for the applications, where each application corresponds (corresponding application) to a migration profile and where the migration profile includes data files about the corresponding application. The method may also include monitoring storage space of the applications on the mobile device, where the monitoring includes identifying data files of the applications. The method may also include calculating an amount of storage space to determine whether there is a shortage of storage space for the data files. The method may also include, in response to calculating that there is a shortage of storage space, determining when the data files will be migrated. The method may also include, in response to determining when the data files will be migrated, migrating the data files to external storage.
    Type: Application
    Filed: February 22, 2017
    Publication date: August 23, 2018
    Inventors: Kai Yao Cao, Ming Qiao Shang Guan, Hui Wang, Ying-Chen Yu, Jia Wei Zhou
  • Publication number: 20180239556
    Abstract: In various embodiments, a computer-implemented method includes identifying data files in external storage, where the data files correspond to a computer software application (application) on a mobile device and where the data files were previously stored on the mobile device. The method may also include sorting the data files into different access levels, where the access levels designate a hierarchy for the data files. The method may also include predicting the sorted data files that will be accessed on the mobile device using a prediction engine. The method may also include locating, in response to the predicting, the predicted data files in the external storage. The method may also include migrating the predicted data files from the external storage to the mobile device, where the migrating is done in order of the access levels.
    Type: Application
    Filed: August 3, 2017
    Publication date: August 23, 2018
    Inventors: Kai Yao Cao, Ming Qiao Shang Guan, Hui Wang, Ying-Chen Yu, Jia Wei Zhou
  • Patent number: 9982316
    Abstract: The present invention provides processes for catalytic deconstruction of biomass using a solvent produced in a bioreforming reaction.
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: May 29, 2018
    Assignee: Virent, Inc.
    Inventors: Ming Qiao, Randy D. Cortright, Elizabeth Woods
  • Patent number: 9873837
    Abstract: Methods, reactor systems, and catalysts are provided for converting in a continuous process biomass to fuels and chemicals, including methods of converting the water insoluble components of biomass, such as hemicellulose, cellulose and lignin, to volatile C2+O1-2 oxygenates, such as alcohols, ketones, cyclic ethers, esters, carboxylic acids, aldehydes, and mixtures thereof. In certain applications, the volatile C2+O1-2 oxygenates can be collected and used as a final chemical product, or used in downstream processes to produce liquid fuels, chemicals and other products.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: January 23, 2018
    Assignee: Virent, Inc.
    Inventors: Ming Qiao, Elizabeth Woods, Paul Myren, Randy Cortright, John Kania
  • Publication number: 20170369955
    Abstract: The present invention provides processes for catalytic deconstruction of biomass using a solvent produced in a bioreforming reaction.
    Type: Application
    Filed: August 21, 2017
    Publication date: December 28, 2017
    Inventors: Ming Qiao, Randy D. Cortright, Elizabeth Woods
  • Patent number: 9765261
    Abstract: The present invention provides processes for deconstructing biomass to produce aqueous and organic products using a solvent produced in a bioreforming reaction.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: September 19, 2017
    Assignee: Virent, Inc.
    Inventors: Ming Qiao, Elizabeth Woods, Paul Myren, Randy Cortright, Sean Connolly
  • Patent number: 9738944
    Abstract: The present invention provides processes for catalytic deconstruction of biomass using a solvent produced in a bioreforming reaction.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: August 22, 2017
    Assignee: Virent, Inc.
    Inventors: Ming Qiao, Randy D. Cortright, Elizabeth Woods
  • Patent number: 9725777
    Abstract: The present invention provides processes for deconstructing biomass using a solvent produced in a bioreforming reaction.
    Type: Grant
    Filed: November 10, 2016
    Date of Patent: August 8, 2017
    Assignee: Virent, Inc.
    Inventors: Ming Qiao, Randy D. Cortright, Dick A. Nagaki
  • Publication number: 20170137719
    Abstract: The present invention provides processes for deconstructing biomass to produce aqueous and organic products using a solvent produced in a bioreforming reaction.
    Type: Application
    Filed: January 27, 2017
    Publication date: May 18, 2017
    Applicant: Virent, Inc.
    Inventors: Ming Qiao, Elizabeth Woods, Paul Myren, Randy Cortright, Sean Connolly