Abstract: Methods and apparatuses for wafer level packaging (WLP) semiconductor devices are disclosed. A redistribution layer (RDL) is formed on a first passivation layer in contact with a conductive pad over a surface of a die. The RDL layer is on top of a first region of the first passivation layer. A second passivation layer is formed on the RDL layer with an opening to expose the RDL layer, and over the first passivation layer. An under bump metallization (UBM) layer is formed over the second passivation layer in contact with the exposed RDL layer. A second region of the first passivation layer disjoint from the first region is determined by projecting an outer periphery of a solder ball or other connector onto the surface.

Abstract: A die has a first surface, a second surface opposite the first surface, and sidewalls includes a first portion and a second portion, wherein the first portion is closer to the first surface than the second portion. A fillet contacts the first portion of sidewalls of the die and encircles the die. A work piece is bonded to the die through solder bumps, with the second surface facing the work piece. A first underfill is filled a gap between the die and the work piece, wherein the first underfill contacts the fillet, and wherein the first underfill and the fillet are formed of different materials.

Abstract: An integrated circuit includes at least one transistor over a substrate, and a first guard ring disposed around the at least one transistor. The integrated circuit further includes a second guard ring disposed around the first guard ring. The integrated circuit further includes a first doped region disposed adjacent to the first guard ring, the first doped region having a first dopant type. The integrated circuit further includes a second doped region disposed adjacent to the second guard ring, the second doped region having a second dopant type.

Abstract: A method for forming interconnect structures comprises forming a metal line made of a first conductive material over a substrate, depositing a dielectric layer over the metal line, patterning the dielectric layer to form an opening, depositing a first barrier layer on a bottom and sidewalls of the opening using an atomic layer deposition technique, depositing a second barrier layer over the first barrier layer, wherein the first barrier layer is coupled to ground and forming a pad made of a second conductive material in the opening.

Abstract: A method of detecting hepatocellular carcinoma includes the steps of: detecting a methylation level of a CpG site of HOXA9 gene in a biological sample taken from a suspected subject; and comparing the methylation level to a reference methylation level of a CpG site of HOXA9 gene in another biological sample taken from a normal subject not suffering from hepatocellular carcinoma, wherein when the methylation level is higher than the reference methylation level, the suspected subject is likely to suffer from hepatocellular carcinoma, and wherein each of the biological samples is selected from the group consisting of a blood sample, a serum sample, and a plasma sample.

Abstract: A biological analysis system is provided. The system comprises an interchangeable assembly configured to accommodate any one of a plurality of sample holders, each respective sample holder configured to receive a plurality of samples. The system also includes a control system configured to cycle the plurality of samples through a series of temperatures. The system further includes an optical system configured to detect fluorescent signals emitted from the plurality of samples. The optical system, in particular, can comprise a single field lens, an excitation source, an optical sensor, and a plurality of filter components. The excitation source can be one or more light emitting diodes. The field lens can be a bi-convex lens.

Abstract: A method for forming an integrated circuit. The method includes forming a first guard ring around at least one transistor over a substrate, the first guard ring having a first type dopant. The method further includes forming a second guard ring around the first guard ring, the second guard ring having a second type dopant. The method includes forming a first doped region adjacent to the first guard ring, the first doped region having the second type dopant. The method further includes forming a second doped region adjacent to the second guard ring, the second doped region having the first type dopant, wherein the first guard ring, the second guard ring, the first doped region, and the second doped region are capable of being operable as a first silicon controlled rectifier (SCR) to substantially release an electrostatic discharge (ESD).

Abstract: Methods and apparatuses for wafer level packaging (WLP) semiconductor devices are disclosed. A redistribution layer (RDL) is formed on a first passivation layer in contact with a conductive pad over a surface of a die. The RDL layer is on top of a first region of the first passivation layer. A second passivation layer is formed on the RDL layer with an opening to expose the RDL layer, and over the first passivation layer. An under bump metallization (UBM) layer is formed over the second passivation layer in contact with the exposed RDL layer. A second region of the first passivation layer disjoint from the first region is determined by projecting an outer periphery of a solder ball or other connector onto the surface.

Abstract: Methods and apparatuses for wafer level packaging (WLP) semiconductor devices are disclosed. A redistribution layer (RDL) is formed on a first passivation layer in contact with a conductive pad over a surface of a die. The RDL layer is on top of a first region of the first passivation layer. A second passivation layer is formed on the RDL layer with an opening to expose the RDL layer, and over the first passivation layer. An under bump metallization (UBM) layer is formed over the second passivation layer in contact with the exposed RDL layer. A second region of the first passivation layer disjoint from the first region is determined by projecting an outer periphery of a solder ball or other connector onto the surface.

Abstract: Embodiments of the invention relate to an electrostatic discharge (ESD) device and method for forming an ESD device. An embodiment is an ESD protection device comprising a p well disposed in a substrate, an n well disposed in the substrate, a high voltage n well (HVNW) disposed between the p well and the n well in the substrate, a source n+ region disposed in the p well, and a plurality of drain n+ regions disposed in the n well.

Abstract: The present invention provides a plasma torch device. The device comprises a front electrode, a back electrode and a vortex flow generator. The torch roots of the back electrode are moved by fixed magnets. By controlling the magnets coordinated with vortex air flow, the torch roots are moved back and forth periodically on inner surface of the back electrode. The torch roots do not stay at the same place for long for preventing increasing local heat burden of the electrode. Thus, life time and maintenance cycle of the electrode is prolonged with reduced operational cost of plasma torch and enhanced reliability of the device.

Abstract: Methods and apparatuses for wafer level packaging (WLP) semiconductor devices are disclosed. A redistribution layer (RDL) is formed on a first passivation layer in contact with a conductive pad over a surface of a die. The RDL layer is on top of a first region of the first passivation layer. A second passivation layer is formed on the RDL layer with an opening to expose the RDL layer, and over the first passivation layer. An under bump metallization (UBM) layer is formed over the second passivation layer in contact with the exposed RDL layer. A second region of the first passivation layer disjoint from the first region is determined by projecting an outer periphery of a solder ball or other connector onto the surface.

Abstract: A dual-mode non-thermal plasma reactor includes an air-buffering chamber, a magnetic element provided on the air-buffering chamber, a first electrode disposed in the air-buffering chamber, a second electrode disposed in the air-buffering chamber opposite to the first electrode, a high-voltage power supply connected to the first and second electrodes and an air-swirling chamber located between the first and second electrodes. The air-swirling chamber includes a first isolating film covering on an internal side of the first electrode, a second isolating film covering on an internal side of the second electrode and an isolating tube placed between the first and second isolating films. An air passageway is defined through the first and second isolating films. An air-swirling space is defined by the first and second isolating films and the isolating tube. The isolating tube includes at least one tunnel in communication with the air-swirling space.

Abstract: Embodiments of the invention relate to an electrostatic discharge (ESD) device and method for forming an ESD device. An embodiment is an ESD protection device comprising a p well disposed in a substrate, an n well disposed in the substrate, a high voltage n well (HVNW) disposed between the p well and the n well in the substrate, a source n+ region disposed in the p well, and a plurality of drain n+ regions disposed in the n well.

Abstract: An integrated circuit includes at least one transistor over a substrate. A first guard ring is disposed around the at least one transistor. The first guard ring has a first type dopant. A second guard ring is disposed around the first guard ring. The second guard ring has a second type dopant. A first doped region is disposed adjacent to the first guard ring. The first doped region has the second type dopant. A second doped region is disposed adjacent to the second guard ring. The second doped region has the first type dopant. The first guard ring, the second guard ring, the first doped region, and the second doped region are capable of being operable as a first silicon controlled rectifier (SCR) to substantially release an electrostatic discharge (ESD).

Abstract: A die has a first surface, a second surface opposite the first surface, and sidewalls includes a first portion and a second portion, wherein the first portion is closer to the first surface than the second portion. A fillet contacts the first portion of sidewalls of the die and encircles the die. A work piece is bonded to the die through solder bumps, with the second surface facing the work piece. A first underfill is filled a gap between the die and the work piece, wherein the first underfill contacts the fillet, and wherein the first underfill and the fillet are formed of different materials.

Abstract: The invention provides a plurality of embryonic stem cell-like progenitor cells, which are isolated from a human tissue by a systemic screening of human mesenchymal stromal stem/progenitor cells and a cell sorting by a cell antigen selected from the group consisting of CD34, CD117, CD133, CD201, GloboH and combination thereof, and cultured in a medium supplemented with at least one or more steroids and one or more growth factors. The cells of the invention express CD34 and exhibit sphere-like clonogenicity in early passages and express multipotent embryonic stem cells (ESCs) like characteristics.

Abstract: A keyboard module is disclosed, which comprises: a keyboard; a first connecting cable; a second connecting cable; and a switch unit; wherein, the first connecting cable is arranged extending out from the keyboard and is connected to a connector of the switch unit, while the second connecting cable is also connected to the connector for electrically connecting the first connecting cable to the second connecting cable; and the second connecting cable is formed with a predefined length and shape that is specifically designed for connecting the same to a main circuit board. Thereby, the keyboard can be connected to different main circuit boards with different circuit layouts simply by changing the shape and length of its second connecting cable for mating with the design of the main circuit board that is to be connected without any other alteration in its specification, so that the universality of the keyboard is enhanced.

Abstract: A method for forming well-aligned metallic nanowires includes: (a) providing a substrate formed with a crystal layer thereon; (b) disposing the substrate in such a manner that the crystal layer faces downwardly; (c) applying a metal salt solution, which contains metal ions therein, to the crystal layer on the substrate; and (d) subjecting the metal ions in the metal salt solution on the crystal of TiO2 layer to a reduction treatment, thereby resulting in reduced metal that grows downward toward earth's gravity.

Abstract: A dual-mode non-thermal plasma reactor includes an air-buffering chamber, a magnetic element provided on the air-buffering chamber, a first electrode disposed in the air-buffering chamber, a second electrode disposed in the air-buffering chamber opposite to the fist electrode, a high-voltage power supply connected to the first and second electrodes and an air-swirling chamber located between the first and second electrodes. The air-swirling chamber includes a first isolating film covering on an internal side of the first electrode, a second isolating film covering on an internal side of the second electrode and an isolating tube placed between the first and second isolating films. An air passageway is defined through the first and second isolating films. An air-swirling space is defined by the first and second isolating films and the isolating tube. The isolating tube includes at least one tunnel in communication with the air-swirling space.