Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including an optical device within or on a semiconductor substrate. A light guide structure overlies the optical device. A first etch stop layer extends along first sidewalls and a lower surface of the light guide structure. A second etch stop layer overlies the first etch stop layer and extends along second sidewalls of the light guide structure.

Abstract: A fluid collecting apparatus includes a housing, a gripping member, an inlet, and an outlet. The housing includes a chamber. The gripping member is movable within the chamber, extendable toward or retractable away from a tank, and is configured to hold a computing device. The inlet is communicable with the chamber and configured to deliver a gas into the chamber. The outlet is communicable with the chamber and configured to discharge the gas out of the chamber. A method of operating a cooling system includes receiving the tank, a coolant held by the tank, and a computing device immersed in the coolant, disposing the fluid collecting apparatus over the tank, moving the computing device into the chamber by the gripping member; supplying a gas from the inlet to be blown against the computing device; and discharging the gas and a vaporized coolant out of the chamber through the outlet.

Abstract: In a method for manufacturing a memory device, a plurality of first insulating layers and a bottom select gate (BSG) layer are formed over a substrate, where the first insulating layers are disposed between the substrate and the BSG layer. One or more first dielectric trenches are formed to pass through the BSG layer and the first insulating layers, and extend in a length direction of the substrate. A plurality of word line layers and a plurality of second insulating layers are formed over the BSG layer, where the second insulating layers are disposed between the BSG layer and the word line layers. One or more common source regions are formed over the substrate to extend in the length direction of the substrate, and further extend through the BSG layer, the first insulating layers, the word line layers, and the second insulating layers.

Abstract: Methods of fabricating solar cells having a plurality of sub-cells coupled by cell level interconnection, and the resulting solar cells, are described herein. In an example, a solar cell includes a plurality of sub-cells. Each of the plurality of sub-cells includes a singulated and physically separated semiconductor substrate portion. Each of the plurality of sub-cells includes an on-sub-cell metallization structure interconnecting emitter regions of the sub-cell. An inter-sub-cell metallization structure couples adjacent ones of the plurality of sub-cells. The inter-sub-cell metallization structure is different in composition from the on-sub-cell metallization structure.

Abstract: Some implementations described herein provide techniques and apparatuses for determining a performance of a dry-clean operation within a deposition tool. A cleaning-control subsystem of the deposition tool may include a gas concentration sensor and a temperature sensor mounted in an exhaust system of the deposition tool to monitor the dry-clean operation. The gas concentration sensor may provide data related to a concentration of a chemical compound in a cleaning gas, where the chemical compound is a bi-product of the dry-clean operation. The temperature sensor may provide temperature data related to an exothermic reaction of the dry-clean operation. Such data may be used to determine an efficiency and/or an effectiveness of the dry-clean operation within the deposition tool.

Abstract: The storage device that includes a non-volatile memory with a control circuitry that is communicatively coupled to an array of memory cells that are arranged in a plurality of word lines. The control circuitry is configured to program the memory cells in a plurality of programming loops. The programming loops include applying a programming pulse to a selected word line of the plurality of word lines. The programming loops also include applying a verify pulse VN to the selected word line to simultaneously verify a lower tail of the memory cells being programmed to a data state N and an upper tail of the memory cells that have been programmed to a data state N?1. The data state N?1 has a lower voltage threshold than the data state N.

Abstract: A rolling device capable of applying horizontal vibration for metal clad plates includes two symmetrically arranged support frames, an upper roller and a lower roller both of which are provided between the two support frames and parallel to each other, four bearing seats which are fixed with two ends of the upper roller and two ends of the lower roller respectively, and four horizontal vibration apparatuses which are provided outside the four bearing seats respectively for driving the upper roller and the lower roller to horizontally vibrate. Every horizontal vibration apparatus includes an exciting hydraulic cylinder and a damper. One end of the exciting hydraulic cylinder and one end of the damper are fixedly connected with two sides of one of the four bearing seats respectively. Every horizontal vibration apparatus is provided outside one of the four bearing seats.

Abstract: A memory cell includes: a first contact feature partially embedded in a first dielectric layer; a barrier layer, lining the first contact feature, that comprises a first portion disposed between the first contact feature and first dielectric layer, and a second portion disposed above the first dielectric layer; a resistive material layer disposed above the first contact feature, the resistive material layer coupled to the first contact feature through the second portion of the barrier layer; and a second contact feature embedded in a second dielectric layer above the first dielectric layer.

Abstract: A semiconductor package includes a substrate, a first die, a second die, a resistant layer, an encapsulant and an interlink structure. The first die has a first thickness larger than a second thickness of the second die. The resistant layer is disposed on the first and second dies and conformally covers the first and second dies. The encapsulant is disposed on the resistant layer and wraps around the first and second dies. The interlink structure is disposed above the first and second dies and embedded in the encapsulant, and the interlink structure is electrically connected with the first and second dies. The interlink structure includes a first via portion vertically extending through the encapsulant and connected to the first die, a second via portion extending vertically through the encapsulant and connected to the second die, and a routing line portion disposed on and connected with the first and second via portions, and the first via portion is shorter than the second via portion.

Abstract: There is provided an auto detection system including a thermal detection device and a host. The host controls an indication device to indicate a prompt message or detection results according to a slope variation of voltage values or 2D distribution of temperature values detected by the thermal detection device, wherein the voltage values include the detected voltage of a single pixel or the sum of detected voltages of multiple pixels of a thermal sensor.

Abstract: An OLED display substrate, a manufacturing method and a display device are provided. The OLED display substrate includes a base substrate and a plurality of pixel units arranged on the base substrate, each pixel unit includes a plurality of subpixel units, and each subpixel unit includes a switching TFT and a bottom-emission OLED, the OLED display substrate further includes a light-shielding layer arranged between the OLED and the switching TFT, and an orthogonal projection of the light-shielding layer onto the base substrate completely covers an orthogonal projection of a semiconductor region of the switching TFT onto the base substrate.

Abstract: In an approach for proactive service group based auto-scaling, a processor collects usage data generated in one or more services in a container platform. A processor predicts access situation and resource utilization of the one or more services based on the usage data. A processor constructs a dynamic correlation topology among the one or more services based on the access situation and resource utilization. A processor identifies associated services correlated with the one or more services based on the dynamic correlation topology. A processor, in response to a service request exceeding a pre-set threshold, expands the one or more services and associated services.

Abstract: The online detection system for type identification and activity measurement of radiations in gas or liquid is provided, which can capture the light signals generated by different radiations in real time, and convert the light signals into the electrical signals, so as to realize the online type identification and activity measurement of the radiations based on the waveforms and the time information of the electrical signals of the different radiations. In addition, based on the characteristic that different radiations have different penetration capabilities, the inner-outer two-layer activity measurement structure is designed, which can discriminate the radiations with the same waveform. Therefore, the present disclosure simplifies the radiation activity measurement process, thereby greatly improving the efficiency of the radiation activity measurement.

Abstract: A method of cleaning a nozzle of a gas supply system includes loading an apparatus including a carrier and an automated nozzle cleaning system in the carrier onto a load port containing a gas supply system. The automated nozzle cleaning system includes a first nozzle cleaning device, a second nozzle cleaning device and a monitoring device, and the carrier is positioned to enable a gas inlet of the carrier to be connected to a nozzle of the gas supply system. The method also includes vacuuming contaminant particles from the nozzle using the first nozzle cleaning device, mechanically removing the contaminant particles adhering to the nozzle off the nozzle using the second nozzle cleaning device, and measuring a level of the contaminant particles using the monitoring device.

Abstract: The present application discloses an image transmission device and method. The image transmission device includes a receiver configured to receive pixel data in image data from a camera in sequence and buffer the pixel data into a memory, and determine, upon reception of a line of pixel data, a line number of the line of pixel data in the image data and a frame number of the image data; and a processor configured to obtain the line of pixel data, the line number of the line of pixel data and the frame number of the image data from the receiver, package the obtained line of pixel data, line number of the line of pixel data and frame number of the image data into a data packet, and transmit the data packet to a server.

Abstract: The disclosure discloses an array substrate and a preparation method thereof, a display panel and a display device. The array substrate includes: a substrate, and a first metal layer, a metal oxide layer and a second metal layer which are sequentially stacked and isolated from each other on the substrate; the first metal layer includes a light shading metal, a first electrode, and an anti-static line; the metal oxide layer includes a first active layer; the second metal layer includes a gate line and a second electrode; the gate line is connected with the anti-static line through a first TFT, one of the first electrode and the second electrode forms the source and drain electrodes of the first TFT, and the other forms the gate electrode of the first TFT; and the source is electrically connected with the gate line, and the drain is electrically connected with the anti-static line.

Abstract: Disclosed is a storage device. The storage device comprises a box body, at least one door body and an automatic door-opening assembly for opening the at least one door body. The automatic door-opening assembly comprises a housing and at least one automatic door-opening device. The housing is fixedly connected to the box body. Each automatic door-opening device is at least partially provided on a side, close to the box body, of the housing, and is fixedly connected to the housing, so as to fix the at least one automatic door-opening device. In the storage device of the present invention, the automatic door-opening device is first fixed to the housing to form an integrated assembly, and then the assembly is fixedly connected to the box body.

Abstract: A semiconductor structure includes a dielectric layer, a conductive pad embedded in the dielectric layer, a semiconductor substrate disposed on the dielectric layer and including a via opening with a notch in proximity to the dielectric layer, a through substrate via (TSV) disposed in the via opening of the semiconductor substrate and extending into the dielectric layer to land on the conductive pad, and a dielectric liner disposed in the via opening of the semiconductor substrate and filling the notch to laterally separate the TSV from the semiconductor substrate. A surface of the dielectric liner facing the TSV is substantially leveled with an inner sidewall of the dielectric layer facing the TSV.

Abstract: Some implementations described herein provide techniques and apparatuses for overcoming forces that may deflect an injector nozzle into an interior wall of a thin-film furnace. The implementations include a fixture that is coupled to the injector nozzle. The fixture is configurable to lock to a selected property of the injector nozzle to maintain, between a portion of the injector nozzle and the interior wall, a gap. In this way, the portion of the injector nozzle is prevented from colliding with the interior wall and dislodging particulates that may contaminate semiconductor product fabricated using the thin-film furnace.

Abstract: A wideband power amplifier (PA) linearization technique is proposed. A current interpolation technique is proposed to linearize power amplifiers over a wide bandwidth. The wideband power amplifier linearization technique employs a novel transconductance Gm linearizer using a current interpolation technique that achieves improvement in the third order intermodulation over wide bandwidth for a sub-micron CMOS differential power amplifier. By using a small amount of compensating bias into an opposite phase differential pair, linearization over wide bandwidth is achieved and can be optimized by adjusting the compensating bias.