Patents by Inventor Minoru Harada
Minoru Harada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150332445Abstract: The purpose of the present invention is to easily extract, from samples to be observed, defect candidates that can be labeled as a defect or “nuisance” (a part for which a manufacturing tolerance or the like is erroneously detected) and to allow parameters pertaining to observation processing to be easily adjusted. This defect observation method comprises: an imaging step to image, on the basis of defect information from an inspection device, an object to be inspected and obtain a defect image and a reference image corresponding to the defect image; a parameter determining step to determine a first parameter to be used in the defect extraction by using a first feature set distribution acquired from the reference image and the defect image captured in the imaging step and a second feature net distribution acquired from the reference image; and an observing step to observe using the first parameter determined in the parameter determining step.Type: ApplicationFiled: December 6, 2013Publication date: November 19, 2015Inventors: Minoru HARADA, Yuji TAKAGI, Ryo NAKAGAKI, Takehiro HIRAI, Hirohiko KITSUKI
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Publication number: 20150302568Abstract: Cases in which defects are analyzed in a manufacturing process stage in which a pattern is not formed or in a manufacturing process in which a pattern formed on a lower layer does not appear in the captured image are increasing. However, in these cases, there is a problem of not being able to synthesize a favorable reference image and failing to detect a defect when a periodic pattern cannot be recognized in the pattern. In the present invention, a defect occupation rate, which is the percentage of an image being inspected occupied by a defect region, is found, it is determined whether the defect occupation rate is higher or lower than a threshold, and, in accordance with the determination results, it is determined whether to create, as the reference image, an image comprising pixels having the average luminance value of the luminance values of a plurality of pixels contained in the image being inspected.Type: ApplicationFiled: November 29, 2013Publication date: October 22, 2015Inventors: Takehiro HIRAI, Ryo NAKAGAKI, Minoru HARADA
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Patent number: 9165356Abstract: A defect inspection method for inspecting a defect on a semiconductor wafer, using plural inspection methods includes: merging hot-spot coordinates as coordinates on the semiconductor wafer, designated by a user, or coordinates where a systematic defect can occur, with detected defect coordinates on the semiconductor wafer, acquired from inspection information, after information indicating the type of coordinates are added thereto; deciding an inspection sequence of the coordinates merged with each other; and defect inspection for executing selection using the information indicating the respective types of the coordinates merged with each other, and executing an inspection by selecting an inspection method for every coordinates to be inspected.Type: GrantFiled: July 6, 2012Date of Patent: October 20, 2015Assignee: Hitachi High-Technologies CorporationInventors: Minoru Harada, Atsushi Miyamoto, Takehiro Hirai, Fumihiko Fukunaga
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Publication number: 20140375793Abstract: A method for measuring overlay at a semiconductor device on which circuit patterns are formed by a plurality of exposure processes is characterized in including an image capturing step for capturing images of a plurality of areas of the semiconductor device, a reference image setting step for setting a reference image based on a plurality of the images captured in the image capturing step, a difference quantifying step for quantifying a difference between the reference image set in the reference image setting step and the plurality of images captured in the image capturing step, and an overlay calculating step for calculating the overlay based on the difference quantified in the difference quantifying step.Type: ApplicationFiled: February 6, 2013Publication date: December 25, 2014Inventors: Minoru Harada, Ryo Nakagaki, Fumihiko Fukunaga, Yuji Takagi
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Publication number: 20140331173Abstract: Provided is a GUI including: an unadded pane region that hierarchically displays folders which are sets of images having no class information added thereto; an image pane region that displays the images displayed in the unadded pane region, the displayed images having no classification added thereto; and a class pane region that displays images having classification added thereto, wherein by externally inputting class information for one image having the class information added thereto, the input class information is displayed.Type: ApplicationFiled: November 26, 2012Publication date: November 6, 2014Inventors: Yohei Minekawa, Yuji Takagi, Minoru Harada, Takehiro Hirai, Ryo Nakagaki
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Publication number: 20140219546Abstract: A method for reviewing defect, comprising the steps of: as an image acquisition step, imaging a surface of a sample using arbitrary image acquisition condition selected from a plurality of image acquisition conditions and obtaining a defect image; as a defect position calculation step, proceeding the defect image obtained by the image acquisition step and calculating a defect position on the surface of the sample; as a defect detection accuracy calculation step, obtaining a defect detection accuracy of the defect position calculated by the defect position calculation step; and as a conclusion determination step, determinating whether the defect detection accuracy obtained by the defect detection accuracy calculation step meets a predetermined requirement or not; wherein until it is determined that the defect detection accuracy obtained by the defect detection accuracy calculation step meets a predetermined in the conclusion determination step, the image acquisition condition is selected from the plurality ofType: ApplicationFiled: July 6, 2012Publication date: August 7, 2014Applicant: Hitachi High-Technologies CorporationInventors: Yohei Minekawa, Kenji Nakahira, Minoru Harada, Takehiro Hirai, Ryo Nakagaki
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Publication number: 20140169657Abstract: A defect inspection method for inspecting a defect on a semiconductor wafer, using plural inspection methods includes: merging hot-spot coordinates as coordinates on the semiconductor wafer, designated by a user, or coordinates where a systematic defect can occur, with detected defect coordinates on the semiconductor wafer, acquired from inspection information, after information indicating the type of coordinates are added thereto; deciding an inspection sequence of the coordinates merged with each other; and defect inspection for executing selection using the information indicating the respective types of the coordinates merged with each other, and executing an inspection by selecting an inspection method for every coordinates to be inspected.Type: ApplicationFiled: July 6, 2012Publication date: June 19, 2014Applicant: Hitachi High-Technologies CorporationInventors: Minoru Harada, Atsushi Miyamoto, Takehiro Hirai, Fumihiko Fukunaga
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Patent number: 8731275Abstract: Disclosed is a method for reviewing defects in a large number of samples within a short period of time through the use of a defect review apparatus. To collect defect images steadily and at high throughput, a defect detection method is selected before imaging and set up for each of review target defects in the samples in accordance with the external characteristics of the samples that are calculated from the design information about the samples. The defect images are collected after an imaging sequence is set up for the defect images and reference images in such a manner as to reduce the time required for stage movement in accordance with the defect coordinates of the samples and the selected defect detection method.Type: GrantFiled: December 28, 2012Date of Patent: May 20, 2014Assignee: Hitachi High-Technologies CorporationInventors: Minoru Harada, Ryo Nakagaki, Kenji Obara, Atsushi Miyamoto
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Patent number: 8675949Abstract: The present invention relates to semiconductor inspection and provides a technology capable of efficiently detecting a systematic defect. In the present system, with regard to the process (S7, S8) of matching hot spot (HS) points that can be simulated in advance and defect points obtained as a result of a visual inspection each other and the unmatched defect points, a process (S6, S9) of classifying the defect points into groups based on similarity of pattern layout at the defect points to determine the defects belonging to a pattern layout where defects frequently occur, thereby reliably detecting the systematic defect. Also, with a process (S11) of acquiring an uneven distribution in a defect occurrence distribution on a wafer, the systematic defect occurring due to topography of the wafer can also be detected.Type: GrantFiled: March 25, 2010Date of Patent: March 18, 2014Assignee: Hitachi High-Technologies CorporationInventors: Yuji Takagi, Minoru Harada, Yuichi Hamamura
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Publication number: 20140072204Abstract: In automatic defect classification, a classification recipe must be set for each defect observation device. If a plurality of devices operate at the same stage, the classification class in the classification recipes must be the same. Problems have arisen whereby differences occur in the classification class in different devices when a new classification recipe is created. This defect classification system has a classification recipe storage unit; an information specification unit, the stage of a stored image, and device information. A corresponding defect specification unit specifies images of the same type of defect from images obtained from different image pickup devices at the same stage. An image conversion unit converts the images obtained from the different image pickup devices at the same stage into comparable similar images; and a recipe update unit records the classification classes in the classification recipes corresponding to the specified images of the same type of defect.Type: ApplicationFiled: April 16, 2012Publication date: March 13, 2014Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Yohei Minekawa, Yuji Takagi, Minoru Harada, Takehiro Hirai, Ryo Nakagaki
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Publication number: 20140037188Abstract: A candidate-defect classification method, including acquiring a scanning electron microscope image of a candidate defect detected on a sample including a pattern; computing a feature value of the candidate defect by processing the image; executing defect classification of the candidate defect as a pattern shape defect or another defect, by using the computed feature value; acquiring positional information contained in design data of the pattern regarding the candidate defect; and extracting a systematic defect from candidate defects classified as pattern shape defects, by comparing the positional information contained in the design data of the acquired candidate defect to positional information of a portion having a high probability of causing pattern formation failure, and that has been obtained from the design data of the pattern, or a systematic defect caused due to a layout shape of the pattern, or properties of a processor for forming the pattern.Type: ApplicationFiled: August 20, 2013Publication date: February 6, 2014Applicant: Hitachi High-Technologies CorporationInventors: Ryo Nakagaki, Minoru Harada, Takehiro Hirai
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Patent number: 8634634Abstract: Provided is a defect observation apparatus capable of analyzing a structure such as an arrangement and a vertical relationship of a circuit pattern formed by using design information of a sample, creating a non-defective product image from a defect image based on the analysis results, and detecting a defect by comparative inspection.Type: GrantFiled: December 21, 2009Date of Patent: January 21, 2014Assignee: Hitachi High-Technologies CorporationInventors: Minoru Harada, Ryo Nakagaki, Kenji Obara
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Publication number: 20130294680Abstract: In an apparatus for automatically classifying an image picked up of a defect on a semiconductor wafer according to user defined class, when images picked up by a plurality of different observation apparatuses are inputted in a mixed manner, the defect image classification accuracy rate decreases due to image property differences corresponding to differences in the observation apparatuses. In an automatic image classification apparatus supplied with defect images picked up by a plurality of observation apparatuses, when preparing a recipe, image process parameters are adjusted and a classification discriminating surface is prepared for each observation apparatus.Type: ApplicationFiled: December 7, 2011Publication date: November 7, 2013Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Minoru Harada, Ryo Nakagaki, Takehiro Hirai
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Patent number: 8526710Abstract: A candidate-defect classification method includes the steps of acquiring a scanning electron microscope (SEM) image of a candidate defect detected in an inspection from a sample including a pattern formed thereon, the inspection being preliminarily performed by an other inspection device; computing a feature value of the candidate defect by processing the SEM image; executing defect classification of the candidate defect as any one of a pattern shape defect and an other defect by using the computed feature value; acquiring positional information contained in design data of the pattern with respect to a candidate defect classified as the pattern shape defect; and extracting a systematic defect from among candidate defects classified as the pattern shape defects by performing a comparison of the positional information contained in the design data of the acquired candidate defect to positional information of a portion that has a high probability of causing a pattern formation failure and that has been obtained fType: GrantFiled: November 13, 2008Date of Patent: September 3, 2013Assignee: Hitachi High-Technologies CorporationInventors: Ryo Nakagaki, Minoru Harada, Takehiro Hirai
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Publication number: 20130222574Abstract: In a defect classification system using plural types of observation devices that acquire images having different characteristics, classification performance and operability of the system are improved. The a defect classification system includes plural imaging part that acquire images of an inspection target, a defect classification device that classifies the acquired images acquired by the plural imaging part, and a communication part that transmits data between the plural imaging devices and the defect classification device, in which the defect classification device includes an image storage part that stores the acquired image data acquired by the plural imaging part, an information storage part that stores associated information about the input image data, and a part for changing a processing method or a display method depending on the associated information.Type: ApplicationFiled: October 3, 2011Publication date: August 29, 2013Inventors: Ryo Nakagaki, Minoru Harada, Takehiro Hirai
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Publication number: 20130114881Abstract: Disclosed is a method for reviewing defects in a large number of samples within a short period of time through the use of a defect review apparatus. To collect defect images steadily and at high throughput, a defect detection method is selected before imaging and set up for each of review target defects in the samples in accordance with the external characteristics of the samples that are calculated from the design information about the samples. The defect images are collected after an imaging sequence is set up for the defect images and reference images in such a manner as to reduce the time required for stage movement in accordance with the defect coordinates of the samples and the selected defect detection method.Type: ApplicationFiled: December 28, 2012Publication date: May 9, 2013Inventors: Minoru HARADA, Ryo Nakagaki, Kenji Obara, Atsushi Miyamoto
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Publication number: 20130108147Abstract: Disclosed is a method of inspecting an object to be inspected in a semiconductor manufacturing process, for resolving the problem to increase defect detection sensitivity. An image capture means is used to image capture a designated area of the object to be inspected; a defect is detected in the captured image; a circuit pattern is recognized from the captured image; a characteristic value is computed, relating to an image tone and shape, from the detected defect; a characteristic value is computed, relating to the image tone and shape, from the recognized circuit pattern; either a specified defect or circuit pattern is filtered and extracted from the detected defect and the recognized circuit pattern; a mapping characteristic value is determined from the characteristic value of either the filtered and extracted specified defect or circuit pattern; and the distribution of the determined characteristic values is displayed onscreen in a map format.Type: ApplicationFiled: April 1, 2011Publication date: May 2, 2013Inventors: Minoru Harada, Ryo Nakagaki, Takehiro Hirai, Naoki Hosoya
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Publication number: 20130070078Abstract: In performing a programmed-point inspection of a circuit pattern using a review SEM, stable inspection can be performed while suppressing the generation of a false report even when a variation in a circuit pattern to be inspected is large. SEM images that are obtained by sequentially imaging a predetermined circuit pattern using the review SEM are stored into a storage unit. Images that meet a set condition are selected from the stored SEM images, and averaged to create an average image (GP image). By performing pattern check by GP comparison using this GP image, an inspection can be performed while suppressing the generation of a false report even when a variation in the circuit patterns is large.Type: ApplicationFiled: December 22, 2010Publication date: March 21, 2013Inventors: Yuji Takagi, Minoru Harada, Ryo Nakagaki, Naoki Hosoya, Toshifumi Honda, Takehiro Hirai
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Patent number: 8355559Abstract: Disclosed is a method for reviewing defects in a large number of samples within a short period of time through the use of a defect review apparatus. To collect defect images steadily and at high throughput, a defect detection method is selected before imaging and set up for each of review target defects in the samples in accordance with the external characteristics of the samples that are calculated from the design information about the samples. The defect images are collected after an imaging sequence is set up for the defect images and reference images in such a manner as to reduce the time required for stage movement in accordance with the defect coordinates of the samples and the selected defect detection method.Type: GrantFiled: April 23, 2009Date of Patent: January 15, 2013Assignee: Hitachi High-Technologies CorporationInventors: Minoru Harada, Ryo Nakagaki, Kenji Obara, Atsushi Miyamoto
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Publication number: 20120257041Abstract: Provided is a technique for a wafer inspection conducted by simple operation, which is useful even when the inspection covers a variety of items and the inspection items are changed frequently with time like in a start-up period of a semi-conductor process. According to the technique, inspection images are collected, and then a template is prepared from the inspection images. A plurality of regions are defined on the template, and inspection methods and output indexes are registered in correspondence with the respective regions. In the inspection, by reference to the template images corresponding to the derived inspection images, the inspection is conducted based on the inspection information registered therein and the quantitative output levels are calculated.Type: ApplicationFiled: November 22, 2010Publication date: October 11, 2012Inventors: Ryo Nakagaki, Minoru Harada, Takehiro Hirai, Yuji Takagi