Patents by Inventor Minoru Moriwaki

Minoru Moriwaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8072080
    Abstract: The invention provides a connection structure including: a first electro-conductive film that is formed on a substrate; an insulation film that is formed on the first electro-conductive film, an end surface of the insulation film facing in a direction in which an end surface of the first electro-conductive film faces; and a second electro-conductive film that extends from the upper surface of the insulation film to reach the end surface of the first electro-conductive film across the end surface of the insulation film, the second electro-conductive film being electrically connected to the first electro-conductive film via the end surface of the first electro-conductive film.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: December 6, 2011
    Assignee: Seiko Epson Corporation
    Inventor: Minoru Moriwaki
  • Publication number: 20110249227
    Abstract: In at least one embodiment of the disclosure, an electro-optical device comprises a pixel electrode and a transistor corresponding to the pixel electrode. A data line is electrically connected to the transistor. A storage capacitor is provided between the pixel electrode and the transistor. The storage capacitor has a first capacitance electrode and a second capacitance electrode facing each other. A capacitance isolation film is interposed therebetween. An additional capacitor is electrically connected to the data line. The additional capacitor has a first additional capacitance electrode and a second additional capacitance electrode facing each other. An additional capacitance isolation film is interposed therebetween. The first additional capacitance electrode is provided on a same layer as the first capacitance electrode. The second additional capacitance electrode is provided on a layer different from the layers of the first and second capacitance electrodes.
    Type: Application
    Filed: April 11, 2011
    Publication date: October 13, 2011
    Applicant: Seiko Epson Corporation
    Inventors: Minoru Moriwaki, Hiroaki Mochizuki
  • Publication number: 20110242470
    Abstract: An electro-optical device includes: a pixel electrode provided on a substrate; a transistor being provided between the substrate and the pixel electrodes; and a holding capacitor, provided between the pixel electrode and the transistor, configured of a first electrode, a second electrode provided opposing the first electrode via a first capacitor insulation film, and a third electrode provided opposing the first electrode via a second capacitor insulation film. Both the first capacitor insulation film and the second capacitor insulation film have multiple layers; the first capacitor insulation film and the second electrode are formed symmetrical to the second capacitor insulation film and the third electrode when viewed from the first electrode.
    Type: Application
    Filed: April 4, 2011
    Publication date: October 6, 2011
    Applicant: Seiko Epson Corporation
    Inventor: Minoru Moriwaki
  • Publication number: 20110222008
    Abstract: An electro-optical device includes a pixel electrode provided on a substrate, a transistor provided between the substrate and the pixel electrode, a first capacitor electrode provided between the pixel electrode and the transistor, and be electrically connected to the pixel electrode and the transistor, a second capacitor electrode provided between the pixel electrode and the first capacitor electrode, be located so as to be opposite the first capacitor electrode via a capacitor insulating film, and be supplied with a predetermined electric potential, and a light-shielding film provided between the pixel electrode and the second capacitor electrode, be located so as to be at least partially overlapped by the transistor, and be electrically connected to the second capacitor electrode via a contact hole formed in an insulating film disposed between the second capacitor electrode and the light-shielding film.
    Type: Application
    Filed: March 8, 2011
    Publication date: September 15, 2011
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Minoru MORIWAKI, Masahiro YASUKAWA, Ken WAKITA
  • Patent number: 7839461
    Abstract: An electro-optical device that includes a transistor and an insulating film over the semiconductor layer of the transistor. The insulating film has an opening portion that overlaps the channel region. The gate electrode of the transistor includes a body portion arranged in the opening portion of the insulating film and an elongated portion that extends onto the insulating film so as to cover the second junction portion of the transistor. The second junction region is located in an intersection region of a non-aperture region of the display pixel.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: November 23, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Tatsuya Ishii, Minoru Moriwaki
  • Patent number: 7830465
    Abstract: An electro-optical device includes a semiconductor layer, a first insulating film, a second insulating film, and a gate electrode. The first insulating film is formed in an island shape so as to cover a first junction region of the semiconductor layer. The second insulating film is formed in an island shape so as to cover a second junction region of the semiconductor layer. The gate electrode faces the channel region through a gate insulating film and extends onto the first and second insulating films.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: November 9, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Minoru Moriwaki, Tatsuya Ishii
  • Patent number: 7816258
    Abstract: An electro-optic device substrate includes a base and a TFT element having a source region and a drain region disposed on the base. The TFT element includes a silicon layer in the source region or the drain region, and the silicon layer at least partially includes a silicided portion. The electro-optic device substrate also includes a metal wire connected to the silicided portion of the silicon layer.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: October 19, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Minoru Moriwaki
  • Patent number: 7742114
    Abstract: An electro-optic device includes a substrate, data lines and scanning lines extending so as to cross each other, pixel electrodes each arranged for one of a plurality of pixels defined by crossing of the data lines and the scanning lines in plan view of the substrate, thin film transistors each electrically connected to one of the pixel electrodes, and storage capacitors each electrically connected to one of the pixel electrodes. Each of the storage capacitors is arranged above the corresponding thin film transistor so as to overlap at least a channel region of the thin film transistor in plan view of the substrate. The storage capacitors each include a lower electrode composed of a polysilicon film and an upper electrode composed of a dielectric film and a metal film stacked in this order from the bottom.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: June 22, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Minoru Moriwaki
  • Patent number: 7605024
    Abstract: An electro-optic device includes data lines and scanning lines extending to cross each other on a substrate, pixel electrodes disposed on the substrate for respective pixels defined corresponding to the data lines and the scanning lines in a plan view of the substrate, thin film transistors electrically connected to the respective pixel electrodes, and at least one amorphous wiring including an amorphous film and disposed in a region containing a region opposite to a channel region of each of the thin film transistors in a plan view of the substrate and in a layer different from that of semiconductor films of the thin film transistors.
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: October 20, 2009
    Assignee: Seiko Epson Corporation
    Inventor: Minoru Moriwaki
  • Patent number: 7570311
    Abstract: An electro-optical device includes: an electro-optical device substrate; step portions having a concave shape that are formed on a predetermined insulating film of the electro-optical device substrate; side wall portions each of which is formed on a side surface of the concave step portion between the surface of the insulating layer and the bottom of the step portion and has an upward convex curved surface, the surface of the curved surface being continuously formed with the surface of the insulating film at the top of the concave step portion; and capacitive elements each of which is formed on the step portion and the side wall portion and has a lower electrode layer, an upper electrode layer, and a dielectric layer interposed between the lower electrode layer and the upper electrode layer.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: August 4, 2009
    Assignee: Seiko Epson Corporation
    Inventor: Minoru Moriwaki
  • Publication number: 20090065783
    Abstract: An electro-optical device includes a semiconductor layer, a first insulating film, a second insulating film, and a gate electrode. The first insulating film is formed in an island shape so as to cover a first junction region of the semiconductor layer. The second insulating film is formed in an island shape so as to cover a second junction region of the semiconductor layer. The gate electrode faces the channel region through a gate insulating film and extends onto the first and second insulating films.
    Type: Application
    Filed: August 4, 2008
    Publication date: March 12, 2009
    Applicant: Seiko Epson Corporation
    Inventors: Minoru Moriwaki, Tatsuya Ishii
  • Patent number: 7477334
    Abstract: A method of manufacturing an electro-optical device, which, on a substrate, has a plurality of data lines, a plurality of scanning lines, a plurality of driving elements formed to correspond to intersections of the plurality of data lines and the plurality of scanning lines for pixels, and a plurality of pixel electrodes provided to correspond to the driving elements, includes forming an etching stopping layer, forming a common line that is provided above the etching stopping layer to short-circuit the plurality of scanning lines and the plurality of scanning lines, forming a first interlayer insulating film that isolates the plurality of data lines and the plurality of pixel electrodes from the plurality of scanning lines and the plurality of driving elements, forming contact holes that electrically connect the plurality of data lines and the plurality of pixel electrodes to the plurality of driving elements, forming the plurality of data lines, and forming a cutting hole in the first interlayer insulating f
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: January 13, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Minoru Moriwaki, Masahiro Yasukawa
  • Patent number: 7449411
    Abstract: A method of manufacturing a semiconductor device includes forming a plurality of conductive layers above a substrate; forming a plurality of interlayer insulating layers; forming with dry etching a first hole penetrating the upper interlayer insulating layer to reach the lower insulating layer; forming a protective film on the first hole; and forming by etching a second hole penetrating the lower interlayer insulating layer via the first hole having the protective film formed thereon to form a contact hole.
    Type: Grant
    Filed: April 21, 2005
    Date of Patent: November 11, 2008
    Assignee: Seiko Epson Corporation
    Inventor: Minoru Moriwaki
  • Publication number: 20080197355
    Abstract: An electro-optical device that includes a transistor and an insulating film over the semiconductor layer of the transistor. The insulating film has an opening portion that overlaps the channel region. The gate electrode of the transistor includes a body portion arranged in the opening portion of the insulating film and an elongated portion that extends onto the insulating film so as to cover the second junction portion of the transistor. The second junction region is located in an intersection region of a non-aperture region of the display pixel.
    Type: Application
    Filed: February 14, 2008
    Publication date: August 21, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Tatsuya ISHII, Minoru MORIWAKI
  • Publication number: 20080149937
    Abstract: The invention provides a connection structure including: a first electro-conductive film that is formed on a substrate; an insulation film that is formed on the first electro-conductive film, an end surface of the insulation film facing in a direction in which an end surface of the first electro-conductive film faces; and a second electro-conductive film that extends from the upper surface of the insulation film to reach the end surface of the first electro-conductive film across the end surface of the insulation film, the second electro-conductive film being electrically connected to the first electro-conductive film via the end surface of the first electro-conductive film.
    Type: Application
    Filed: December 21, 2007
    Publication date: June 26, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Minoru MORIWAKI
  • Patent number: 7339189
    Abstract: A substrate for a semiconductor device includes a substrate, a thin film transistor that is provided on the substrate, a wiring line that is provided above the thin film transistor, an interlayer insulating film that electrically isolates the wiring line from at least a semiconductor layer of the thin film transistor, and a contact hole that has a first hole being cut in the interlayer insulating film and extending in a longitudinal direction in plan view on a substrate surface and a plurality of second holes passing through the interlayer insulating film from a bottom of the first hole to reach a surface of the semiconductor layer and being arranged in the longitudinal direction of the first hole. The connect hole connects the wiring line to the semiconductor layer via the interlayer insulating film.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: March 4, 2008
    Assignee: Seiko Epson Corporation
    Inventor: Minoru Moriwaki
  • Publication number: 20080012022
    Abstract: An electro-optic device substrate includes a base and a TFT element having a source region and a drain region disposed on the base. The TFT element includes a silicon layer in the source region or the drain region, and the silicon layer at least partially includes a silicided portion. The electro-optic device substrate also includes a metal wire connected to the silicided portion of the silicon layer.
    Type: Application
    Filed: June 5, 2007
    Publication date: January 17, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Minoru Moriwaki
  • Publication number: 20070263156
    Abstract: An electro-optical device substrate includes a substrate, a plurality of data lines and a plurality of scanning lines crossing each other on the substrate, and a plurality of pixels defined by the plurality of data lines and the plurality of scanning lines so as to correspond to intersections thereof. Each pixel includes a pixel electrode, a conducting layer formed in a non-opening region separating an opening region of the pixel from that of another pixel, the conducting layer having a protruding portion protruding into the opening region from a part of one of a plurality of region edges defining the opening region, and a first contact portion electrically connecting the pixel electrode and the protruding portion.
    Type: Application
    Filed: March 29, 2007
    Publication date: November 15, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Tatsuya ISHII, Masahiro YASUKAWA, Minoru MORIWAKI
  • Publication number: 20070255864
    Abstract: According to one embodiment, an information transfer apparatus for performing direct memory access (DMA) between a memory unit and an input/output device comprises a first port to form a first transfer path which performs DMA transfer of information between the memory and the input/output device via a general-purpose bus, a second port to form a second transfer path which directly performs DMA transfer of information between the memory unit and the input/output device no via the general-purpose bus, and a selecting unit to select the first transfer path and the second transfer path on the basis of control from the outside.
    Type: Application
    Filed: February 14, 2007
    Publication date: November 1, 2007
    Inventor: Minoru Moriwaki
  • Publication number: 20070159563
    Abstract: An electro-optic device includes a substrate, data lines and scanning lines extending so as to cross each other, pixel electrodes each arranged for one of a plurality of pixels defined by crossing of the data lines and the scanning lines in plan view of the substrate, thin film transistors each electrically connected to one of the pixel electrodes, and storage capacitors each electrically connected to one of the pixel electrodes. Each of the storage capacitors is arranged above the corresponding thin film transistor so as to overlap at least a channel region of the thin film transistor in plan view of the substrate. The storage capacitors each include a lower electrode composed of a polysilicon film and an upper electrode composed of a dielectric film and a metal film stacked in this order from the bottom.
    Type: Application
    Filed: December 19, 2006
    Publication date: July 12, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Minoru MORIWAKI