Patents by Inventor Minoru Mukai
Minoru Mukai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9772359Abstract: According to one embodiment, a semiconductor module comprises a substrate, a first wiring, an electrode pad, a junction, an oscillator, and a detector. The first wiring is disposed on the substrate, and has a characteristic impedance Z0. The electrode pad is connected to the first wiring. The junction is disposed on the electrode pad, and has an impedance Z1. The oscillator is disposed in contact with the first wiring, and oscillates a pulse wave of a voltage toward the junction via the first wiring. The detector is disposed in contact with the first wiring, and detects an output wave of the pulse wave from the junction. The characteristic impedance Z0 and the impedance Z1 satisfy a following relationship (1), ? Z ? ? 0 - Z ? ? 1 Z ? ? 0 ? ? 0.05 .Type: GrantFiled: September 30, 2014Date of Patent: September 26, 2017Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Kenji Hirohata, Minoru Mukai, Tomoko Monda
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Patent number: 9706666Abstract: According to one embodiment, an electronic device includes a circuit board with an electronic component mounted thereon. The device, includes a measuring unit, a first database, a determination unit, and a presentation unit. The measuring unit measures an value of state of the electronic component. The first database stores data indicating correlation. The determination unit determines one of ways of applying a load to a junction, based on the value of state of the electronic component measured by the measuring unit, and referring to the first database. The presentation unit presents the determined way of applying the load to the junction.Type: GrantFiled: March 16, 2012Date of Patent: July 11, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Tomoko Monda, Minoru Mukai
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Patent number: 9451709Abstract: A damage index predicting system is for predicting a damage-related index of solder joints of an electronic device having the solder joints that electrically connect an electronic component to a mounting circuit board and one or more detection solder joints that are designed so as to have a shorter life than the solder joints. The system includes: a database configured to store a fracture relationship between the detection solder joints and the solder joints; a fracture detector configured to detect fracture of the detection solder joints; and a processor configured to calculate a prediction value of the damage-related index of the solder joints based on information relating to the fracture of the detection solder joints obtained by the fracture detector and the fracture relationship stored in the database.Type: GrantFiled: July 20, 2009Date of Patent: September 20, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Tomoko Monda, Minoru Mukai, Kenji Hirohata
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Patent number: 8965712Abstract: A life predicting method for a solder joint includes a step of referring to a temperature history of a measurement object having a solder joint, a step of examining at least one physical quantity selected from the group consisting of amplitude, a cycle number, a mean temperature, and a periodic length of a temperature variation with a cycle count method from the temperature history, a step of calculating a strain range by utilizing a previously prepared response surface from the physical quantity examined with the cycle count method, and a step of calculating a strain range increasing rate from a strain range with reference to a previously obtained damage index and a strain variation history of the strain range.Type: GrantFiled: March 18, 2011Date of Patent: February 24, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Takahiro Omori, Kenji Hirohata, Tomoko Monda, Katsuaki Hiraoka, Minoru Mukai
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Publication number: 20150019150Abstract: According to one embodiment, a semiconductor module comprises a substrate, a first wiring, an electrode pad, a junction, an oscillator, and a detector. The first wiring is disposed on the substrate, and has a characteristic impedance Z0. The electrode pad is connected to the first wiring. The junction is disposed on the electrode pad, and has an impedance Z1. The oscillator is disposed in contact with the first wiring, and oscillates a pulse wave of a voltage toward the junction via the first wiring. The detector is disposed in contact with the first wiring, and detects an output wave of the pulse wave from the junction. The characteristic impedance Z0 and the impedance Z1 satisfy a following relationship (1), ? Z ? ? 0 - Z ? ? 1 Z ? ? 0 ? ? 0.05 .Type: ApplicationFiled: September 30, 2014Publication date: January 15, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Kenji HIROHATA, Minoru MUKAI, Tomoko MONDA
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Patent number: 8884634Abstract: According to one embodiment, a semiconductor module comprises a substrate, a first wiring, an electrode pad, a junction, an oscillator, and a detector. The first wiring is disposed on the substrate, and has a characteristic impedance Z0. The electrode pad is connected to the first wiring. The junction is disposed on the electrode pad, and has an impedance Z1. The oscillator is disposed in contact with the first wiring, and oscillates a pulse wave of a voltage toward the junction via the first wiring. The detector is disposed in contact with the first wiring, and detects an output wave of the pulse wave from the junction. The characteristic impedance Z0 and the impedance Z1 satisfy a following relationship (1), ? Z ? ? 0 - Z ? ? 1 Z ? ? 0 ? ? 0.05 .Type: GrantFiled: March 26, 2012Date of Patent: November 11, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Kenji Hirohata, Minoru Mukai, Tomoko Monda
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Patent number: 8838789Abstract: According to one embodiment, each monitoring device acquires monitoring variables from an observation target, generates an individual multidimensional distribution of the monitoring variables, and transmits the individual multidimensional distribution to a server. The server generates sampling data using the individual multidimensional distribution received from each monitoring device, generates an overall multidimensional distribution of the monitoring variables using the sampling data, determines a statistical model of each index using the overall multidimensional distribution, generates an overall index multidimensional distribution of indexes using the statistical model and the overall multidimensional distribution, and transmits the overall index multidimensional distribution and statistical models to each monitoring device.Type: GrantFiled: May 4, 2012Date of Patent: September 16, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Kenji Hirohata, Minoru Mukai
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Patent number: 8615627Abstract: A RAID system to transfer data to and from host equipment includes a semiconductor storage unit, a semiconductor-memory selector, and a memory controller. The semiconductor storage unit includes two or more semiconductor memories, a mounting board, and solder joints. The semiconductor memories are mounted on the mounting board. The solder joints are between the semiconductor memories and the mounting board. The semiconductor-memory selector selects a combination of the semiconductor memories to dispersively record the data in the semiconductor storage unit. The memory controller accesses the combination in response to a request of the host equipment. In addition, the selector selects the combination so that mechanical loads received by the semiconductor memories are averaged.Type: GrantFiled: July 13, 2011Date of Patent: December 24, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Takahiro Omori, Minoru Mukai, Kenji Hirohata
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Patent number: 8582310Abstract: An electronic apparatus includes: a circuit board that is disposed inside a case that is formed by coupling first and second case halves, the circuit board being interposed between first and second boss portions; first and second conductive members that are disposed between a gap formed between the first boss portion and the circuit board; a third conductive member that is disposed between the first boss portion and the first conductive member and between the first boss portion and the second conductive member to electrically connect the first conductive member to the second conductive member; and a measurement circuit that is electrically connected to a first wiring and a second wiring, which are respectively connected to the first conductive member and the second conductive member, and measures an electrical characteristic value of at least one of the first conductive member and the second conductive member.Type: GrantFiled: September 21, 2011Date of Patent: November 12, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Tomoko Monda, Minoru Mukai
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Patent number: 8581616Abstract: According to one embodiment, an electronic device includes a circuit board, an electronic component, a first pad formed on the circuit board, a second pad formed on the electronic component, a junction which connects the first pad and the second pad, and a detecting unit. The detecting unit detects an electric characteristic of a connection path that includes the junction and at least one of the first pad and the second pad. An insulator is formed in part of a contact area of at least one of the first pad and the second pad that is in contact with the junction.Type: GrantFiled: March 7, 2011Date of Patent: November 12, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Tomoko Monda, Minoru Mukai
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Patent number: 8549362Abstract: A first module calculates a failure occurrence risk index of each data storage area address. A second module calculates a power saving index of each data storage area address. A third module calculates an access speed index per unit data volume necessary to access each data storage area address. A fourth module generates a distribution table that represents the failure occurrence risk index, the power saving index, and the access speed index for each candidate address, with respect to data to be distributed. A fifth module selects a candidate address in the distribution table such that the power saving index and the access speed index meet restricting conditions and the failure occurrence risk index is minimized, and distributes the data to the candidate address.Type: GrantFiled: September 14, 2012Date of Patent: October 1, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Kenji Hirohata, Minoru Yonezawa, Chie Morita, Takeichiro Nishikawa, Minoru Nakatsugawa, Minoru Mukai
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Patent number: 8482998Abstract: A storage device includes: a printed circuit board; a semiconductor memory package mounted on the printed circuit board via solder joints, the semiconductor memory package incorporating semiconductor memories; a sensor configured to measure a physical quantity relating to a state of the storage device; a database including a damage estimation model base to be used for estimating damage of the solder joints from the physical quantity measured by the sensor; a damage estimating module configured to calculate a damage estimation value of the solder joints from the physical quantity using the damage estimation model base; and a controller configured to control writing, reading, and erasure of electronic data to or from the semiconductor memories based on the damage estimation values calculated by the damage estimating module.Type: GrantFiled: April 13, 2012Date of Patent: July 9, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Minoru Mukai, Kenji Hirohata, Tomoko Monda
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Publication number: 20130013964Abstract: A first module calculates a failure occurrence risk index of each data storage area address. A second module calculates a power saving index of each data storage area address. A third module calculates an access speed index per unit data volume necessary to access each data storage area address. A fourth module generates a distribution table that represents the failure occurrence risk index, the power saving index, and the access speed index for each candidate address, with respect to data to be distributed. A fifth module selects a candidate address in the distribution table such that the power saving index and the access speed index meet restricting conditions and the failure occurrence risk index is minimized, and distributes the data to the candidate address.Type: ApplicationFiled: September 14, 2012Publication date: January 10, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kenji HIROHATA, Minoru YONEZAWA, Chie MORITA, Takeichiro NISHIKAWA, Minoru NAKATSUGAWA, Minoru MUKAI
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Patent number: 8321157Abstract: A dummy junction which will break earlier than a target junction is arranged on a board. A history of load applied to the dummy junction until the dummy junction actually breaks is recorded, and an estimated lifetime of the target junction is calibrated when a lifetime of the dummy junction estimated by the history of the load is largely different from an actual lifetime of the dummy junction. The calibration is performed by subtracting a value of an unmeasurable load from the estimated lifetime of the target junction based on load ever applied to the target junction, and the unmeasurable load is calculated based on the difference of the actual lifetime and estimated lifetime of the dummy junction.Type: GrantFiled: March 23, 2010Date of Patent: November 27, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Takahiro Omori, Kenji Hirohata, Minoru Mukai
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Publication number: 20120283989Abstract: According to one embodiment, each monitoring device acquires monitoring variables from an observation target, generates an individual multidimensional distribution of the monitoring variables, and transmits the individual multidimensional distribution to a server. The server generates sampling data using the individual multidimensional distribution received from each monitoring device, generates an overall multidimensional distribution of the monitoring variables using the sampling data, determines a statistical model of each index using the overall multidimensional distribution, generates an overall index multidimensional distribution of indexes using the statistical model and the overall multidimensional distribution, and transmits the overall index multidimensional distribution and statistical models to each monitoring device.Type: ApplicationFiled: May 4, 2012Publication date: November 8, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kenji Hirohata, Minoru Mukai
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Patent number: 8296608Abstract: A first module calculates a failure occurrence risk index of each data storage area address. A second module calculates a power saving index of each data storage area address. A third module calculates an access speed index per unit data volume necessary to access each data storage area address. A fourth module generates a distribution table that represents the failure occurrence risk index, the power saving index, and the access speed index for each candidate address, with respect to data to be distributed. A fifth module selects a candidate address in the distribution table such that the power saving index and the access speed index meet restricting conditions and the failure occurrence risk index is minimized, and distributes the data to the candidate address.Type: GrantFiled: March 29, 2010Date of Patent: October 23, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Kenji Hirohata, Minoru Yonezawa, Chie Morita, Takeichiro Nishikawa, Minoru Nakatsugawa, Minoru Mukai
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Publication number: 20120248440Abstract: According to one embodiment, a semiconductor module comprises a substrate, a first wiring, an electrode pad, a junction, an oscillator, and a detector. The first wiring is disposed on the substrate, and has a characteristic impedance Z0. The electrode pad is connected to the first wiring. The junction is disposed on the electrode pad, and has an impedance Z1. The oscillator is disposed in contact with the first wiring, and oscillates a pulse wave of a voltage toward the junction via the first wiring. The detector is disposed in contact with the first wiring, and detects an output wave of the pulse wave from the junction. The characteristic impedance Z0 and the impedance Z1 satisfy a following relationship (1), ? Z ? ? 0 - Z ? ? 1 Z ? ? 0 ? ? 0.05 .Type: ApplicationFiled: March 26, 2012Publication date: October 4, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Kenji HIROHATA, Minoru Mukai, Tomoko Monda
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Publication number: 20120209537Abstract: According to one embodiment, an electronic device includes a circuit board with an electronic component mounted thereon. The device, includes a measuring unit, a first database, a determination unit, and a presentation unit. The measuring unit measures an value of state of the electronic component. The first database stores data indicating correlation. The determination unit determines one of ways of applying a load to a junction, based on the value of state of the electronic component measured by the measuring unit, and referring to the first database. The presentation unit presents the determined way of applying the load to the junction.Type: ApplicationFiled: March 16, 2012Publication date: August 16, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tomoko MONDA, Minoru MUKAI
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Publication number: 20120198293Abstract: A storage device includes: a printed circuit board; a semiconductor memory package mounted on the printed circuit board via solder joints, the semiconductor memory package incorporating semiconductor memories; a sensor configured to measure a physical quantity relating to a state of the storage device; a database including a damage estimation model base to be used for estimating damage of the solder joints from the physical quantity measured by the sensor; a damage estimating module configured to calculate a damage estimation value of the solder joints from the physical quantity using the damage estimation model base; and a controller configured to control writing, reading, and erasure of electronic data to or from the semiconductor memories based on the damage estimation values calculated by the damage estimating module.Type: ApplicationFiled: April 13, 2012Publication date: August 2, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Minoru Mukai, Kenji Hirohata, Tomoko Monda
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Publication number: 20120179391Abstract: There is provided with an electronic device including: an electronic board having at least one electronic component mounted via both of a target joint and a dummy joint; a vibration source to apply vibrations to the electronic board; a database configured to contain correlation between an electrical characteristic of the dummy joint and a damage value of the target joint, the damage value indicating a degree of crack growth of the target joint; a controller to drive the vibration source; an electrical characteristic measuring unit configured to measure an electrical characteristic of the dummy joint during the vibration source is driven; and a damage calculating unit configured to calculate a damage value of the target joint based on the electrical characteristic of the dummy joint measured by the electrical characteristic measuring unit and the correlation stored in the database.Type: ApplicationFiled: March 13, 2012Publication date: July 12, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Takahiro Omori, Kenji Hirohata, Minoru Mukai