Abstract: A liquid is supplied to a substrate and a chip component is arranged on the liquid. The substrate includes a first surface in which a rectangular mounting region is formed. The chip component includes a second surface having a rectangular shape which substantially coincides with the shape of the mounting region, and has an area substantially equal to that of the mounting region. The mounting region includes first and second regions. Wettability of the first region with respect to the liquid is higher than that of the second region with respect to the liquid. The first region is provided symmetrically with respect to a first central line passing through the middle of a pair of long sides and a second central line passing through the middle of a pair of short sides in the mounting region, and includes rectangular partial regions. The liquid is supplied to the first region.

Abstract: A semiconductor device includes a metal column that extends in a stretching direction; a polymer layer that surrounds the metal column from a direction crossing the stretching direction; and a guide that surrounds the polymer layer in the crossing direction so as to be spaced from the metal column with the polymer layer interposed therebetween. A method for manufacturing semiconductor devices includes a step of filling a mixture containing metal particles and polymers in a guide; and a step of subjecting the mixture to a heat treatment so that the polymers agglomerate to the guide to form a polymer layer that makes contact with the guide and the metal particles agglomerate away from the guide with the polymer layer interposed therebetween to form a metal column that stretches in a stretching direction of the guide from the metal particles.

Abstract: A liquid is supplied to a substrate and a chip component is arranged on the liquid. The substrate includes a first surface in which a rectangular mounting region is formed. The chip component includes a second surface having a rectangular shape which substantially coincides with the shape of the mounting region, and has an area substantially equal to that of the mounting region. The mounting region includes first and second regions. Wettability of the first region with respect to the liquid is higher than that of the second region with respect to the liquid. The first region is provided symmetrically with respect to a first central line passing through the middle of a pair of long sides and a second central line passing through the middle of a pair of short sides in the mounting region, and includes rectangular partial regions. The liquid is supplied to the first region.

Abstract: To miniaturize metal columns. A semiconductor device includes a metal column (14) that extends in a stretching direction; a polymer layer (16) that surrounds the metal column from a direction crossing the stretching direction; and a guide (12) that surrounds the polymer layer in the crossing direction so as to be spaced from the metal column with the polymer layer interposed therebetween. A method for manufacturing semiconductor devices includes a step of filling a mixture (20) containing metal particles (22) and polymers (24) in a guide (12); and a step of subjecting the mixture to a heat treatment so that the polymers agglomerate to the guide to form a polymer layer (16) that makes contact with the guide and the metal particles agglomerate away from the guide with the polymer layer interposed therebetween to form a metal column (14) that stretches in a stretching direction of the guide from the metal particles.

Abstract: A semiconductor device includes a metal column that extends in a stretching direction; a polymer layer that surrounds the metal column from a direction crossing the stretching direction; and a guide that surrounds the polymer layer in the crossing direction so as to be spaced from the metal column with the polymer layer interposed therebetween. A method for manufacturing semiconductor devices includes a step of filling a mixture containing metal particles and polymers in a guide; and a step of subjecting the mixture to a heat treatment so that the polymers agglomerate to the guide to form a polymer layer that makes contact with the guide and the metal particles agglomerate away from the guide with the polymer layer interposed therebetween to form a metal column that stretches in a stretching direction of the guide from the metal particles.

Abstract: To miniaturize metal columns. A semiconductor device includes a metal column (14) that extends in a stretching direction; a polymer layer (16) that surrounds the metal column from a direction crossing the stretching direction; and a guide (12) that surrounds the polymer layer in the crossing direction so as to be spaced from the metal column with the polymer layer interposed therebetween. A method for manufacturing semiconductor devices includes a step of filling a mixture (20) containing metal particles (22) and polymers (24) in a guide (12); and a step of subjecting the mixture to a heat treatment so that the polymers agglomerate to the guide to form a polymer layer (16) that makes contact with the guide and the metal particles agglomerate away from the guide with the polymer layer interposed therebetween to form a metal column (14) that stretches in a stretching direction of the guide from the metal particles.

Abstract: The present invention relates to a chip support substrate including a lyophilic region 4 that is formed on the substrate and that absorbs a chip 3A, and an electrode 6 that is formed on the substrate and in the lyophilic region and that generates electrostatic force in the chip, and to a chip support method including the steps of arranging the chip onto the lyophilic region of the chip support substrate with a liquid 15, the chip support substrate comprising the lyophilic region that is formed on the substrate, and the electrode that is formed on the substrate and in the lyophilic region, and generating the electrostatic force in the chip corresponding to the electrode by applying a voltage to the electrode.

Abstract: A brain electrode system comprises: a brain electrode body which is placed in the cranium and has an electrode which detects a brain wave signal and a first coil through which an electric current corresponding to the brain wave signal flows; and a communication unit which is disposed on the scalp, has a second coil which magnetically connects with the first coil and in which an induced electromotive force occurs due to a change in the current that flows through the first coil and receives the brain wave signal with the second coil.

Abstract: The present invention relates to a chip support substrate including a lyophilic region 4 that is formed on the substrate and that absorbs a chip 3A, and an electrode 6 that is formed on the substrate and in the lyophilic region and that generates electrostatic force in the chip, and to a chip support method including the steps of arranging the chip onto the lyophilic region of the chip support substrate with a liquid 15, the chip support substrate comprising the lyophilic region that is formed on the substrate, and the electrode that is formed on the substrate and in the lyophilic region, and generating the electrostatic force in the chip corresponding to the electrode by applying a voltage to the electrode.

Abstract: In a method of fabricating an integrated circuit device having a three-dimensional stacked structured, the step of fixing many chip-shaped semiconductor circuits to a support substrate or a circuit layer with a predetermined layout can be performed easily and efficiently with a desired accuracy. Temporary adhesion portions 12b of semiconductor chips 13 are temporarily adhered to corresponding temporary adhesion regions 72a of a carrier substrate 73a by way of sticky material. The carrier substrate 73a is then pressed toward a support substrate or a desired circuit layer, thereby contacting connecting portions 12 of the chips 13 on the carrier substrate 73a with corresponding predetermined positions on the support substrate or a circuit layer. Thereafter, by fixing the connecting portions 12 to the predetermined positions, the chips 13 are attached to the support substrate or the circuit layer with a desired layout.

Abstract: In a method of fabricating an integrated circuit device having a three-dimensional stacked structured, the step of fixing many chip-shaped semiconductor circuits to a support substrate or a circuit layer with a predetermined layout can be performed easily and efficiently with a desired accuracy. Temporary adhesion portions 12b of semiconductor chips 13 are temporarily adhered to corresponding temporary adhesion regions 72a of a carrier substrate 73a by way of sticky material. The carrier substrate 73a is then pressed toward a support substrate or a desired circuit layer, thereby contacting connecting portions 12 of the chips 13 on the carrier substrate 73a with corresponding predetermined positions on the support substrate or a circuit layer. Thereafter, by fixing the connecting portions 12 to the predetermined positions, the chips 13 are attached to the support substrate or the circuit layer with a desired layout.

Abstract: There is provided a three-dimensional integrated circuit manufacturing method for temporarily attaching a chip to a transcription substrate, and securely detaching the chip from the transcription substrate when the chip is transferred to a supporting substrate. When a chip is temporarily attached to a transcription substrate, by evaporating a liquid existing between the chip and the transcription substrate, the solids of the chip and the transcription substrate can be attached to each other. Accordingly, the chip can be temporarily attached to the transcription substrate so as not to be deviated from its own position. Further, by setting adhesive strength between the chip and a supporting substrate to be higher than that between the chip and the transcription substrate, the chip can be securely detached from the transcription substrate when the chip is transferred from the transcription substrate to the supporting substrate.

Abstract: In a method of fabricating an integrated circuit device having a three-dimensional stacked structured, the step of fixing many chip-shaped semiconductor circuits to a support substrate or a circuit layer with a predetermined layout can be performed easily and efficiently with a desired accuracy. Temporary adhesion portions 12b of semiconductor chips 13 are temporarily adhered to corresponding temporary adhesion regions 72a of a carrier substrate 73a by way of water films 81. The carrier substrate 73a is then pressed toward a support substrate or a desired circuit layer, thereby contacting connecting portions 12 of the chips 13 on the carrier substrate 73a with corresponding predetermined positions on the support substrate or a circuit layer. Thereafter, by fixing the connecting portions 12 to the predetermined positions, the chips 13 are attached to the support substrate or the circuit layer with a desired layout.

Abstract: A brain probe includes: a core probe made from a metal; and n electrode plates attached so as to cover an entire side surface circumference of the core probe and forming n side planes providing an n-angular cross section (n is an integer equal to or greater than 3). Each of the electrode plates is manufactured by a LSI manufacturing process, and provided with at least one electrode and a lead-out wiring extending in a longitudinal direction of a side plane from each of the at least one electrode.

Abstract: There is provided a three-dimensional integrated circuit manufacturing method for temporarily attaching a chip to a transcription substrate, and securely detaching the chip from the transcription substrate when the chip is transferred to a supporting substrate. When a chip is temporarily attached to a transcription substrate, by evaporating a liquid existing between the chip and the transcription substrate, the solids of the chip and the transcription substrate can be attached to each other. Accordingly, the chip can be temporarily attached to the transcription substrate so as not to be deviated from its own position. Further, by setting adhesive strength between the chip and a supporting substrate to be higher than that between the chip and the transcription substrate, the chip can be securely detached from the transcription substrate when the chip is transferred from the transcription substrate to the supporting substrate.

Abstract: In a method of fabricating an integrated circuit device having a three-dimensional stacked structured, the step of fixing many chip-shaped semiconductor circuits to a support substrate or a circuit layer with a predetermined layout can be performed easily and efficiently with a desired accuracy. Temporary adhesion portions 12b of semiconductor chips 13 are temporarily adhered to corresponding temporary adhesion regions 72a of a carrier substrate 73a by way of water films 81. The carrier substrate 73a is then pressed toward a support substrate or a desired circuit layer, thereby contacting connecting portions 12 of the chips 13 on the carrier substrate 73a with corresponding predetermined positions on the support substrate or a circuit layer. Thereafter, by fixing the connecting portions 12 to the predetermined positions, the chips 13 are attached to the support substrate or the circuit layer with a desired layout.

Abstract: A method of fabricating a semiconductor device having a three-dimensional stacked structure by stacking semiconductor circuit layers on a support substrate, including the steps of: forming a trench in a semiconductor substrate; filling inside the trench with a conductive material to form a conductive plug; forming an element or circuit in an inside or on a surface of the semiconductor substrate where the conductive plug was formed; covering the surface of the semiconductor substrate where the element or circuit was formed with a second insulating film; and fixing the semiconductor substrate to the support substrate or a remaining one of the semiconductor circuit layers by joining the second insulating film to the support substrate or the remaining one of the semiconductor circuit layers through a wiring structure; selectively removing the semiconductor substrate to expose the first insulating film; and selectively removing the first insulating film.

Abstract: A process for producing a nonvolatile semiconductor memory having a mixed or laminated structure of a hardly oxidizable material composed of a hardly oxidizable element having Gibbs' free energy for forming oxide higher than that of Si under the same temperature condition at 1 atm and in temperature range of 0° C. to 1,200° C. and an oxide of an easily oxidizable material composed of an element having Gibbs' free energy for forming oxide lower than that of Si under the same temperature condition at 1 atm in the temperature range and Si. The process includes forming a portion of the hardly oxidizable material and a portion of the oxide by physical forming method and carrying out heat treatment in oxidizing and reducing gas mixture. The ratio of the gases and the temperature are controlled so that the hardly oxidizable material is reduced and the oxide is oxidized in the temperature range.

Abstract: A nonvolatile semiconductor memory device which can shorten data writing and erasing time, significantly improve the endurance characteristic and be activated with low power consumption includes an insulating layer with electric insulation, wherein, a charge retention layer formed adjacent to a tunnel insulating film contains nano-particles comprised of a compound which is constituted from at least one single-element substance or chemical compound having a particle diameter of at most 5 nm functions as a floating gate, and which are independently dispersed with a density of from 10+12 to 10+14 particles per square centimeter.

Abstract: A method of fabricating a semiconductor device having a three-dimensional stacked structure is provided, which realizes easily the electrical interconnection between the stacked semiconductor circuit layers along the stacking direction by using buried interconnections. The trench 13, the inner wall face of which is covered with the insulating film 14, is formed in the surface of the semiconductor substrate 11 of the first semiconductor circuit layer 1a. Then, the inside of the trench 13 is filled with a conductive material, thereby forming the conductive plug 15. Next, the desired semiconductor element is formed on the surface or in the inside of the substrate 11 in such a way as not to overlap with the trench 13, and the multilayer wiring structure 30 is formed over the semiconductor element through the interlayer insulating film 19. Thereafter, the bump electrode 37, which is electrically connected to the plug 15, is formed on the surface of the multilayer wiring structure 30.