Patents by Inventor Mitsuru Watabe

Mitsuru Watabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040176857
    Abstract: A serial communication interface (SCI) cable 4 is provided between the slave processor 2 and the master processor 3. Both processors are connected with a communication interface for peripheral units (SPI: Serial Peripheral Interface) which enables fast transmission. The slave processor 2 transmits a transmission request command which requests at least one of data transmission and reception from the command communication section 220 to the master processor 3 through the SCI cable 4.
    Type: Application
    Filed: August 19, 2003
    Publication date: September 9, 2004
    Inventors: Kunihiko Tsunedomi, Kentaro Yoshimura, Nobuyasu Kanekawa, Takanori Yokoyama, Mitsuru Watabe
  • Patent number: 6789210
    Abstract: A data processor comprising: a bus control circuit adapted to be interfaced with a synchronous DRAM which can be accessed in synchronism with a clock signal; a plurality of data processing modules coupled to said bus control circuit for producing data and addresses for accessing a memory; and a clock driver for feeding intrinsic operation clocks to said data processing modules and for feeding the clock signal for accessing said memory in synchronism with the operations of said data processing modules to be operated by the operation clock signals, to the outside.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: September 7, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Jun Satoh, Kazushige Yamagishi, Keisuke Nakashima, Koyo Katsura, Takashi Miyamoto, Mitsuru Watabe, Kenichiroh Ohmura
  • Patent number: 6785833
    Abstract: A data processor comprising: a bus control circuit adapted to be interfaced with a synchronous DRAM which can be accessed in synchronism with a clock signal; a plurality of data processing modules coupled to said bus control circuit for producing data and addresses for accessing a memory; and a clock driver for feeding intrinsic operation clocks to said data processing modules and for feeding the clock signal for accessing said memory in synchronism with the operations of said data processing modules to be operated by the operation clock signals, to the outside.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: August 31, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Jun Satoh, Kazushige Yamagishi, Keisuke Nakashima, Koyo Katsura, Takashi Miyamoto, Mitsuru Watabe, Kenichiroh Ohmura
  • Publication number: 20040122565
    Abstract: An electrical control unit for an automobile of which standby current is smaller. In an electrical control unit for an automobile having a microcomputer, an input circuit, a driver circuit, and a power supply circuit, which is started by a wake-up signal from the circuit other than the ignition switch even when the ignition switch of the automobile is cut off, the microcomputer is started by shifting the power supply circuit from an inert state to an active state to generate the voltage for operating the microcomputer, and the predetermined processing is executed.
    Type: Application
    Filed: December 12, 2003
    Publication date: June 24, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Kohei Sakurai, Nobuyasu Kanekawa, Mitsuru Watabe, Shoji Sasaki, Katsuya Oyama
  • Publication number: 20040025852
    Abstract: A heating device is capable of efficiently heat a heated body as heating object. The heating device includes a heating body, a power source for supplying a current to the heating body, a current control element controlling current flowing through the heating body, and a heat conductive body to be thermally coupled with the heating body and the current control element for transmitting heat generated by the heating body and heat generated by the current control element to a heating object.
    Type: Application
    Filed: August 7, 2003
    Publication date: February 12, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Nobuyasu Kanekawa, Kohei Sakurai, Mitsuru Watabe, Shoji Sasaki, Kenji Tabuchi, Toshio Hayashibara
  • Patent number: 6677950
    Abstract: To reduce the hardware of the graphics computer in size and reduce the cost of the hardware, the frame buffer and the main memory are united into one unit to process graphics data in the CPU. The frame buffer is arranged in the main memory, and the graphics computer includes a DMAC used to read pixel data from the frame buffer for display, a display used to receive the pixel data and display it on a display device, such as an LCD, etc., and memories used to store the procedure used by the CPU to draw the pixel data in the said frame buffer. Especially, the said memories are formed so that a single function procedure and 2 multifunction procedure can be selected to suit the drawing object. In addition, the single function procedure includes 2 line drawing procedure that uses data tables and 2 multivalue expansion procedure that uses a pattern table and a mask table. Since the frame buffer and the main memory are united into one unit, the CPU can be used to process graphics data.
    Type: Grant
    Filed: December 22, 1997
    Date of Patent: January 13, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Mamoru Ohba, Mitsuru Watabe, Rika Minami, Koyo Katsura
  • Publication number: 20030195669
    Abstract: To provide a low-cost vehicle control system and a car using the system by making radiation of an actuator driver easy and thereby reducing the radiation component cost and moreover, downsizing an electronic control unit and improving the versatility.
    Type: Application
    Filed: May 5, 2003
    Publication date: October 16, 2003
    Inventors: Kohei Sakurai, Nobuyasu Kanekawa, Fumio Murabayashi, Mitsuru Watabe, Toshio Hayashibara
  • Patent number: 6625522
    Abstract: A low-cost vehicle control system and a car using the system controls radiation of an actuator driver and thereby reduces the radiation component cost and allows downsizing of an electronic control unit to improve the versatility. The vehicle control system has an electronic control unit, a plurality of actuators and actuator drivers for driving the actuators at the actuator side. The actuator drivers, respectively, have an independent self-diagnosis section, a self-protection section, and a communication control section and are dispersed correspondingly to the actuators.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: September 23, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kohei Sakurai, Nobuyasu Kanekawa, Fumio Murabayashi, Mitsuru Watabe, Toshio Hayashibara
  • Patent number: 6624474
    Abstract: A semiconductor device comprises an embedded insulation layer 101 formed on a semiconductor substrate 100, plural power semiconductor elements 2, 3 formed on a semiconductor substrate 100 on the embedded insulation layer, a trench 4 formed on the semiconductor substrate and isolating between the power semiconductor elements, and an isolator 5 insulating and driving control electrodes of the power semiconductor elements, and the power semiconductor elements 2, 3 such as transistors can be used, being connected each other in series.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: September 23, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyasu Kanekawa, Kohei Sakurai, Shoji Sasaki, Kenji Tabuchi, Mitsuru Watabe
  • Patent number: 6619259
    Abstract: Even in such an arrangement in which the throttle valve is operated independently of the engine control system, abnormal engine behavior is ensured to be detected such that a necessary fail-safe operation should be taken. The arrangement of the invention is comprised of the electronically controlled throttle system, engine control system and engine speed monitoring unit, wherein the electronically controlled throttle system is allowed to monitor engine behaviors. Thereby, in the case when the throttle valve is operated independently of the engine control system, if its engine behavior becomes abnormal relative to its drive contents, the engine system senses the abnormality, and takes a fail-safe operation such as to stop operation of the throttle valve and the like.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: September 16, 2003
    Assignees: Hitachi, Ltd., Hitachi Car Engineering Co., Ltd.
    Inventors: Tsugio Tomita, Syuuichi Nakano, Koichi Ono, Mitsuru Watabe
  • Publication number: 20030168043
    Abstract: An engine electronic control unit is inserted through a through hole provided in an intake pipe and mounted in an intake air passage in a direction substantially perpendicularly with respect to a plane of the intake pipe forming the intake air passage. This unit is then secured to the intake pipe using a fixing flange provided at a connector portion. A fixing rail is protruded inside the intake pipe and leading edges of a metal base and a metal cover of the unit are inserted into this rail, thereby securing in position an end opposite to a side of the connector portion of the unit. This realizes an engine electronic control unit offering an outstanding heat radiation performance and vibration resistance, without having to provide special heat radiating parts or without involving an increase in an intake air resistance within the intake air passage. By using such an engine electronic control unit, it is possible to provide a low-cost, compact engine air intake system.
    Type: Application
    Filed: September 27, 2002
    Publication date: September 11, 2003
    Applicant: Hitachi, Ltd..
    Inventors: Kohei Sakurai, Minoru Ohsuga, Nobuyasu Kanekawa, Masatoshi Hoshino, Atsushi Kanke, Yutaka Nishimura, Mitsuru Watabe, Noriyoshi Urushiwara
  • Patent number: 6600295
    Abstract: In order to ensures a stable reduction of noise level at all times, in the steps of switching input voltage with a switching element 10, smoothing the voltage of rectangular wave obtained by switching with a reactor L and capacitor Cf and outputting it, the voltage obtained by dividing the output voltage is compared with the sawtooth wave output from a sawtooth wave generator 14 by a comparator 12. When the switching signal in response to the result of this comparison is applied to the switching element 10, the counter 16 is actuated synchronously with the vertex of the sawtooth wave to perform opening/closing operation of the switch SW1. The time constant of the time constant circuit comprising a R0 and C is adjusted according to whether a resistor R1 is present or not, and the signals of frequencies f1 and f2 coming out of the sawtooth wave generator 14 are sequentially switched to be sent to the comparator 12.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: July 29, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyasu Kanekawa, Kohei Sakurai, Kenji Tabuchi, Mitsuru Watabe, Shoji Sasaki
  • Publication number: 20030126353
    Abstract: A data processor comprising: a bus control circuit adapted to be interfaced with a synchronous DRAM which can be accessed in synchronism with a clock signal; a plurality of data processing modules coupled to said bus control circuit for producing data and addresses for accessing a memory; and a clock driver for feeding intrinsic operation clocks to said data processing modules and for feeding the clock signal for accessing said memory in synchronism with the operations of said data processing modules to be operated by the operation clock signals, to the outside.
    Type: Application
    Filed: February 20, 2003
    Publication date: July 3, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Jun Satoh, Kazushige Yamagishi, Keisuke Nakashima, Koyo Katsura, Takashi Miyamoto, Mitsuru Watabe, Kenichiroh Ohmura
  • Publication number: 20030115496
    Abstract: A data processor comprising: a bus control circuit adapted to be interfaced with a synchronous DRAM which can be accessed in synchronism with a clock signal; a plurality of data processing modules coupled to said bus control circuit for producing data and addresses for accessing a memory; and a clock driver for feeding intrinsic operation clocks to said data processing modules and for feeding the clock signal for accessing said memory in synchronism with the operations of said data processing modules to be operated by the operation clock signals, to the outside.
    Type: Application
    Filed: January 30, 2003
    Publication date: June 19, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Jun Satoh, Kazushige Yamagishi, Keisuke Nakashima, Koyo Katsura, Takashi Miyamoto, Mitsuru Watabe, Kenichiroh Ohmura
  • Patent number: 6550014
    Abstract: A data processor comprising: a bus control circuit adapted to be interfaced with a synchronous DRAM which can be accessed in synchronism with a clock signal; a plurality of data processing modules coupled to said bus control circuit for producing data and addresses for accessing a memory; and a clock driver for feeding intrinsic operation clocks to said data processing modules and for feeding the clock signal for accessing said memory in synchronism with the operations of said data processing modules to be operated by the operation clock signals, to the outside.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: April 15, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Jun Satoh, Kazushige Yamagishi, Keisuke Nakashima, Koyo Katsura, Takashi Miyamoto, Mitsuru Watabe, Kenichiroh Ohmura
  • Publication number: 20020190992
    Abstract: A data processor comprising: a bus control circuit adapted to be interfaced with a synchronous DRAM which can be accessed in synchronism with a clock signal; a plurality of data processing modules coupled to said bus control circuit for producing data and addresses for accessing a memory; and a clock driver for feeding intrinsic operation clocks to said data processing modules and for feeding the clock signal for accessing said memory in synchronism with the operations of said data processing modules to be operated by the operation clock signals, to the outside.
    Type: Application
    Filed: August 12, 2002
    Publication date: December 19, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Jun Satoh, Kazushige Yamagishi, Keisuke Nakashima, Koyo Katsura, Takashi Miyamoto, Mitsuru Watabe, Kenichiroh Ohmura
  • Publication number: 20020149351
    Abstract: In order to ensures a stable reduction of noise level at all times, in the steps of switching input voltage with a switching element 10, smoothing the voltage of rectangular wave obtained by switching with a reactor L and capacitor Cf and outputting it, the voltage obtained by dividing the output voltage is compared with the sawtooth wave output from a sawtooth wave generator 14 by a comparator 12. When the switching signal in response to the result of this comparison is applied to the switching element 10, the counter 16 is actuated synchronously with the vertex of the sawtooth wave to perform opening/closing operation of the switch SW1. The time constant of the time constant circuit comprising a R0 and C is adjusted according to whether a resistor R1 is present or not, and the signals of frequencies f1 and f2 coming out of the sawtooth wave generator 14 are sequentially switched to be sent to the comparator 12.
    Type: Application
    Filed: August 31, 2001
    Publication date: October 17, 2002
    Inventors: Nobuyasu Kanekawa, Kohei Sakurai, Kenji Tabuchi, Mitsuru Watabe, Shoji Sasaki
  • Patent number: 6466221
    Abstract: A data processor comprising: a bus control circuit adapted to be interfaced with a synchronous DRAM which can be accessed in synchronism with a clock signal; a plurality of data processing modules coupled to said bus control circuit for producing data and addresses for accessing a memory; and a clock driver for feeding intrinsic operation clocks to said data processing modules and for feeding the clock signal for accessing said memory in synchronism with the operations of said data processing modules to be operated by the operation clock signals, to the outside.
    Type: Grant
    Filed: June 13, 2001
    Date of Patent: October 15, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Jun Satoh, Kazushige Yamagishi, Keisuke Nakashima, Koyo Katsura, Takashi Miyamoto, Mitsuru Watabe, Kenichiroh Ohmura
  • Publication number: 20020109186
    Abstract: A semiconductor device comprises an embedded insulation layer 101 formed on a semiconductor substrate 100, plural power semiconductor elements 2, 3 formed on a semiconductor substrate 100 on the embedded insulation layer, a trench 4 formed on the semiconductor substrate and isolating between the power semiconductor elements, and an isolator 5 insulating and driving control electrodes of the power semiconductor elements, and the power semiconductor elements 2, 3 such as transistors can be used, being connected each other in series.
    Type: Application
    Filed: August 31, 2001
    Publication date: August 15, 2002
    Inventors: Nobuyasu Kanekawa, Kohei Sakurai, Shoji Sasaki, Kenji Tabuchi, Mitsuru Watabe
  • Publication number: 20020092508
    Abstract: A heating device is capable of efficiently heat a heated body as heating object. The heating device includes a heating body, a power source for supplying a current to the heating body, a current control element controlling current flowing through the heating body, and a heat conductive body to be thermally coupled with the heating body and the current control element for transmitting heat generated by the heating body and heat generated by the current control element to a heating object.
    Type: Application
    Filed: August 10, 2001
    Publication date: July 18, 2002
    Applicant: Hitachi Ltd.
    Inventors: Nobuyasu Kanekawa, Kohei Sakurai, Mitsuru Watabe, Shoji Sasaki, Kenji Tabuchi, Toshio Hayashibara