Abstract: There is disclosed a semiconductor device which comprises a first chip-mounting substrate on which at least one semiconductor chip having a plurality of terminals is mounted, and a plurality of relay terminals electrically connected to the respective terminals of the semiconductor chip are disposed to surround a portion with the semiconductor chip mounted thereon from the outside in the vicinity of the portion, a second chip-mounting substrate which is laminated on the first chip-mounting substrate and on which at least one semiconductor chip is mounted, a plurality of relay terminals electrically connected to the respective terminals of the semiconductor chip are disposed to surround a portion with the semiconductor chip mounted thereon from the outside in the vicinity of the portion, and at least one of the semiconductor chips has a center offset from a center of a whole arrangement of the relay terminals.

Abstract: There is disclosed a semiconductor device which comprises a first chip-mounting substrate on which at least one semiconductor chip having a plurality of terminals is mounted, and a plurality of relay terminals electrically connected to the respective terminals of the semiconductor chip are disposed to surround a portion with the semiconductor chip mounted thereon from the outside in the vicinity of the portion, a second chip-mounting substrate which is laminated on the first chip-mounting substrate and on which at least one semiconductor chip is mounted, a plurality of relay terminals electrically connected to the respective terminals of the semiconductor chip are disposed to surround a portion with the semiconductor chip mounted thereon from the outside in the vicinity of the portion, and at least one of the semiconductor chips has a center offset from a center of a whole arrangement of the relay terminals.

Abstract: There is disclosed a laminated-chip semiconductor device which comprises two chip-mounting substrates on each of which at least one semiconductor chip having a plurality of terminals for signals is mounted, and a plurality of chip connecting wirings electrically connected to the terminals for signals of the each semiconductor chip which are mounted on the chip-mounting substrates are formed in a same pattern, and which are laminated along a thickness direction, and one intermediate substrate which is arranged between the two chip-mounting substrates, and in which a plurality of interlayer connecting wirings electrically connected to each of the plurality of chip connecting wirings of the adjacent chip-mounting substrate are formed in a predetermined wiring pattern.

Abstract: A semiconductor chip is supported on a tape carrier provided with lead wirings. The semiconductor chip is electrically connected to the lead wirings. The semiconductor chip of this quality is bonded in combination with the pe carrier to an aluminum nitride substrate. The lead wirings provided on the carrier combine the two functions as an internal lead and an external lead. The semiconductor package of such a structure as is described above allows multi-terminal connection by the narrowing of pitches between the leads and permits provision of a miniature package excelling in the heat-radiating property. Alternatively, the lead wirings supported on the tape carrier and electrically connected to the semiconductor chip are utilized as internal leads. For the external leads, such lead frames as are bonded to the aluminum nitride substrate are used. The lead frames are electrically connected to the internal leads provided in the tape carrier.

Abstract: A semiconductor ceramic multilayer package comprising an aluminum nitride substrate having a semiconductor element mounted on one surface thereof and a wiring pattern electrically connected to the semiconductor element, connecting terminals connected to the wiring pattern and disposed on the other surface of the aluminum nitride substrate, and a sealing member connected to the aluminum nitride substrate with a metallic bonding layer or a glass layer having a thickness of not more than 100 .mu.m in such a manner as to seal the semiconductor element possesses a notably improved heat-radiating property and accomplishes the object of increasing the number of pins and reducing the size of package.

Abstract: According to this invention, there is provided a method of manufacturing a highly reliable circuit board in which a copper member is strongly, directly bonded to a substrate made of an aluminum nitride sintered body, thereby obtaining high peel strength. The method of manufacturing the circuit board includes the steps of bringing a copper member containing 100 to 1,000 ppm of oxygen into contact with an oxide layer having a thickness of 0.1 to 5 .mu.m formed on a surface of a substrate made of an aluminum nitride sintered body, and heating the substrate in an inert gas atmosphere containing 1 to 100 ppm of oxygen at a temperature not more than a temperature corresponding to a liquidus including a pure copper melting point of a hypoeutectic region of a two-component phase diagram of Cu-Cu.sub.

Abstract: For higher thermal conductivity, stronger adhesion strength, excellent insulating characteristics, and multilayer interconnection, an aluminium sintered body for circuit substrates comprises a novel conductive metallized layer on the surface of the sintered body. The metallized layer comprises at least one element selected from the first group of Mo, W and Ta and at least one element selected from the second group of IIa, III, IVa group elements, lanthanide elements, and actinide elements in the periodic table, as the conductive phase element. The first group element serves to improve the heat conductivity and resistance, while the second group serves to increase the wetness and adhesion strength between the insulating body and the metallized layer. Further, the plural insulating ceramic bodies and the plural metallized conductive layers can be sintered simultaneously being stacked one above the other to permit a multilayer interconnection.