Abstract: Provided are an input matching circuit, at least one amplifying transistor that receives a signal from the input matching circuit, a first dummy transistor that receives a signal from the input matching circuit, a second dummy transistor that receives a signal from the input matching circuit, and an output matching circuit that outputs an output of the amplifying transistor, the amplifying transistor being arranged between the first dummy transistor and the second dummy transistor, the amplifying transistor, the first dummy transistor, and the second dummy transistor being provided in a row along the input matching circuit.

Abstract: Provided are an input matching circuit, at least one amplifying transistor that receives a signal from the input matching circuit, a first dummy transistor that receives a signal from the input matching circuit, a second dummy transistor that receives a signal from the input matching circuit, and an output matching circuit that outputs an output of the amplifying transistor, the amplifying transistor being arranged between the first dummy transistor and the second dummy transistor, the amplifying transistor, the first dummy transistor, and the second dummy transistor being provided in a row along the input matching circuit.

Abstract: A field-effect transistor with protection diodes includes: a field-effect transistor; and a two-terminal electrostatic protection circuit connected between a gate and a source of the field-effect transistor, wherein the two-terminal electrostatic protection circuit comprises: a first diode that is positioned on a reverse-biased side when a voltage lower than a potential of the source is applied to the gate and has a reverse withstand voltage lower than a reverse withstand voltage between the gate and the source of the field-effect transistor; a second diode that is positioned on a forward-biased side when a voltage lower than a potential of the source is applied to the gate and is connected in anti-series to the first diode; and a resistor that is connected in series to a diode pair comprising the first diode and the second diode and formed using a same channel layer as that of the field-effect transistor.

Abstract: A package includes a conductor base plate having a element fixed to an upper surface thereof, a side wall provided on the conductor base plate to surround the element, the side wall having a conductor portion electrically connected to the conductor base plate, a dielectric cap disposed on the side wall, a front-side metal film provided on an outer surface of the dielectric cap, a first back-side metal film provided on an inner surface of the dielectric cap such that a center of the first back-side metal film approximately coincides with a center of a surface of the dielectric cap which faces the conductor base plate, and a plurality of vias passing through the dielectric cap to achieve electrical connection between the front-side metal film and the first back-side metal film and between the front-side metal film and the conductor portion oldie side wall.

Abstract: In the present invention, in addition to arranging a plurality of amplifying elements in a staggered manner, signal path lengths from an input-side divider to gate pads of the plurality of amplifying elements are equalized, and signal path lengths from drain pads of the plurality of amplifying elements to an output-side combiner are equalized.

Abstract: A field-effect transistor with protection diodes includes: a field-effect transistor; and a two-terminal electrostatic protection circuit connected between a gate and a source of the field-effect transistor, wherein the two-terminal electrostatic protection circuit comprises: a first diode that is positioned on a reverse-biased side when a voltage lower than a potential of the source is applied to the gate and has a reverse withstand voltage lower than a reverse withstand voltage between the gate and the source of the field-effect transistor; a second diode that is positioned on a forward-biased side when a voltage lower than a potential of the source is applied to the gate and is connected in anti-series to the first diode; and a resistor that is connected in series to a diode pair comprising the first diode and the second diode and formed using a same channel layer as that of the field-effect transistor.

Abstract: An ESD protection circuit is connected in parallel to a MIM capacitor between a first terminal and a second terminal. First Schottky diodes are connected in series to each other and have anodes connected on the first terminal side and cathodes connected on the second terminal side. Second Schottky diodes are connected in series to each other and connected in anti-parallel to the first Schottky diodes. When an RF signal is inputted to neither the first terminal nor the second terminal, the first terminal has a higher DC voltage than that of the second terminal. The number of the first Schottky diodes is greater than the number of the second Schottky diodes. The number of the second Schottky diodes is set such that an amplitude of the RF signal does not attenuate to predetermined amplitude of the RF signal when the RF signal passes through the MIM capacitor.

Abstract: A package includes a conductor base plate having a element fixed to an upper surface thereof, a side wall provided on the conductor base plate to surround the element, the side wall having a conductor portion electrically connected to the conductor base plate, a dielectric cap disposed on the side wall, a front-side metal film provided on an outer surface of the dielectric cap, a first back-side metal film provided on an inner surface of the dielectric cap such that a center of the first back-side metal film approximately coincides with a center of a surface of the dielectric cap which faces the conductor base plate, and a plurality of vias passing through the dielectric cap to achieve electrical connection between the front-side metal film and the first back-side metal film and between the front-side metal film and the conductor portion oldie side wall.

Abstract: In the present invention, in addition to arranging a plurality of amplifying elements in a staggered manner, signal path lengths from an input-side divider to gate pads of the plurality of amplifying elements are equalized, and signal path lengths from drain pads of the plurality of amplifying elements to an output-side combiner are equalized.

Abstract: An ESD protection circuit is connected in parallel to a MIM capacitor between a first terminal and a second terminal. First Schottky diodes are connected in series to each other and have anodes connected on the first terminal side and cathodes connected on the second terminal side. Second Schottky diodes are connected in series to each other and connected in anti-parallel to the first Schottky diodes. When an RF signal is inputted to neither the first terminal nor the second terminal, the first terminal has a higher DC voltage than that of the second terminal. The number of the first Schottky diodes is greater than the number of the second Schottky diodes. The number of the second Schottky diodes is set such that an amplitude of the RF signal does not attenuate to predetermined amplitude of the RF signal when the RF signal passes through the MIM capacitor.

Abstract: A cascode amplifier includes: a first transistor having a gate to which a signal is input, a grounded source, and a drain; a second transistor having a gate, a source connected to the drain of the first transistor, and a drain; a load connected to the drain of the second transistor; a DC-DC converter supplying a supply voltage, which is variable according to output power, to the drain of the second transistor via the load; and a first bias circuit supplying a voltage, which is a function of the supply voltage, to the gate of the second transistor.

Abstract: A power amplifier includes: a first transistor having a gate, a drain, and a source that is grounded; a second transistor having a gate, a drain, and a source that is connected to the drain of the first transistor; a capacitor connected between the gate of the second transistor and a grounding point; an idling current control circuit having a positive temperature coefficient and making an idling current flowing through the first transistor proportional to an ambient temperature; and a drain voltage control circuit having a positive temperature coefficient and making a drain voltage on the first transistor proportional to the ambient temperature.

Abstract: A plurality of source-grounded transistors (3) are connected in parallel with each other, and a plurality of gate-grounded transistors (4) are connected in parallel with each other. Sources (4s) of the plurality of gate-grounded transistors (4) are connected to drains (3d) of the plurality of source-grounded transistors (3) respectively. Ground pads (5) are connected to sources (3s) of the plurality of source-grounded transistors (3). A plurality of grounding capacitances (6) are connected between gates (4g) of the plurality of gate-grounded transistors (4) and the ground pads (5). The plurality of source-grounded transistors (3) and the plurality of grounding capacitances (6) are alternately arranged between the ground pads (5) and the plurality of gate-grounded transistors (4).

Abstract: A cascode amplifier includes: a first transistor having a gate to which a signal is input, a grounded source, and a drain; a second transistor having a gate, a source connected to the drain of the first transistor, and a drain; a load connected to the drain of the second transistor; a DC-DC converter supplying a supply voltage, which is variable according to output power, to the drain of the second transistor via the load; and a first bias circuit supplying a voltage, which is a function of the supply voltage, to the gate of the second transistor.

Abstract: A power amplifier includes: first and second bias terminals to which bias voltages are respectively supplied; a first transistor having a first control terminal connected to the first bias terminal, a first terminal that is grounded, and a second terminal; a second transistor having a second control terminal connected to the second bias terminal, a third terminal connected to the second terminal, and a fourth terminal; a capacitor connected between the second control terminal and a grounding point; and a variable resistor connected in series with the capacitor, between the second control terminal and the grounding point.

Abstract: A power amplifier includes: a first transistor having a gate, a drain, and a source that is grounded; a second transistor having a gate, a drain, and a source that is connected to the drain of the first transistor; a capacitor connected between the gate of the second transistor and a grounding point; an idling current control circuit having a positive temperatures coefficient and making an idling current flowing through the first transistor proportional to an ambient temperature; and a drain voltage control circuit having a positive temperature gradient coefficient and making a drain voltage on the first transistor proportional to the ambient temperature.

Abstract: A cascode amplifier includes: first transistors; second transistors cascode-connected with respective first transistors; a first line connected at spaced points to control terminals of the first transistors; a second line connected at spaced points to control terminals of the second transistors; and a capacitance connected between one end of the second line and ground. The second line includes at least two lines connected in parallel with each other.

Abstract: A power amplifier includes: first and second bias terminals to which bias voltages are respectively supplied; a first transistor having a first control terminal connected to the first bias terminal, a first terminal that is grounded, and a second terminal; a second transistor having a second control terminal connected to the second bias terminal, a third terminal connected to the second terminal, and a fourth terminal; a capacitor connected between the second control terminal and a grounding point; and a variable resistor connected in series with the capacitor, between the second control terminal and the grounding point.

Abstract: A cascode amplifier includes: first transistors; second transistors cascode-connected with respective first transistors; a first line connected at spaced points to control terminals of the first transistors; a second line connected at spaced points to control terminals of the second transistors; and a capacitance connected between one end of the second line and ground. The second line includes at least two lines connected in parallel with each other.

Abstract: A detector circuit for detecting degradation in the distortion characteristics of a power amplifier based on signals from both ends of a coupled line of a directional coupler. The detector circuit includes a phase shifter/attenuator for phase shifting and attenuating a signal from a coupled terminal of the coupled line, a differential amplifier for outputting difference between an output signal from the phase shifter/attenuator and a signal from the isolated terminal of the coupled line, a wave detector circuit for converting the difference into a DC signal, and a comparing circuit for determining whether the voltage level of the DC signal exceeds a predetermined level. When degradation in the distortion characteristics of the power amplifier arises, the phase shifter/attenuator phase shifts the signal from the coupled terminal and outputs a signal 180° out of phase with the signal from the isolated terminal.