Abstract: A linearizer includes fifth diodes, a third resistor, sixth diodes, and a first npn heterojunction bipolar transistor. When a low-level voltage is applied to first and fourth control voltage terminals and a high-level voltage is applied to second and third control voltage terminals, a low-level voltage is applied to a fifth control voltage terminal, and when a high-level voltage is applied to the first and fourth control voltage terminals and a low-level voltage is applied to the second and third control voltage terminals, a high-level voltage is applied to the fifth control voltage terminal.

Abstract: An attenuator includes a first diode, a first control voltage terminal, a second diode, a first resistance, a second resistance, a third diode, a fourth diode, a fifth capacitance, a second control voltage terminal, a third control voltage terminal, a fourth control voltage terminal, and a linearizer provided between an input terminal and the anode of the first diode. The linearizer linearizes a signal input to the input terminal only when low level voltages are applied to the first and fourth control voltage terminals at the same time that high level voltages are applied to the second and third control voltage terminals.

Abstract: A wave detector circuit includes: a first transistor having its base and collector connected together, the first transistor receiving an AC signal and a reference voltage at its base and collector; a second transistor having its base connected to the base of the first transistor through a resistance, the second transistor outputting a detected voltage at its collector; and a diode-connected temperature compensation transistor connected between ground potential and the base and the collector of the first transistor.

Abstract: A linearizer includes fifth diodes, a third resistor, sixth diodes, and a first n-channel MOS transistor. When a low-level voltage is applied to first and fourth control voltage terminals and a high-level voltage is applied to second and third control voltage terminals, a low-level voltage is applied to a fifth control voltage terminal, and when a high-level voltage is applied to the first and fourth control voltage terminals and a low-level voltage is applied to the second and third control voltage terminals, a high-level voltage is applied to the fifth control voltage terminal.

Abstract: An attenuator includes a first diode, a first control voltage terminal, a second diode, a first resistance, a second resistance, a third diode, a fourth diode, a fifth capacitance, a second control voltage terminal, a third control voltage terminal, a fourth control voltage terminal, and a linearizer provided between an input terminal and the anode of the first diode. The linearizer linearizes a signal input to the input terminal only when low level voltages are applied to the first and fourth control voltage terminals at the same time that high level voltages are applied to the second and third control voltage terminals.

Abstract: In a driver circuit including transistors each having an emitter follower configuration and a pair of differential transistors with emitter outputs of the transistors of the emitter follower configuration as inputs, end terminals of the pair of differential transistors are connected to individual bonding pads, and the respective bonding pads and voltage sources are individually connected by wires that function as inductors. Thereby, even in the case where the lengths of the wires of output terminals change according to packaging, outputs can be matched by determining the wire lengths of the wires suitably.

Abstract: Diodes and are connected between an input terminal and an output terminal. These diodes are connected in parallel, and the cathode of a latter-stage diode is connected to the anode of a former-stage diode through a capacitor. Specifically, from the DC point of view, the diodes are serially connected, and, from the AC point of view, the diodes are connected in parallel through the capacitor.

Abstract: In a driver circuit including transistors each having an emitter follower configuration and a pair of differential transistors with emitter outputs of the transistors of the emitter follower configuration as inputs, end terminals of the pair of differential transistors are connected to individual bonding pads, and the respective bonding pads and voltage sources are individually connected by wires that function as inductors. Thereby, even in the case where the lengths of the wires of output terminals change according to packaging, outputs can be matched by determining the wire lengths of the wires suitably.

Abstract: In a current switching circuit, a complementary circuit switches, in response to an input signal, a pair of current mirror circuits between a first state, enabling the first of the current mirror circuits, through a first current mirror current and disabling the second of the current mirror circuits, and a second state, disabling the first of the current mirror circuits and enabling the second of the current mirror circuits, through a second current, mirror current such that at least one of the first and second current mirror currents flows through a level shift circuit as a level shift current.

Abstract: In a current switching circuit, a complementary circuit changes over, in response to an input signal, a pair of current mirror circuits to a first state enabling one of the current mirror circuits by a first current mirror current and disabling the other of the current mirror circuits and a second state disabling the, one of the current mirror circuits and enabling the other of the current mirror circuits by a second current mirror current such that at least one of the first and second current mirror currents flows through a level shift circuit as a level shift current.

Abstract: A level shift circuit which drops the output voltage of a prior stage circuit to an input voltage level required at a next stage circuit includes a source follower enhancement-type FET, a gate of which is connected as an input terminal, a drain of which is connected to a positive power supply, and a source of which is connected to an anode of a level shift diode; a current adjusting enhancement-type FET, a drain of which is connected to a cathode of the level shift diode, a drain and a gate of which are connected to each other through a constant current source, and a source of which is connected to a negative power supply, an out-put terminal being taken from the connection node of the level shift diode and the constant current source; and a resistor connected between the constant current source and the negative power supply, the current adjusting enhancement-type FET having its gate-to-source voltage controlled by the current flowing through the resistor, thereby adjusting the current flowing through the sou

Abstract: A differential amplifier receiving a first input signal and a second input signal, respectively, and amplifying voltage difference between the first and second input signals to output an output signal includes a first source follower circuit receiving an external data signal as the first input signal, and having an output node; a second source following circuit having a constant current source FET and receiving a reference voltage as the second input signal; and a bias circuit providing a signal having the same phase as the data signal from the output node of the first source follower circuit and inputting that signal to a gate terminal of the constant current source FET of the second source follower circuit.

Abstract: A current mirror circuit includes a current input terminal; a first FET and a second FET, each having a gate terminal, a drain terminal, and a source terminal, the gate terminal of the first FET being connected to the gate terminal of the second FET; a third FET having a source terminal connected to the drain terminal of the first FET, and a drain terminal and a gate terminal connected to each other and to the current input terminal; and a fourth FET having a source terminal connected to the drain terminal of the second FET, a gate terminal connected to the gate terminal of the third FET, and a drain terminal serving as a current output terminal. Therefore, even when the output voltage varies, since the current is almost constant, the circuit is not adversely affected by the variation in the output voltage. As a result, error in the output current in response to variations in the output voltage is significantly reduced.

Abstract: A differential amplifier is connected to a push-pull-type source follower circuit that receives biphase signals. The source follower circuit has a first set of FETs including a first source follower FET and a first current source FET and a second set of FETs including a second source follower FET and a second current source FET. A first coupling capacitance element connects the first current source FET and the second source follower FET, and a second coupling capacitance element connects the second current source FET and the first source follower FET. A diode or a resistor connects the source terminals of the first and second current source FETs to a voltage source.

Abstract: A differential amplifier includes switching FETs provided at an input side and at a reference side, respectively, forming a differential pair; an FET serving as a constant current source for providing a current flow equal to a sum of the currents flowing through the respective switching FETS; and an inductor connected in series to the FET serving as a constant current source between the connection node of both switching FETs and the power supply of the amplifier. The inductor is not a load with respect to DC and any fluctuation of the signal current flowing through the FET serving as a constant current source is small so that any difference between the output voltages at two different phase outputs is reduced.

Abstract: An optoelectronic integrated circuit includes a light responsive element for converting an optical signal into an electrical signal and an electronic circuit for processing the electrical signal. The light responsive element is disposed on a first surface of a substrate and includes p side electrodes and n side electrodes alternatingly arranged parallel to each other. The electronic circuit is disposed on a second surface of the substrate. The light responsive element is electrically connected to the electronic circuit by a via hole penetrating the substrate. In this structure, light incident on the first surface is almost completely absorbed by the substrate and hardly reaches the electronic circuit on the second surface. Therefore, variations in operation of the electronic circuit, such as an increase in drain current, are reduced.

Abstract: A preamplifier converting an input current signal into an output voltage signal and outputting the voltage signal includes a voltage amplifier, a feedback resistor connected in parallel with the voltage amplifier, and a plurality of diodes connected in series to each other and in parallel with the feedback resistor. In this circuit, the voltage drop of the feedback resistor for turning on the diodes increases in proportion to the number of diodes, thereby changing the input signal level at which the feedback resistance switches. A fuse may be connected in parallel with each of the diodes, a bonding pad may be connected to each of them, or an FET may be connected in parallel with each them to enable short-circuiting of each of the diodes. Thereby, an increased dynamic input range is obtained while giving consideration to the sensitivity and the amplification factor of the amplifier.

Abstract: A digital transmission circuit for processing and outputting a digital output signal includes a mark density detecting circuit for detecting the amplitude of the DC signal component of the digital signal and a DC level shifter superposing a DC signal component on the digital signal in response to the detected amplitude. Thereby, the output signal level, regardless of the mark density of the input signal, does not drift.