Patents by Inventor Miyo Miyashita

Miyo Miyashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8525521
    Abstract: A detector circuit for detecting degradation in the distortion characteristics of a power amplifier based on signals from both ends of a coupled line of a directional coupler. The detector circuit includes a phase shifter/attenuator for phase shifting and attenuating a signal from a coupled terminal of the coupled line, a differential amplifier for outputting difference between an output signal from the phase shifter/attenuator and a signal from the isolated terminal of the coupled line, a wave detector circuit for converting the difference into a DC signal, and a comparing circuit for determining whether the voltage level of the DC signal exceeds a predetermined level. When degradation in the distortion characteristics of the power amplifier arises, the phase shifter/attenuator phase shifts the signal from the coupled terminal and outputs a signal 180° out of phase with the signal from the isolated terminal.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: September 3, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Tomoyuki Asada, Miyo Miyashita
  • Patent number: 8461929
    Abstract: A power amplifier includes a first amplifier unit, a second amplifier unit, and an attenuator. The second amplifier receives a signal from the first amplifier unit and amplifies the signal. The attenuator is provided between the first and second amplifier units. The attenuator has arms, including at least one parallel arm and at least one series arm, and has switches connected to the arms to switch the electrical connection states of the arms with respect to the first and second amplifier units. The at least one parallel arm and the at least one series arm are alternately arranged, in the order named, as viewed in the direction from the first amplifier unit to the second amplifier unit.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: June 11, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita, Takayuki Matsuzuka, Kenji Mukai
  • Patent number: 8289102
    Abstract: A directional coupler includes capacitive elements electrically connected to a coupled port and an isolated port, respectively, for a coupled line on a chip (on-chip). The capacitive elements serve as matching capacitive elements and may be MIM (Metal Insulator Metal) capacitors on a substrate. A first end of a first of the capacitive elements is connected between the coupled port and the coupled line and a second end is grounded. A first end of a second of the capacitive elements is connected between the isolated port and the coupled line and a second end is grounded.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: October 16, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita, Hitoshi Kurusu, Tomoyuki Asada
  • Patent number: 8217722
    Abstract: A power amplifier comprises: an amplifying transistor for amplifying an input signal; a reference voltage generating circuit which generates a reference voltage; a bias circuit generating a bias voltage based on the reference voltage and supplying the bias voltage to the amplifying transistor; and a booster elevating an enable voltage input from outside and outputting the enable voltage. The reference voltage generating circuit is turned ON/OFF in correspondence with an output voltage of the booster. The booster includes: an enable terminal to which the enable voltage is applied; a power source terminal connected to a power source; a transistor having a control electrode connected to the enable terminal, a first electrode connected to the power source terminal, and a second electrode that is grounded; and a FET resistor connected between the first electrode of the transistor and the power source terminal. A gate electrode of the FET resistor is open.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: July 10, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita, Satoshi Suzuki, Takayuki Matsuzuka
  • Publication number: 20120154055
    Abstract: A power amplifier includes a first amplifier unit, a second amplifier unit, and an attenuator. The second amplifier receives a signal from the first amplifier unit and amplifies the signal. The attenuator is provided between the first and second amplifier units. The attenuator has arms, including at least one parallel arm and at least one series arm, and has switches connected to the arms to switch the electrical connection states of the arms with respect to the first and second amplifier units. The at least one parallel arm and the at least one series arm are alternately arranged, in the order named, as viewed in the direction from the first amplifier unit to the second amplifier unit.
    Type: Application
    Filed: August 1, 2011
    Publication date: June 21, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuya Yamamoto, Miyo Miyashita, Takayuki Matsuzuka, Kenji Mukai
  • Publication number: 20120062321
    Abstract: A power amplifier comprises: an amplifying transistor for amplifying an input signal; a reference voltage generating circuit which generates a reference voltage; a bias circuit generating a bias voltage based on the reference voltage and supplying the bias voltage to the amplifying transistor; and a booster elevating an enable voltage input from outside and outputting the enable voltage. The reference voltage generating circuit is turned ON/OFF in correspondence with an output voltage of the booster. The booster includes: an enable terminal to which the enable voltage is applied; a power source terminal connected to a power source; a transistor having a control electrode connected to the enable terminal, a first electrode connected to the power source terminal, and a second electrode that is grounded; and a FET resistor connected between the first electrode of the transistor and the power source terminal. A gate electrode of the FET resistor is open.
    Type: Application
    Filed: April 4, 2011
    Publication date: March 15, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuya Yamamoto, Miyo Miyashita, Satoshi Suzuki, Takayuki Matsuzuka
  • Patent number: 8049483
    Abstract: A reference voltage generation circuit comprises: a first depletion mode FET; a second depletion mode FET; a first resistor; a first bipolar transistor; a second resistor; a second bipolar transistor; a third bipolar transistor; a third resistor; a third depletion mode FET having its drain connected to a second end of the first resistor and to the collector of the first bipolar transistor; and a fourth bipolar transistor having its base and collector connected to the gate and the source of the third depletion mode FET, and its emitter grounded, wherein source voltage of the second depletion mode FET is output as a reference voltage.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: November 1, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita
  • Publication number: 20110187349
    Abstract: A detector circuit for detecting degradation in the distortion characteristics of a power amplifier based on signals from both ends of a coupled line of a directional coupler. The detector circuit includes a phase shifter/attenuator for phase shifting and attenuating a signal from a coupled terminal of the coupled line, a differential amplifier for outputting difference between an output signal from the phase shifter/attenuator and a signal from the isolated terminal of the coupled line, a wave detector circuit for converting the difference into a DC signal, and a comparing circuit for determining whether the voltage level of the DC signal exceeds a predetermined level. When degradation in the distortion characteristics of the power amplifier arises, the phase shifter/attenuator phase shifts the signal from the coupled terminal and outputs a signal 180° out of phase with the signal from the isolated terminal.
    Type: Application
    Filed: November 8, 2010
    Publication date: August 4, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuya Yamamoto, Tomoyuki Asada, Miyo Miyashita
  • Patent number: 7907032
    Abstract: A directional coupler includes a main line connected at a first end to an input port and at a second end to an output port, a coupled line connected at a first end to a coupled port and at a second end to an isolated port, and a phase shifter connected at a first end to the isolated port and at a second end to the coupled port. The phase shifter phase shifts a second reflected wave component such that the second reflected wave component is opposite in phase to a first reflected wave component, the second reflected wave component traveling from the output port to the coupled port through the isolated port and the phase shifter, the first reflected wave component traveling from the output port to the coupled port through the coupled line.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: March 15, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita
  • Publication number: 20110057746
    Abstract: A directional coupler includes capacitive elements electrically connected to a coupled port and an isolated port, respectively, for a coupled line on a chip (on-chip). The capacitive elements serve as matching capacitive elements and may be MIM (Metal Insulator Metal) capacitors on a substrate. A first end of a first of the capacitive elements is connected between the coupled port and the coupled line and a second end is grounded. A first end of a second of the capacitive elements is connected between the isolated port and the coupled line and a second end is grounded.
    Type: Application
    Filed: May 18, 2010
    Publication date: March 10, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuya Yamamoto, Miyo Miyashita, Hitoshi Kurusu, Tomoyuki Asada
  • Publication number: 20100171564
    Abstract: A directional coupler includes a main line connected at a first end to an input port and at a second end to an output port, a coupled line connected at a first end to a coupled port and at a second end to an isolated port, and a phase shifter connected at a first end to the isolated port and at a second end to the coupled port. The phase shifter phase shifts a second reflected wave component such that the second reflected wave component is opposite in phase to a first reflected wave component, the second reflected wave component traveling from the output port to the coupled port through the isolated port and the phase shifter, the first reflected wave component traveling from the output port to the coupled port through the coupled line.
    Type: Application
    Filed: May 13, 2009
    Publication date: July 8, 2010
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuya Yamamoto, Miyo Miyashita
  • Publication number: 20100127689
    Abstract: A reference voltage generation circuit comprises: a first depletion mode FET; a second depletion mode FET; a first resistor; a first bipolar transistor; a second resistor; a second bipolar transistor; a third bipolar transistor; a third resistor; a third depletion mode FET having its drain connected to a second end of the first resistor and to the collector of the first bipolar transistor; and a fourth bipolar transistor having its base and collector connected to the gate and the source of the third depletion mode FET, and its emitter grounded, wherein source voltage of the second depletion mode FET is output as a reference voltage.
    Type: Application
    Filed: April 3, 2009
    Publication date: May 27, 2010
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuya Yamamoto, Miyo Miyashita
  • Patent number: 7705658
    Abstract: A wave detector circuit includes: a first transistor having its base and collector connected together, the first transistor receiving an AC signal and a reference voltage at its base and collector; a second transistor having its base connected to the base of the first transistor through a resistor, the second transistor outputting a detected voltage at its collector; and a diode-connected temperature compensation transistor connected between ground potential and the base and the collector of the first transistor.
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: April 27, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita, Takayuki Matsuzuka
  • Patent number: 7688133
    Abstract: A power amplifier includes: an amplifying transistor; a bias circuit; a first diode; a second diode; a matching attenuating circuit; a first current mirror circuit; a serial resonant circuit, and a switch. In an amplification mode, the bias circuit supplies a bias current to the amplifying transistor, and the first current mirror circuit turns off the first and second diodes, and the switch. In an attenuation mode, the bias circuit supplies no bias current to the amplifying transistor, and the first current mirror circuit turns on the first and second diodes and the switch.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: March 30, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita
  • Publication number: 20090309655
    Abstract: A power amplifier includes: an amplifying transistor; a bias circuit; a first diode; a second diode; a matching attenuating circuit; a first current mirror circuit; a serial resonant circuit, and a switch. In an amplification mode, the bias circuit supplies a bias current to the amplifying transistor, and the first current mirror circuit turns off the first and second diodes, and the switch. In an attenuation mode, the bias circuit supplies no bias current to the amplifying transistor, and the first current mirror circuit turns on the first and second diodes, and the switch.
    Type: Application
    Filed: October 20, 2008
    Publication date: December 17, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuya Yamamoto, Miyo Miyashita
  • Patent number: 7616060
    Abstract: An amplifying transistor for amplifying a radio frequency signal between an input terminal and an output terminal. The cathode of a first diode is connected to the input terminal and the anode of a second diode is connected to the output terminal. A matching and attenuating circuit is connected between the anode of the first diode and the cathode of the second diode. A matching and attenuating circuit reduces impedance mismatches on the input terminal side and the output terminal side, and attenuates the radio frequency signal. In an amplification mode, a bias circuit supplies a bias current to an amplifying transistor and a current mirror circuit turns off the first and second diodes. In an attenuation mode, the bias circuit supplies no bias current to the amplifying transistor and the current mirror circuit turns on the first and second diodes.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: November 10, 2009
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita
  • Patent number: 7609126
    Abstract: Diodes and are connected between an input terminal and an output terminal. These diodes are connected in parallel, and the cathode of a latter-stage diode is connected to the anode of a former-stage diode through a capacitor. Specifically, from the DC point of view, the diodes are serially connected, and, from the AC point of view, the diodes are connected in parallel through the capacitor.
    Type: Grant
    Filed: August 21, 2006
    Date of Patent: October 27, 2009
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita
  • Publication number: 20090174484
    Abstract: An amplifying transistor for amplifying a radio frequency signal between an input terminal and an output terminal. The cathode of a first diode is connected to the input terminal and the anode of a second diode is connected to the output terminal. A matching and attenuating circuit is connected between the anode of the first diode and the cathode of the second diode. A matching and attenuating circuit reduces impedance mismatches on the input terminal side and the output terminal side, and attenuates the radio frequency signal. In an amplification mode, a bias circuit supplies a bias current to an amplifying transistor and a current mirror circuit turns off the first and second diodes. In an attenuation mode, the bias circuit supplies no bias current to the amplifying transistor and the current mirror circuit turns on the first and second diodes.
    Type: Application
    Filed: June 3, 2008
    Publication date: July 9, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuya Yamamoto, Miyo Miyashita
  • Patent number: 7522001
    Abstract: An emitter follower circuit applies to an input terminal of a second amplifying device a voltage according to a reference voltage applied to a reference terminal. First and second resistors are connected in series between the reference terminal and an input terminal of a first amplifying device. The collector of a first transistor is connected to the reference terminal and a control voltage is applied to the base of the first transistor. A third resistor is connected between the emitter of the first transistor and a grounding point. A current mirror circuit draws a current proportional to a current input from the collector of the first transistor from a connection point of the first and second resistors.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: April 21, 2009
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita
  • Publication number: 20090051437
    Abstract: An emitter follower circuit applies to an input terminal of a second amplifying device a voltage according to a reference voltage applied to a reference terminals. First and second resistors are connected in series between the reference terminal and an input terminal of a first amplifying device. The collector of a first transistor is connected to the reference terminal, and a control voltage is applied to the base of the first transistor. A third resistor is connected between the emitter of the first transistor and a grounding point. A current mirror circuit draws a current proportional to a current input from the collector of the first transistor from a connection point of the first and second resistors.
    Type: Application
    Filed: November 29, 2007
    Publication date: February 26, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuya Yamamoto, Miyo Miyashita