Patents by Inventor Mohan J. Kumar

Mohan J. Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11030017
    Abstract: Technologies for efficiently booting sleds in a disaggregated architecture include a sled. The sled includes a network interface controller, a set of processors, and firmware that includes an operating system. Additionally, the sled includes circuitry to perform, with multiple processors in the set of processors, a boot process. The circuitry is also to initialize the operating system present in the firmware, receive, with the network interface controller and from another sled, an assignment of a workload, and execute the assigned workload with the operating system.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: June 8, 2021
    Assignee: Intel Corporation
    Inventors: Mohan J. Kumar, Murugasamy K. Nachimuthu
  • Patent number: 11023258
    Abstract: Dynamically configurable server platforms and associated apparatus and methods. A server platform including a plurality of CPUs installed in respective sockets may be dynamically configured as multiple single-socket servers and as a multi-socket server. The CPUs are connected to a platform manager component comprising an SoC including one or more processors and an embedded FPGA. Following a platform reset, an FPGA image is loaded, dynamically configuring functional blocks and interfaces on the platform manager. The platform manager also includes pre-defined functional blocks and interfaces. During platform initialization the dynamically-configured functional blocks and interfaces are used to initialize the server platform, while both the pre-defined and dynamically-configured functional blocks and interfaces are used to support run-time operations.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: June 1, 2021
    Assignee: Intel Corporation
    Inventors: Neeraj S. Upasani, Jeanne Guillory, Wojciech Powiertowski, Sergiu D Ghetie, Mohan J. Kumar, Murugasamy K. Nachimuthu
  • Patent number: 11016832
    Abstract: Technologies for composing a managed node with multiple processors on multiple compute sleds to cooperatively execute a workload include a memory, one or more processors connected to the memory, and an accelerator. The accelerator further includes a coherence logic unit that is configured to receive a node configuration request to execute a workload. The node configuration request identifies the compute sled and a second compute sled to be included in a managed node. The coherence logic unit is further configured to modify a portion of local working data associated with the workload on the compute sled in the memory with the one or more processors of the compute sled, determine coherence data indicative of the modification made by the one or more processors of the compute sled to the local working data in the memory, and send the coherence data to the second compute sled of the managed node.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: May 25, 2021
    Assignee: Intel Corporation
    Inventors: Mohan J. Kumar, Murugasamy K. Nachimuthu, Krishna Bhuyan
  • Patent number: 10990532
    Abstract: A method performed by a first hardware element in a hierarchical arrangement of hardware elements in an object storage system is described. The method includes performing a hash on a name of an object of the object storage system. The name is part of a request that is associated with the object. A result of the hash is to identify a second hardware element directly beneath the first hardware element in the hierarchical arrangement. The request is to be sent to the second hardware element to advance the request toward being serviced by the object storage system.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: April 27, 2021
    Assignee: Intel Corporation
    Inventors: Mohan J. Kumar, Anjaneya R. Chagam Reddy
  • Publication number: 20210096848
    Abstract: A microcode (uCode) hot-upgrade method for bare metal cloud deployment and associated apparatus. Under the uCode hot-upgrade method, a uCode path is received at an out-of-band controller (e.g., baseboard management controller (BMC)) and buffered in a memory buffer in the out-of-band controller. The out-of-band controller exposes the memory buffer as a Memory-Mapped Input-Output (MMIO) range to a host CPU. A uCode upgrade interrupt service is triggered to upgrade uCode for one or more CPUs in a bare-metal cloud platform during runtime of a tenant host operating system (OS) using an out-of-bound process. This innovation enables cloud service providers to deploy uCode hot-patches to bare metal servers for live-patch without touching the tenant operating system environment.
    Type: Application
    Filed: December 11, 2020
    Publication date: April 1, 2021
    Inventors: Sarathy Jayakumar, Chuan Song, Mohan J. Kumar
  • Patent number: 10958990
    Abstract: Trusted platform telemetry mechanisms and associated methods, apparatus, and firmware components. Trusted telemetry mechanisms are provided for securely collecting platform telemetry data from telemetry data sources on a compute platform, such as machine specific registers (MSRs), device registers, system management bus (SMBus) and memory controllers. The telemetry data is collected from the telemetry data sources using various mechanisms, and securely stored on the compute platform in a manner that is inaccessible to software running on the compute platform. A submission queue and completion queue model may also be implemented to facilitate collection of telemetry data. In addition, a memory-mapped input-output (MMIO) aliasing scheme is provided to facilitate collection of telemetry data from platform telemetry data sources using various access mechanisms.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: March 23, 2021
    Assignee: Intel Corporation
    Inventors: Murugasamy K. Nachimuthu, Mohan J. Kumar
  • Patent number: 10958729
    Abstract: Non-volatile Memory Express over Fabric (NVMeOF) using Volume Management Device (VMD) schemes and associated methods, systems and software. The schemes are implemented in a data center environment including compute resources in compute drawers and storage resources residing in pooled storage drawers that are communicatively couple via a fabric. Compute resources are composed as compute nodes or virtual machines/containers running on compute nodes to utilize remote storage devices in pooled storage drawers, while exposing the remote storage devices as local NVMe storage devices to software running on the compute nodes. This is facilitated by virtualizing the system's storage infrastructure through use of hardware-based components, firmware-based components, or a combination of hardware/firmware- and software-based components. The schemes support the use of remote NVMe storage devices using an NVMeOF protocol and/or use of non-NVMe storage devices using NVMe emulation.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: March 23, 2021
    Assignee: Intel Corporation
    Inventors: Mohan J. Kumar, Murugasamy K. Nachimuthu
  • Patent number: 10956325
    Abstract: Embodiments provide for a processor including a cache a caching agent and a processing node to decode an instruction including at least one operand specifying an address range within a distributed shared memory (DSM) and perform a flush to a first of a plurality of memory devices in the DSM at the specified address range.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: March 23, 2021
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Karthik Kumar, Mohan J. Kumar, Thomas Willhalm, Robert G. Blankenship
  • Patent number: 10929290
    Abstract: System, method, and machine readable medium implementing a mechanism for selecting and providing reconfigurable hardware resources in a rack architecture system are described herein. One embodiment of a system includes a plurality of nodes and a configuration manager. Each of the nodes further includes: a plurality of memory resources and a node manager. The node manager is to track the memory resources that are available in the node, determine different possible configurations of memory resources, and generate a performance estimate for each of the possible configurations. The configuration manager is to receive a request to select one or more nodes based on a set of performance requirements, receive from each node the different possible configurations of memory resources and the performance estimate for each of the possible configurations, and iterate through collected configurations and performance estimates to determine one or more node configurations best matching the set of performance requirements.
    Type: Grant
    Filed: December 31, 2016
    Date of Patent: February 23, 2021
    Assignee: Intel Corporation
    Inventors: Murugasamy K. Nachimuthu, Mohan J. Kumar
  • Patent number: 10931550
    Abstract: Out-of-band management techniques for networking fabrics are described. In an example embodiment, an apparatus may comprise a packet-switched network interface to deconstruct a packet received via an out-of-band management network and control circuitry to execute an out-of-band management agent, and the out-of-band management agent may be operative to identify a configuration command comprised in the received packet and control an optical circuit-switched network interface based on the configuration command. Other embodiments are described and claimed.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: February 23, 2021
    Assignee: Intel Corporation
    Inventors: Mohan J. Kumar, Murugasamy J. Nachimuthu
  • Patent number: 10915468
    Abstract: A shared memory controller is to service load and store operations received, over data links, from a plurality of independent nodes to provide access to a shared memory resource. Each of the plurality of independent nodes is to be permitted to access a respective portion of the shared memory resource. Interconnect protocol data and memory access protocol data are sent on the data links and transitions between the interconnect protocol data and memory access protocol data can be defined and identified.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: February 9, 2021
    Assignee: Intel Corporation
    Inventors: Debendra Das Sharma, Robert G. Blankenship, Suresh S. Chittor, Kenneth C. Creta, Balint Fleischer, Michelle C. Jen, Mohan J. Kumar, Brian S. Morris
  • Publication number: 20210011706
    Abstract: Examples include updating firmware for a persistent memory module in a computing system during runtime. Examples include copying a new version of persistent memory module firmware into an available area of random-access memory (RAM) in the persistent memory module, and transferring processing of a current version of persistent memory module firmware to the new version of persistent memory module firmware during runtime of the computing system, without a reset of the computing system and without quiesce of access to persistent memory media in the persistent memory module, while continuing to perform critical event handling by the current version of persistent memory module firmware.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 14, 2021
    Inventors: Murugasamy K. NACHIMUTHU, Mohan J. KUMAR, Muthukumar P. SWAMINATHAN, Daniel K. OSAWA, Maciej PLUCINSKI
  • Publication number: 20200393986
    Abstract: Technologies for lifecycle management include multiple computing devices in communication with a lifecycle management server. On boot, a computing device loads a lightweight firmware boot environment. The lightweight firmware boot environment connects to the lifecycle management server and downloads one or more firmware images for controllers of the computing device. The controllers may include baseboard management controllers, network interface controllers, solid-state drive controllers, or other controllers. The lifecycle management server may select firmware images and/or versions of firmware images based on the controllers or the computing device. The computing device installs each firmware image to a controller memory device coupled to a controller, and in use, each controller accesses the firmware image in the controller memory device. The controller memory device may be a DRAM device or a high-performance byte-addressable non-volatile memory. Other embodiments are described and claimed.
    Type: Application
    Filed: August 28, 2020
    Publication date: December 17, 2020
    Inventors: Murugasamy K. Nachimuthu, Mohan J. Kumar
  • Publication number: 20200389296
    Abstract: Technologies for load balancing a storage network include a system. The system includes circuitry to adjust routing rules in a network interface controller to deliver a packet from one of multiple uplinks to one of any physical functions, circuitry to remap, in response to a failure of a switch, a port from one physical function to another physical function, and circuitry to communicate control data between a software defined network controller and one or more agents in one or more host endpoints with a hierarchical distributed hashing table.
    Type: Application
    Filed: August 24, 2020
    Publication date: December 10, 2020
    Inventors: Mrittika Ganguli, Yadong Li, Michael Orr, Anjaneya Reddy Chagam Reddy, Mohan J. Kumar
  • Publication number: 20200326925
    Abstract: Examples include updating firmware for a persistent memory module in a computing system during runtime. Examples include downloading firmware to the persistent memory module; saving settings of one or more input/output (I/O) devices of the computing system and setting a timeout value of the one or more I/O devices to greater than a time to activate the firmware in the persistent memory module. Examples include updating the firmware in the persistent memory module during runtime of the computing system by quiescing access to one or more memory modules of the computing system; sending a request to the persistent memory module to activate the firmware; waiting for the request to activate the firmware to be completed by the persistent memory module; and un-quiescing access to the one or more memory modules of the computing system; and restoring the saved settings for the one or more I/O devices.
    Type: Application
    Filed: June 26, 2020
    Publication date: October 15, 2020
    Inventors: Murugasamy K. NACHIMUTHU, Mohan J. KUMAR, Tiffany J. KASANICKY, Christopher HESS, Sarathy JAYAKUMAR, Daniel K. OSAWA, Maciej PLUCINSKI, Krzysztof RUSOCKI, Jason M. BILLS
  • Patent number: 10795595
    Abstract: Technologies for lifecycle management include multiple computing devices in communication with a lifecycle management server. On boot, a computing device loads a lightweight firmware boot environment. The lightweight firmware boot environment connects to the lifecycle management server and downloads one or more firmware images for controllers of the computing device. The controllers may include baseboard management controllers, network interface controllers, solid-state drive controllers, or other controllers. The lifecycle management server may select firmware images and/or versions of firmware images based on the controllers or the computing device. The computing device installs each firmware image to a controller memory device coupled to a controller, and in use, each controller accesses the firmware image in the controller memory device. The controller memory device may be a DRAM device or a high-performance byte-addressable non-volatile memory. Other embodiments are described and claimed.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: October 6, 2020
    Assignee: Intel Corporation
    Inventors: Murugasamy K. Nachimuthu, Mohan J. Kumar
  • Patent number: 10791174
    Abstract: Mechanisms for efficient discovery of storage resources in a Rack Scale Architecture (RSA) system and associated methods, apparatus, and systems. A rack is populated with pooled system drawers including pooled compute drawers and pooled storage drawers communicatively coupled via input-output (IO) cables. Compute nodes including one or more processors, memory resources, and optional local storage resources are installed in the pooled compute drawers, and are enabled to be selectively-coupled to storage resources in the pooled storage drawers over virtual attachment links. During a discovery process, a compute node determines storage resource characteristics of storage resources it may be selectively-coupled to and the attachment links used to access the storage resources. The storage resource characteristics are aggregated by a pod manager that uses corresponding configuration information to dynamically compose compute nodes for rack users based on user needs.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: September 29, 2020
    Assignee: Intel Corporation
    Inventors: Murugasamy K. Nachimuthu, Mohan J. Kumar
  • Patent number: 10783048
    Abstract: Embodiments are generally directed to high capacity energy backed memory with off device storage. A memory device includes a circuit board; multiple memory chips that are installed on the circuit board; a controller to provide for backing up contents of the memory chips when a power loss condition is detected; a connection to a backup energy source; and a connection to a backup data storage that is separate from the memory device.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: September 22, 2020
    Assignee: Intel Corporation
    Inventors: Mohan J. Kumar, Murugasamy K. Nachimuthu, George Vergis
  • Publication number: 20200285461
    Abstract: A microcode (uCode) hot-upgrade method for bare metal cloud deployment and associated apparatus. The uCode hot-upgrade method applies a uCode patch to a firmware storage device (e.g., BIOS SPI flash) through an out-of-band controller (e.g., baseboard management controller (BMC)). In conjunction with receiving a uCode patch, a uCode upgrade interrupt service is triggered to upgrade uCode for one or more CPUs in a bare-metal cloud platform during runtime of a tenant host operating system (OS) using an out-of-bound process. This innovation enables cloud service providers to deploy uCode hot-patches to bare metal servers for persistent storage and live-patch without touching the tenant operating system environment.
    Type: Application
    Filed: April 6, 2020
    Publication date: September 10, 2020
    Inventors: Mohan J. Kumar, Sarathy Jayakumar, Chuan Song, Ruixia Li, Xiaojin Yuan, Haiyue Wang, Chong Han
  • Patent number: 10757487
    Abstract: Examples may include techniques to allocate physical accelerator resources from pools of accelerator resources. In particular, virtual computing devices can be composed from physical resources and physical accelerator resources dynamically allocated to the virtual computing devices. The present disclosure provides that physical accelerator resources can be dynamically allocated, or composed, to a virtual computing device despite not being physically coupled to other components in the virtual device.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: August 25, 2020
    Assignee: Intel Corporation
    Inventors: Mohan J. Kumar, Murugasamy K. Nachimuthu, Aaron Gorius, Michael Crocker