Patents by Inventor Mohan Kumar

Mohan Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10055353
    Abstract: A non-volatile random access memory (NVRAM) is used in a computer system to perform multiple roles in the platform storage hierarchy. The NVRAM is byte-rewritable and byte-erasable by the processor. The NVRAM is coupled to the processor to be directly accessed by the processor without going through an I/O subsystem. The NVRAM stores a Basic Input and Output System (BIOS). During a Pre-Extensible Firmware Interface (PEI) phase of the boot process, the cache within the processor can be used in a write-back mode for execution of the BIOS.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: August 21, 2018
    Assignee: Intel Corporation
    Inventors: Murugasamy K. Nachimuthu, Mohan Kumar
  • Patent number: 10013660
    Abstract: A method and control system are disclosed for optimizing load scheduling for a power plant having one or more generation units. The method can include analyzing the operating state of one or more components of generation units in terms of one or more risk indices associated with one or more components of generation units; updating an objective function that reflects the state of one or more components of generation units; solving the objective function to optimize a schedule of the one or more generation units and operating state of one or more components of generation units; and operating the one or more generation units at optimized schedule and operating state.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: July 3, 2018
    Assignee: ABB Research Ltd
    Inventors: Gopinath Selvaraj, Senthil Kumar Sundaram, Mohan Kumar Shanmugam, Shrikant Bhat
  • Patent number: 10007528
    Abstract: In some embodiments, a PPM interface may be provided with functionality to facilitate to an OS memory power state management for one or more memory nodes, regardless of a particular platform hardware configuration, as long as the platform hardware is in conformance with the PPM interface.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: June 26, 2018
    Assignee: Intel Corporation
    Inventors: Guy M. Therien, Paul Diefenbaugh, Anil Aggarwal, Andrew D. Henroid, Jeremy J. Shrall, Efraim Rotem, Krishnakanth V. Sistla, Eliezer Weissmann, Mohan Kumar, Sarathy Jayakumar, Jose Andy Vargas, Neelam Chandwani, Michael A. Rothman, Robert Gough, Mark Doran
  • Patent number: 9970414
    Abstract: The present disclosure is directed to a pitch assembly for coupling a rotor blade to a hub of a wind turbine. In one embodiment, the pitch assembly includes a first pitch bearing having a first outer race and a first inner race rotatable relative to the first outer race via a first set of rolling elements, a second pitch bearing having a second outer race and a second inner race rotatable relative to the second outer race via a second set of rolling elements, and at least one spacer configured axially between and contacting the first and second pitch bearings. Further, at least a portion of the first pitch bearing and at least a portion of the second pitch bearing are axially aligned between the rotatable hub and the rotor blade in a generally span-wise direction.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: May 15, 2018
    Assignee: General Electric Company
    Inventors: Biju Nanukuttan, Rajanikanth Reddy Dasari, Dhanesh Chandrashekar Pathuvoth, Srikanth Samudrala, Mohan Kumar Lakshminarayana
  • Publication number: 20180091521
    Abstract: A computer account server receives a nominee identity from an account owner associated with owner access credentials. The nominee identity is stored in a data structure of a computer account that is selected based on the owner access credentials. Electronic access to information stored in the data structure is then restricted to access requests from computer terminals that provide the owner access credentials. In response to determining that an account handoff event has become satisfied for the computer account, the computer account server sends a nominee handoff message using the nominee identity retrieved from the data structure. A nominee access request message is received from a nominee computer terminal. In response to validating content of the nominee access request message, the computer account server modifies the restriction of electronic access to grant the nominee computer terminal electronic access to the information stored in the data structure of the computer account.
    Type: Application
    Filed: September 28, 2016
    Publication date: March 29, 2018
    Inventors: Rajendra Kumar PACHOURI, Chinmay NAMJOSHI, Lal Mohan KUMAR, Hitesh JAIN
  • Publication number: 20170371927
    Abstract: A method for performing row qualification in database table retrieval and join operations. This method, referred to as bulk qualification, evaluates conditions on multiple rows in a database table at the same time, providing more efficient utilization of memory bandwidth and CPU throughput.
    Type: Application
    Filed: June 26, 2017
    Publication date: December 28, 2017
    Applicant: Teradata US, Inc.
    Inventors: Bhashyam Ramesh, Tirupathi Prabhu Bellapukonda, Mohan Kumar KJ, Vamshi Krishna Vangapalli
  • Patent number: 9779094
    Abstract: The invention provides for techniques to process and produce email documents. The techniques provide for organizing a first plurality of email documents into a plurality of document groups, reviewing a document group from the plurality of document groups, and associating a review content with the document group. The techniques provide for ways to propagate the review content to one or more email documents associated with the document group and producing a second plurality of email documents. The techniques provide for annotating one or more email documents in accordance with the review content. Depending on the embodiment, review content may include text, graphics, audio, tag, and multimedia information. Produced documents can be searched and browsed in accordance with information in the review content. Email documents can be grouped by information in meta information and/or header information associated with the email documents into various groups, including threads or conversations, for example.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: October 3, 2017
    Assignee: Veritas Technologies LLC
    Inventors: Mohan Kumar, Gary Lehrman, Hari Krishna Dara
  • Publication number: 20170268328
    Abstract: A technique facilitates placement of a pumping system, e.g. an electric submersible pumping system, in a borehole. The pumping system is deployed downhole into the borehole via a conveyance which may be in the form of an electric power cable for providing electric power to the pumping system. A measuring device is disposed between the conveyance and the pumping system and connects the pumping system to the conveyance. The measuring device detects engagement of the pumping system with downhole equipment by monitoring a selected property, e.g. load on the conveyance.
    Type: Application
    Filed: June 10, 2016
    Publication date: September 21, 2017
    Inventors: Fraz Ahmad Kharal, Nicolas Gastaud, Mohan Kumar Sundararajan, Raju Ekambaram
  • Publication number: 20170147484
    Abstract: Described is a computing platform, which comprises: a non-volatile memory having a firmware boot program; and a CPU to execute the firmware boot program when the CPU is reset, the firmware boot program including instructions to create Power and Performance Measurement (PPM) interface data structures including an error injection table structure to provide error injection services to an OS.
    Type: Application
    Filed: January 10, 2017
    Publication date: May 25, 2017
    Inventors: Mohan Kumar, Sarathy Jayakumar, Jose Andy Vargas
  • Patent number: 9645715
    Abstract: The present disclosure relates to a computer-implemented method for electronic design simulation. The method may include receiving, using at least one processor, an electronic design and displaying, at a graphical user interface, at least a portion of the electronic design. Embodiments may also include allowing a user to select at least one design variable at the graphical user interface. Embodiments may also include simulating the electronic design, based upon, at least in part, the selected at least one design variable and in response to the simulation, automatically displaying an updated value at the graphical user interface.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: May 9, 2017
    Assignee: Cadence Design Systems, Inc.
    Inventors: Abha Jain, Hitesh Mohan Kumar, Parag Choudhary, Viren Agarwal
  • Patent number: 9633163
    Abstract: The present disclosure relates to a computer-implemented method for electronic design automation. The method may include providing, using one or more processors, an electronic design and visually displaying a plurality of possible route sets associated with the electronic design at a graphical user interface. The method may include providing an option to select between the plurality of possible route sets at the graphical user interface.
    Type: Grant
    Filed: January 5, 2015
    Date of Patent: April 25, 2017
    Assignee: Cadence Design Systems, Inc.
    Inventors: Hitesh Mohan Kumar, Sagar Kumar, Ankur Gupta
  • Publication number: 20170072041
    Abstract: Disclosed are vaccines containing one or more immunogenic polypeptides derived from an EtpE protein from an Ehrlichia sp. or nucleic acid encoding these polypeptides. Also disclosed is a method for vaccinating a subject against Ehrlichia sp. that involves administering to the subject a composition comprising any of the disclosed vaccines. Also disclosed is a method for diagnosing and/or monitoring the treatment of Ehrlichiosis in a subject that comprising assaying a biological sample (e.g., blood, serum, or plasma sample) from the subject for the presence of an antibody that specifically binds an EtpE polypeptide. Also disclosed are methods for delivering a therapeutic or diagnostic agent to a cell in a subject that involves conjugating the agent, or a delivery vehicle comprising the agent, to polypeptide containing the C-terminal domain of an EtpE protein.
    Type: Application
    Filed: November 28, 2016
    Publication date: March 16, 2017
    Inventors: Yasuko RIKIHISA, Dipu MOHAN-KUMAR
  • Patent number: 9594570
    Abstract: Described is a computing platform, which comprises: a non-volatile memory having a firmware boot program; and a CPU to execute the firmware boot program when the CPU is reset, the firmware boot program including instructions to create Power and Performance Measurement (PPM) interface data structures including an error injection table structure to provide error injection services to an OS.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: March 14, 2017
    Assignee: Intel Corporation
    Inventors: Mohan Kumar, Sarathy Jayakumar, Jose Andy Vargas
  • Publication number: 20170052896
    Abstract: A non-volatile random access memory (NVRAM) is used in a computer system to perform multiple roles in the platform storage hierarchy. The NVRAM is byte-rewritable and byte-erasable by the processor. The NVRAM is coupled to the processor to be directly accessed by the processor without going through an I/O subsystem. The NVRAM stores a Basic Input and Output System (BIOS). During a Pre-Extensible Firmware Interface (PEI) phase of the boot process, the cache within the processor can be used in a write-back mode for execution of the BIOS.
    Type: Application
    Filed: August 29, 2016
    Publication date: February 23, 2017
    Inventors: Murugasamy K. NACHIMUTHU, Mohan KUMAR
  • Patent number: 9542403
    Abstract: Identifying symbolic links in network file systems is provided. An absolute path may be determined at a network file server. This may include determining a complete client path from an initial client path and combining the complete client path with a server export path. Once the absolute path is determined, it may be traversed using a file descriptor of each file in the absolute path to identify a symbolic link.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: January 10, 2017
    Assignee: International Business Machines Corporation
    Inventors: Venkateswararao Jujjuri, Sripathi Kodi, Mohan Kumar Mohan Raj, Aneesh K. Veetil
  • Publication number: 20170002795
    Abstract: The present disclosure is directed to a pitch assembly for coupling a rotor blade to a hub of a wind turbine. In one embodiment, the pitch assembly includes a first pitch bearing having a first outer race and a first inner race rotatable relative to the first outer race via a first set of rolling elements, a second pitch bearing having a second outer race and a second inner race rotatable relative to the second outer race via a second set of rolling elements, and at least one spacer configured axially between and contacting the first and second pitch bearings. Further, at least a portion of the first pitch bearing and at least a portion of the second pitch bearing are axially aligned between the rotatable hub and the rotor blade in a generally span-wise direction.
    Type: Application
    Filed: July 1, 2015
    Publication date: January 5, 2017
    Inventors: Biju Nanukuttan, Rajanikanth Reddy Dasari, Dhanesh Chandrashekar Pathuvoth, Srikanth Samudrala, Mohan Kumar Lakshminarayana
  • Patent number: 9526772
    Abstract: Disclosed are vaccines containing one or more immunogenic polypeptides derived from an EtpE protein from an Ehrlichia sp. or nucleic acid encoding these polypeptides. Also disclosed is a method for vaccinating a subject against Ehrlichia sp. that involves administering to the subject a composition comprising any of the disclosed vaccines. Also disclosed is a method for diagnosing and/or monitoring the treatment of Ehrlichiosis in a subject that comprising assaying a biological sample (e.g., blood, serum, or plasma sample) from the subject for the presence of an antibody that specifically binds an EtpE polypeptide. Also disclosed are methods for delivering a therapeutic or diagnostic agent to a cell in a subject that involves conjugating the agent, or a delivery vehicle comprising the agent, to polypeptide containing the C-terminal domain of an EtpE protein.
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: December 27, 2016
    Assignee: Ohio State Innovation Foundation
    Inventors: Yasuko Rikihisa, Dipu Mohan-Kumar
  • Patent number: 9454380
    Abstract: In some embodiments, a PPM interface may be provided with functionality to facilitate to an OS RAS services for one or more hardware components, regardless of a particular platform hardware configuration, as long as the platform hardware and OS are in conformance with the PPM interface.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: September 27, 2016
    Assignee: Intel Corporation
    Inventors: Mohan Kumar, Sarathy Jayakumar, Jose Andy Vargas
  • Patent number: 9430372
    Abstract: A non-volatile random access memory (NVRAM) is used in a computer system to perform multiple roles in the platform storage hierarchy. The NVRAM is byte-rewritable and byte-erasable by the processor. The NVRAM is coupled to the processor to be directly accessed by the processor without going through an I/O subsystem. The NVRAM stores a Basic Input and Output System (BIOS). During a Pre-Extensible Firmware Interface (PEI) phase of the boot process, the cache within the processor can be used in a write-back mode for execution of the BIOS.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: August 30, 2016
    Assignee: Intel Corporation
    Inventors: Murugasamy K. Nachimuthu, Mohan Kumar
  • Patent number: 9423959
    Abstract: An apparatus and method are described for store durability and ordering in a persistent memory architecture. For example, one embodiment of a method comprises: performing at least one store operation to one or more addresses identifying at least one persistent memory device, the store operations causing one or more memory controllers to store data in the at least one persistent memory device; sending a request message to the one or more memory controllers instructing the memory controllers to confirm that the store operations are successfully committed to the at least one persistent memory device; ensuring at the one or more memory controllers that at least all pending store operations received at the time of the request message will be committed to the persistent memory device; and sending a response message from the one or more memory controllers indicating that the store operations are successfully committed to the persistent memory device.
    Type: Grant
    Filed: June 29, 2013
    Date of Patent: August 23, 2016
    Assignee: Intel Corporation
    Inventors: Subramanya R. Dulloor, Sanjay Kumar, Rajesh M. Sankaran, Gilbert Neiger, Richard A. Uhlig, Robert S. Chappell, Joseph Nuzman, Kai Cheng, Sailesh Kottapalli, Yen-Cheng Liu, Mohan Kumar, Raj K. Ramanujan, Glenn J. Hinton