Patents by Inventor Moon Gyu Jang

Moon Gyu Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110194976
    Abstract: A detection device and system are provided. The detection device includes a detection capacitor and a Field Effect Transistor (FET). The detection capacitor has a reactive material layer reacting to a specific functional group in a fluid, and first and second electrodes disposed on the both surfaces of an insulating layer, and the FET has a source electrode connected with the second electrode, a gate electrode connected with the first electrode, and a drain electrode. Here, the insulating layer of the detection capacitor is thicker than a gate insulating layer of the FET.
    Type: Application
    Filed: June 13, 2008
    Publication date: August 11, 2011
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Chang Geun Ahn, Chan Woo Park, Jong Heon Yang, In Bok Baek, Chil Seong Ah, Han Young Yu, An Soon Kim, Tae Youb Kim, Moon Gyu Jang, Seon Hee Park
  • Publication number: 20110192439
    Abstract: Provided is a thermoelectric array including a plurality of thermoelectric elements arranged in m rows and n columns (each of m and n is an integer equal to or more than 1), each thermoelectric element including a heat absorption layer, a first heat sink layer, a second heat sink layer, a first-conductivity-type leg, and a second-conductivity-type leg formed on the same plane. The heat absorption layers of the thermoelectric elements adjacently disposed in a row or column direction are disposed adjacent to each other, and the first and second heat sink layers of the adjacent thermoelectric elements are disposed adjacent to each other. In this case, thermal interference between adjacent thermoelectric elements may be minimized, thereby obtaining a thermoelectric array having a high figure of merit.
    Type: Application
    Filed: February 7, 2011
    Publication date: August 11, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Young Sam PARK, Moon Gyu Jang, Myung Sim Jun, Young Hoon Hyun
  • Patent number: 7981735
    Abstract: Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same that are capable of minimizing leakage current caused by damage to a gate sidewall of the Schottky barrier tunnel transistor using a Schottky tunnel barrier naturally formed at a semiconductor-metal junction as a tunnel barrier. The method includes the steps of: forming a semiconductor channel layer on an insulating substrate; forming a dummy gate on the semiconductor channel layer; forming a source and a drain at both sides of the dummy gate on the insulating substrate; removing the dummy gate; forming an insulating layer on a sidewall from which the dummy gate is removed; and forming an actual gate in a space from which the dummy gate is removed. In manufacturing the Schottky barrier tunnel transistor using the dummy gate, it is possible to form a high-k dielectric gate insulating layer and a metal gate, and stable characteristics in silicidation of the metal layer having very strong reactivity can be obtained.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: July 19, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yark Yeon Kim, Seong Jae Lee, Moon Gyu Jang, Chel Jong Choi, Myung Sim Jun, Byoung Chul Park
  • Publication number: 20110165557
    Abstract: Provided are an apparatus and method for detecting biomolecules. The apparatus includes a FET having a substrate, a source electrode, a drain electrode, a channel region between the source and drain electrodes, and probe molecules fixed to the channel region, wherein the source and drain electrodes are separated on the substrate, a microfluid supplier selectively supplying one of a reference buffer solution of low ionic concentration and a reaction solution of high ionic concentration containing target molecules, to the channel region of the FET to which the probe molecules are fixed, and a biomolecule detector detecting the target molecules by measuring a first current value of the channel region of the FET, and a second current value of the channel region of the FET to which the target molecules and the probe molecules that bind to each other in the reaction solution of high ionic concentration are fixed.
    Type: Application
    Filed: November 20, 2008
    Publication date: July 7, 2011
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Chil-Seong Ah, Ansoon Kim, Chan-Woo Park, Chang-Geun Ahn, Jong-Heon Yang, In-Bok Baek, Taeyoub Kim, HyeKyoung Yang, Gun-Yong Sung, Seon-Hee Park, Han-Young Yu, Moon-Gyu Jang
  • Publication number: 20110150036
    Abstract: Provided are a flexible thermoelectric generator, a wireless sensor node including the same and a method of manufacturing the same. The flexible thermoelectric generator includes a plurality of P-type semiconductors and a plurality of N-type semiconductors, which are alternately arranged, an upper metal for connecting upper surfaces of the adjacent P-type semiconductor and N-type semiconductor, a lower metal for connecting lower surfaces of the adjacent P-type semiconductor and N-type semiconductor, and alternately disposed with respect to the upper metal, a P-type metal connected to at least one P-type semiconductor among the plurality of P-type semiconductors, and an N-type metal connected to at least one N-type semiconductor among the plurality of N-type semiconductors.
    Type: Application
    Filed: November 18, 2010
    Publication date: June 23, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Woo Lee, Yil Suk Yang, Se Wan Heo, Moon Gyu Jang, Jong Dae Kim
  • Publication number: 20110140680
    Abstract: An apparatus and method for extracting maximum power from a solar cell are provided. The apparatus includes a solar cell for producing power from solar energy, a maximum power extractor for generating a pulse width modulation signal for extracting the maximum power from the solar cell, and a DC-DC converter for adjusting an amount of current generated from the solar cell according to the pulse width modulation signal.
    Type: Application
    Filed: September 9, 2010
    Publication date: June 16, 2011
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Se Wan HEO, Yil Suk Yang, Jae Woo Lee, Moon Gyu Jang, Jong Dae Kim
  • Publication number: 20110129668
    Abstract: Provided is an organic-inorganic hybrid nanofiber including an inorganic semiconductor material in a nanoparticle or nanocrystal state, and a conductive polymer including the inorganic semiconductor material and having a lower thermal conductivity than the inorganic semiconductor material. The inorganic semiconductor material and the conductive polymer are arranged in a composite material type to have a thermoelectric property. Thus, the organic-inorganic hybrid nanofiber can be applied to a low-priced thermoelectric device having relatively high thermoelectric conversion efficiency.
    Type: Application
    Filed: December 1, 2010
    Publication date: June 2, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Tae Hyoung ZYUNG, Moon Gyu JANG, Su Jae LEE, Young Sam PARK, Young Hoon HYUN
  • Publication number: 20110068326
    Abstract: A Schottky barrier tunnel transistor includes a gate electrode, and source and drain regions. The gate electrode is formed over a channel region of a substrate to form a Schottky junction with the substrate. The source and drain regions are formed in the substrate exposed on both sides of the gate electrode.
    Type: Application
    Filed: November 30, 2010
    Publication date: March 24, 2011
    Inventors: Moon-Gyu Jang, Yark-Yeon Kim, Chel-Jong Choi, Myung-Sim Jun, Tae-Youb Kim, Seong-Jae Lee
  • Publication number: 20110062912
    Abstract: Provided is an energy and power management integrated circuit (IC) device. The energy and power management IC device includes a plurality of energy conversion devices for harvesting energy from respective energy conversion sources and converting the energy into electric energy, an energy management IC (EMIC) for converting the electric energy converted by the energy conversion devices into stable energy, a storage device for storing the energy or power converted by the EMIC, a power management IC (PMIC) for receiving and distributing the power stored in the storage device, and a plurality of output load devices for consuming the power distributed by the PMIC. Accordingly, it is possible to harvest energy in an environmentally friendly way and semi-permanently use the energy without changing a battery.
    Type: Application
    Filed: February 19, 2010
    Publication date: March 17, 2011
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Yil Suk YANG, Jong Dae Kim, Jae Woo Lee, Se Wan Heo, Moon Gyu Jang
  • Patent number: 7893466
    Abstract: Provided are a semiconductor Field-Effect Transistor (FET) sensor and a method of fabricating the same. The method includes providing a semiconductor substrate, forming a sensor structure having a fin-shaped structure on the semiconductor substrate, injecting ions for electrical ohmic contact into the sensor structure, and depositing a metal electrode on the sensor structure, immobilizing a sensing material to be specifically combined with a target material onto both sidewall surfaces of the fin-shaped structure, and forming a passage on the sensor structure such that the target material passes through the fin-shaped structure.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: February 22, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong Heon Yang, In Bok Baek, Chang Geun Ahn, Chan Woo Park, An Soon Kim, Han Young Yu, Chil Seong Ah, Tae Youb Kim, Myung Sim Jun, Moon Gyu Jang
  • Publication number: 20110000517
    Abstract: A thermoelectric device is provided. The thermoelectric device includes first and second electrodes, a first leg, a second leg, and a common electrode. The first leg is disposed on the first electrode and includes one or more first semiconductor pattern and one or more first barrier patterns. The second leg is disposed on the second electrode and includes one or more second semiconductor pattern and one or more second barrier patterns. The common electrode is disposed on the first leg and the second leg. Herein, the first barrier pattern has a lower thermal conductivity than the first semiconductor pattern, and the second barrier pattern has a lower thermal conductivity than the second semiconductor pattern. The first/second barrier pattern has a higher electric conductivity than the first/second semiconductor pattern. The first/second barrier pattern forms an ohmic contact with the first/second semiconductor pattern.
    Type: Application
    Filed: December 7, 2009
    Publication date: January 6, 2011
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Young-Sam Park, Moon-Gyu Jang, Taehyoung Zyung, Younghoon Hyun, Myungsim Jun
  • Patent number: 7863121
    Abstract: A Schottky barrier tunnel transistor includes a gate electrode, and source and drain regions. The gate electrode is formed over a channel region of a substrate to form a Schottky junction with the substrate. The source and drain regions are formed in the substrate exposed on both sides of the gate electrode.
    Type: Grant
    Filed: May 8, 2007
    Date of Patent: January 4, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Moon-Gyu Jang, Yark-Yeon Kim, Chel-Jong Choi, Myung-Sim Jun, Tae-Youb Kim, Seong-Jae Lee
  • Publication number: 20100294327
    Abstract: Provided are a thermoelectric device using radiant heat as a heat source and a method of fabricating the same. In the thermoelectric device, an anti-reflection layer formed on a heat absorption layer causes as much radiant light as possible to be absorbed by the heat absorption layer without being reflected to the outside so that the radiant heat absorption efficiency can be improved. Also, in the thermoelectric device, an insulating layer formed on a heat dissipation layer and a first reflection layer formed on the insulating layer can prevent external radiant heat from being absorbed by the heat dissipation layer, and as much radiant heat transferred to the heat dissipation layer as possible can be dissipated away from the heat dissipation layer by a second reflection layer thermally connected with the heat dissipation layer so that the radiant heat emission efficiency can be improved.
    Type: Application
    Filed: May 4, 2010
    Publication date: November 25, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Young Sam PARK, Jung Wook Lim, Moon Gyu Jang
  • Publication number: 20100283031
    Abstract: A biosensor using a nanodot and a method of manufacturing the same are provided. A silicon nanowire can be formed by a CMOS process to reduce manufacturing costs. In addition, an electrically charged nanodot is coupled to a target molecule to be detected, in order to readily change conductivity of the silicon nanowire, thereby making it possible to implement a biosensor capable of providing good sensitivity and being manufactured at a low cost.
    Type: Application
    Filed: September 29, 2008
    Publication date: November 11, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Tae Youb KIM, Chil Seong Ah, Chang Geun Ahn, Han Young Yu, Jong Heon Yang, Moon Gyu Jang
  • Publication number: 20100270530
    Abstract: A method for manufacturing a biosensor device is provided. The method involves forming a silicon nanowire channel with a line width of several nanometers to several tens of nanometers using a typical photolithography process, and using the channel to manufacture a semiconductor nanowire sensor device.
    Type: Application
    Filed: July 24, 2008
    Publication date: October 28, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Chan Woo Park, Chang Geun Ahn, Jong Heon Yang, In Book Baek, Chil Seong Ah, Han Young Yu, An Soon Kim, Tae Youb Kim, Moon Gyu Jang, Myung Sim Jun
  • Patent number: 7745316
    Abstract: Provided is a method for fabricating a Schottky barrier tunnel transistor (SBTT) that can fundamentally prevent the generation of a gate leakage current caused by damage of spacers formed on both sidewalls of a gate electrode. The method for fabricating a Schottky barrier tunnel transistor, which includes: a) forming a silicon pattern and a sacrificial pattern on a buried oxide layer supported by a support substrate; b) forming a source/drain region on the buried oxide layer exposed on both sides of the silicon pattern, the source/drain region being formed of a metal layer and being in contact with both sidewalls of the silicon pattern; c) removing the sacrificial pattern to expose the top surface of the silicon pattern; and d) forming a gate insulating layer and a gate electrode on the exposed silicon pattern.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: June 29, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yark-Yeon Kim, Seong-Jae Lee, Moon-Gyu Jang, Tae-Youb Kim, Chel-Jong Choi, Myung-Sim Jun, Byoung-Chul Park
  • Publication number: 20100155703
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: a single electron box including a first quantum dot, a charge storage gate on the first quantum dot, and a first gate electrode on the charge storage gate, the charge storage gate exchanging charges with the first quantum dot, the first gate electrode adjusting electric potential of the first quantum dot; and a single electron transistor including a second quantum dot below the first quantum dot, a source, a drain, and a second gate electrode below the second quantum dot, the second quantum dot being capacitively coupled to the first quantum dot, the source contacting one side of the second quantum dot, the drain contacting the other side facing the one side, the second gate electrode adjusting electric potential of the second quantum dot.
    Type: Application
    Filed: July 7, 2009
    Publication date: June 24, 2010
    Inventors: Myung-Sim JUN, Moon-Gyu JANG, Tae-Gon NOH, Tae-Moon ROH
  • Publication number: 20100126548
    Abstract: Provided are a thermoelectric device, a thermoelectric device module, and a method of forming the thermoelectric device. The thermoelectric device includes a first conductive type first semiconductor nanowire including at least one first barrier region; a second conductive type second semiconductor nanowire including at least one second barrier region; a first electrode connected to one end of the first semiconductor nanowire; a second electrode connected to one end of the second semiconductor nanowire; and a common electrode connected to the other end of the first semiconductor nanowire and the other end of the second semiconductor nanowire. The first barrier region is greater than the first semiconductor nanowire in thermal conductivity, and the second barrier region is greater than the second semiconductor nanowire in thermal conductivity.
    Type: Application
    Filed: July 16, 2009
    Publication date: May 27, 2010
    Inventors: Moon-Gyu JANG, Myung-Sim JUN, Tae-Moon ROH, Jong-Dae KIM, Tae-Hyoung ZYUNG
  • Patent number: 7713826
    Abstract: Provided is a method of manufacturing a semiconductor device including a high-k dielectric thin layer formed using an interfacial reaction. The method includes the steps of: forming an oxide layer on a silicon substrate; depositing a metal layer on the oxide layer to form a metal silicate layer using an interfacial reaction between the oxide layer and the metal layer; forming a metal gate by etching the metal silicate layer and the metal layer; and forming a lightly doped drain (LDD) region and source and drain regions in the silicon substrate after forming the metal gate. In this method, a semiconductor device having high quality and performance can be manufactured by a simpler process at lower cost.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: May 11, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chel Jong Choi, Moon Gyu Jang, Yark Yeon Kim, Myung Sim Jun, Tae Youb Kim
  • Patent number: 7605065
    Abstract: Provided are a Schottky barrier tunnel single electron transistor and a method of manufacturing the same that use a Schottky barrier formed between metal and semiconductor by replacing a source and a drain with silicide as a reactant of silicon and metal, instead of a conventional method of manufacturing a single electron transistor (SET) that includes source and drain regions by implanting dopants such that an artificial quantum dot is formed in a channel region. As a result, it does not require a conventional PADOX process to form a quantum dot for a single electron transistor (SET), height and width of a tunneling barrier can be artificially adjusted by using silicide materials that have various Schottky junction barriers, and it is possible to improve current driving capability of the single electron transistor (SET).
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: October 20, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Moon Gyu Jang, Yark Yeon Kim, Jae Heon Shin, Seong Jae Lee