Patents by Inventor Morio Iwamizu

Morio Iwamizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12068268
    Abstract: A semiconductor device includes first conductive films that are provided, above a semiconductor substrate, at least on both sides of a non-formation region in which the first conductive films are not provided; an interlayer dielectric film including a first portion that is provided on the non-formation region, second portions provided above the first conductive film on both sides of the non-formation region, and a step portion that connects the first portion and the second portions; a second conductive film provided above the interlayer dielectric film; through terminal portions that penetrate the second portions of the interlayer dielectric film; and a wire bonded with the second conductive film above the first portion, where the through terminal portions include one or more first through terminal portions and one or more second through terminal portions being provided at positions opposite to each other with a bonded portion of the wire being interposed therebetween.
    Type: Grant
    Filed: February 16, 2023
    Date of Patent: August 20, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Morio Iwamizu
  • Patent number: 12033941
    Abstract: A trimming circuit configured to output a voltage according to the presence or absence of disconnection of a fuse resistor is provided, including a fuse resistor formed by a polysilicon layer arranged on a semiconductor substrate via an insulating film, a pad for trimming connected to one end of the fuse resistor, an output terminal electrically connected to a connection point between the fuse resistor and the pad, and configured to output a voltage according to the presence or absence of disconnection of the fuse resistor, and a diode formed on the semiconductor substrate, having one end connected to the other end of the fuse resistor.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: July 9, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Morio Iwamizu
  • Patent number: 12021528
    Abstract: A semiconductor device for driving an inductive load. The semiconductor device includes an output-stage switch connected to the inductive load for operating the inductive load; a voltage detection circuit configured to output a detection signal responsive to an overvoltage being higher than or equal to a clamp voltage; a drive circuit configured to apply a drive signal having a first threshold voltage to a gate of the output-stage switch, responsive to the overvoltage being lower than the clamp voltage, to turn on the output-stage switch; and a voltage application circuit configured to apply a voltage signal having a second threshold voltage higher than the first threshold voltage to the gate of the output-stage switch, responsive to the overvoltage being higher than or equal to the clamp voltage and upon receiving the detection signal from the voltage detection circuit, to turn on the output-stage switch.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: June 25, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Morio Iwamizu
  • Publication number: 20230197650
    Abstract: A semiconductor device includes first conductive films that are provided, above a semiconductor substrate, at least on both sides of a non-formation region in which the first conductive films are not provided; an interlayer dielectric film including a first portion that is provided on the non-formation region, second portions provided above the first conductive film on both sides of the non-formation region, and a step portion that connects the first portion and the second portions; a second conductive film provided above the interlayer dielectric film; through terminal portions that penetrate the second portions of the interlayer dielectric film; and a wire bonded with the second conductive film above the first portion, where the through terminal portions include one or more first through terminal portions and one or more second through terminal portions being provided at positions opposite to each other with a bonded portion of the wire being interposed therebetween.
    Type: Application
    Filed: February 16, 2023
    Publication date: June 22, 2023
    Inventor: Morio IWAMIZU
  • Publication number: 20230073508
    Abstract: A semiconductor device for driving an inductive load. The semiconductor device includes an output-stage switch connected to the inductive load for operating the inductive load; a voltage detection circuit configured to output a detection signal responsive to an overvoltage being higher than or equal to a clamp voltage; a drive circuit configured to apply a drive signal having a first threshold voltage to a gate of the output-stage switch, responsive to the overvoltage being lower than the clamp voltage, to turn on the output-stage switch; and a voltage application circuit configured to apply a voltage signal having a second threshold voltage higher than the first threshold voltage to the gate of the output-stage switch, responsive to the overvoltage being higher than or equal to the clamp voltage and upon receiving the detection signal from the voltage detection circuit, to turn on the output-stage switch.
    Type: Application
    Filed: July 27, 2022
    Publication date: March 9, 2023
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Morio IWAMIZU
  • Patent number: 11594502
    Abstract: A semiconductor device includes first conductive films that are provided, above a semiconductor substrate, at least on both sides of a non-formation region in which the first conductive films are not provided; an interlayer dielectric film including a first portion that is provided on the non-formation region, second portions provided above the first conductive film on both sides of the non-formation region, and a step portion that connects the first portion and the second portions; a second conductive film provided above the interlayer dielectric film; through terminal portions that penetrate the second portions of the interlayer dielectric film; and a wire bonded with the second conductive film above the first portion, where the through terminal portions include one or more first through terminal portions and one or more second through terminal portions being provided at positions opposite to each other with a bonded portion of the wire being interposed therebetween.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: February 28, 2023
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Morio Iwamizu
  • Patent number: 11502676
    Abstract: Provided is a driver circuit that controls an output unit that switches whether or not to supply a current to an output line, in accordance with a potential difference between a first control signal to be input and a voltage of the output line. The driver circuit comprises a control line that transmits the first control signal to the output unit; a low potential line to which a predetermined reference potential is applied; a first connection switching unit that switches whether or not to connect the control line and the low potential line, in accordance with a second control signal; and a cutoff unit that is provided in series with the first connection switching unit between the control line and the low potential line and cuts off the control line and the low potential line based on a potential of the low potential line.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: November 15, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Sho Nakagawa, Morio Iwamizu
  • Patent number: 11329643
    Abstract: A driver circuit controls an output unit that switches whether or not to supply a current to an output line, in accordance with a potential difference between a first control signal to be input and a voltage of the output line. The driver circuit has a control line transmitting the first control signal to the output unit; a connection switching unit switching whether or not to connect the control line and the output line; a pre-stage control unit that is provided between a high potential line and a low potential line and selects and outputs a potential of any one of the high potential line and the low potential line in accordance with a second control signal; and a post-stage control unit causing the connection switching unit to connect the control line and the output line when the pre-stage control unit outputs a voltage higher than a predetermined threshold value.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: May 10, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Morio Iwamizu
  • Patent number: 11329474
    Abstract: A semiconductor device includes a power semiconductor switch; a logic circuit connected to an input terminal; an overheat detection circuit that outputs to the logic circuit an overheat detection signal when a temperature of the power semiconductor switch exceeds an overheat detection threshold; and an overcurrent detection circuit that monitors a current that flows through the power semiconductor switch and that outputs to the logic circuit and to the overheat detection circuit an overcurrent detection signal when the current that flows through the power semiconductor switch exceeds a prescribed threshold, wherein in the overheat detection circuit, the overheat detection threshold values is changed from a first threshold value to a second threshold value that is lower than the first threshold value when the overheat detection circuit receives the overcurrent detection signal from the overcurrent detection circuit.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: May 10, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Sho Nakagawa, Morio Iwamizu
  • Publication number: 20210280515
    Abstract: A trimming circuit configured to output a voltage according to the presence or absence of disconnection of a fuse resistor is provided, including a fuse resistor formed by a polysilicon layer arranged on a semiconductor substrate via an insulating film, a pad for trimming connected to one end of the fuse resistor, an output terminal electrically connected to a connection point between the fuse resistor and the pad, and configured to output a voltage according to the presence or absence of disconnection of the fuse resistor, and a diode formed on the semiconductor substrate, having one end connected to the other end of the fuse resistor.
    Type: Application
    Filed: April 21, 2021
    Publication date: September 9, 2021
    Inventor: Morio IWAMIZU
  • Patent number: 11070127
    Abstract: A semiconductor device that compensates for imbalance between a plurality of semiconductor elements connected in parallel by negative feedback to achieve current balance utilizing reversed temperature characteristics without providing any dedicated element just for cancelling temperature characteristics. A gate driving circuit turns ON a power semiconductor element by applying a voltage elevated by a charge pump (CP) circuit to a gate through a resistor connected between the CP circuit and the gate. The power semiconductor element is turned OFF by control circuit that gives a control signal to turn ON a MOS switch in the gate driving circuit and discharges the gate through a diode.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: July 20, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Morio Iwamizu
  • Patent number: 10978446
    Abstract: Provided is a semiconductor device capable of reducing a mounting area. A semiconductor device (100) includes a semiconductor element (50) and a control element (150) arranged on a front surface (50a) of the semiconductor element (50). The semiconductor element (50) includes a semiconductor substrate (SB) including a first region AR1 and a second region AR2 adjacent to each other, a first MOS transistor (Tr1) provided is the first region (AR1), and a second MOS transistor (Tr2) provided in the second region (AR2). A first drain region (3a) of the first MOS transistor (Tr1) is connected to a second drain region (3b) of the second MOS transistor (Tr2). The control element (150) turns on and off the first MOS transistor (Tr1) and the second MOS transistor (Tr2).
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: April 13, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Morio Iwamizu, Shigeyuki Takeuchi
  • Publication number: 20210075414
    Abstract: A driver circuit controls an output unit that switches whether or not to supply a current to an output line, in accordance with a potential difference between a first control signal to be input and a voltage of the output line. The driver circuit has a control line transmitting the first control signal to the output unit; a connection switching unit switching whether or not to connect the control line and the output line; a pre-stage control unit that is provided between a high potential line and a low potential line and selects and outputs a potential of any one of the high potential line and the low potential line in accordance with a second control signal; and a post-stage control unit causing the connection switching unit to connect the control line and the output line when the pre-stage control unit outputs a voltage higher than a predetermined threshold value.
    Type: Application
    Filed: July 28, 2020
    Publication date: March 11, 2021
    Inventor: Morio IWAMIZU
  • Publication number: 20210075415
    Abstract: Provided is a driver circuit that controls an output unit that switches whether or not to supply a current to an output line, in accordance with a potential difference between a first control signal to be input and a voltage of the output line. The driver circuit comprises a control line that transmits the first control signal to the output unit; a low potential line to which a predetermined reference potential is applied; a first connection switching unit that switches whether or not to connect the control line and the low potential line, in accordance with a second control signal; and a cutoff unit that is provided in series with the first connection switching unit between the control line and the low potential line and cuts off the control line and the low potential line based on a potential of the low potential line.
    Type: Application
    Filed: July 28, 2020
    Publication date: March 11, 2021
    Inventors: Sho NAKAGAWA, Morio IWAMIZU
  • Publication number: 20200403397
    Abstract: A semiconductor device includes a power semiconductor switch; a logic circuit connected to an input terminal; an overheat detection circuit that outputs to the logic circuit an overheat detection signal when a temperature of the power semiconductor switch exceeds an overheat detection threshold; and an overcurrent detection circuit that monitors a current that flows through the power semiconductor switch and that outputs to the logic circuit and to the overheat detection circuit an overcurrent detection signal when the current that flows through the power semiconductor switch exceeds a prescribed threshold, wherein in the overheat detection circuit, the overheat detection threshold values is changed from a first threshold value to a second threshold value that is lower than the first threshold value when the overheat detection circuit receives the overcurrent detection signal from the overcurrent detection circuit.
    Type: Application
    Filed: May 1, 2020
    Publication date: December 24, 2020
    Applicant: Fuji Electric Co., Ltd.
    Inventors: Sho NAKAGAWA, Morio IWAMIZU
  • Patent number: 10868530
    Abstract: A semiconductor device includes a main switching circuit implemented by a first semiconductor element and a second semiconductor element having a semiconductor region of a first conductivity type as a common region, including respectively a first well region of a second conductivity type and a second well region of a second conductivity type provided in an upper portion of the common region, the first semiconductor element being provided with a first source region of the first conductivity type in an upper portion of the first well region, the second semiconductor element being provided with a second source region of the first conductivity type in an upper portion of the second well region; and a drive circuit configured to independently apply a first drive signal and a second drive signal respectively to a control electrode of the first semiconductor element and a control electrode of the second semiconductor element.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: December 15, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Morio Iwamizu
  • Patent number: 10727228
    Abstract: A stacked integrated circuit encompasses a lower chip including a lower semiconductor element and an upper surface-electrode electrically connected to an upper main-electrode region of the lower semiconductor element, the upper main-electrode region is located on an upper-surface side of the lower semiconductor element; and an upper chip including an upper semiconductor element and a lower surface-electrode electrically connected to a lower main-electrode region of the upper semiconductor element, the lower main-electrode region is located on a lower-surface side of the upper semiconductor element, the lower surface-electrode is metallurgically in contact with the upper surface-electrode.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: July 28, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Morio Iwamizu
  • Publication number: 20200127558
    Abstract: A load driver circuit including an oscillator circuit configured to generate a clock, a charge pump circuit configured to receive the clock and operate according to the clock, and a boosting-capability control circuit configured to control the boosting capability of the charge pump circuit according to a value of an output voltage of the charge pump circuit.
    Type: Application
    Filed: September 30, 2019
    Publication date: April 23, 2020
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kenji FUJITSU, Morio IWAMIZU, Shigeyuki TAKEUCHI
  • Patent number: 10620650
    Abstract: A semiconductor device having an input terminal and an output terminal. The semiconductor device includes a power semiconductor element having a first main terminal connected to the output terminal, a second main terminal that is grounded and a gate terminal, and an active clamping circuit including a Zener diode and a diode connected in inverse series between the gate terminal and the first main terminal of the power semiconductor element. The semiconductor device further includes a clamp voltage switching circuit configured to switch a clamp voltage of the active clamping circuit according to a change in a voltage of the output terminal relative to the ground at a time when the power semiconductor element is turned off, the clamp voltage being switched to a first clamp voltage and a second clamp voltage, respectively, when the change in the voltage is not, and is, positive.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: April 14, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Morio Iwamizu, Shinji Yamashina
  • Publication number: 20200091911
    Abstract: A semiconductor device includes a main switching circuit implemented by a first semiconductor element and a second semiconductor element having a semiconductor region of a first conductivity type as a common region, including respectively a first well region of a second conductivity type and a second well region of a second conductivity type provided in an upper portion of the common region, the first semiconductor element being provided with a first source region of the first conductivity type in an upper portion of the first well region, the second semiconductor element being provided with a second source region of the first conductivity type in an upper portion of the second well region; and a drive circuit configured to independently apply a first drive signal and a second drive signal respectively to a control electrode of the first semiconductor element and a control electrode of the second semiconductor element.
    Type: Application
    Filed: July 24, 2019
    Publication date: March 19, 2020
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Morio IWAMIZU