Patents by Inventor Morio Iwamizu

Morio Iwamizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10418336
    Abstract: To protect the insulating film so that crack is not produced in the insulating film even when stress is applied to the semiconductor device. A manufacturing method of a semiconductor device is provided, including: forming an insulating film above a semiconductor substrate; forming, in the insulating film, one or more openings that expose the semiconductor substrate; forming a tungsten portion deposited in the openings and above the insulating film; thinning the tungsten portion on condition that the tungsten portion remains in at least part of a region above the insulating film; and forming an upper electrode above the tungsten portion.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: September 17, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Morio Iwamizu
  • Publication number: 20190259758
    Abstract: A stacked integrated circuit encompasses a lower chip including a lower semiconductor element and an upper surface-electrode electrically connected to an upper main-electrode region of the lower semiconductor element, the upper main-electrode region is located on an upper-surface side of the lower semiconductor element; and an upper chip including an upper semiconductor element and a lower surface-electrode electrically connected to a lower main-electrode region of the upper semiconductor element, the lower main-electrode region is located on a lower-surface side of the upper semiconductor element, the lower surface-electrode is metallurgically in contact with the upper surface-electrode.
    Type: Application
    Filed: December 27, 2018
    Publication date: August 22, 2019
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Morio Iwamizu
  • Patent number: 10187049
    Abstract: To provide an inductive load driving device which can control a clamp voltage using a ground voltage as a reference, with a simple structure. An inductive load driving device includes: an inductive load whose one end is connected to a power source and whose other end is connected to a ground: an output stage semiconductor switch element connected in series with the inductive load; a clamping circuit connected between a high-voltage side electrode and a control electrode of the output stage semiconductor switch element; and a resistance value control unit connected between the control electrode of the output stage semiconductor switch element and the ground.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: January 22, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Morio Iwamizu
  • Patent number: 10103539
    Abstract: A semiconductor device, including a main transistor configured to supply power from a power source to a load, and a current limiting device including a control transistor. The current limiting device is configured to detect that the current flowing from the main transistor is an overcurrent, and to limit the current upon determining that the current is equal to or greater than a current limit value, and an operating voltage of the control transistor is equal to or greater than a current limiting activation voltage. The current limit value is a threshold for determining whether the current is greater than an operating current of the main transistor for the load to operate in a steady state. The current limiting activation voltage is a sum of a correction voltage and a predetermined threshold voltage at the gate of the control transistor when the current rises to the current limit value.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: October 16, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Morio Iwamizu, Shigeyuki Takeuchi
  • Publication number: 20180269163
    Abstract: To protect the insulating film so that crack is not produced in the insulating film even when stress is applied to the semiconductor device. A manufacturing method of a semiconductor device is provided, including: forming an insulating film above a semiconductor substrate; forming, in the insulating film, one or more openings that expose the semiconductor substrate; forming a tungsten portion deposited in the openings and above the insulating film; thinning the tungsten portion on condition that the tungsten portion remains in at least part of a region above the insulating film; and forming an upper electrode above the tungsten portion.
    Type: Application
    Filed: February 1, 2018
    Publication date: September 20, 2018
    Inventor: Morio IWAMIZU
  • Patent number: 9871513
    Abstract: In activating a motor, a gate voltage with which a power semiconductor element may supply a rush current of the motor is generated by a charge pump circuit, when a certain time (time until the rush current ends) has elapsed after activating the motor, a timer circuit operates a gate clamp circuit, which reduces the gate voltage of the power semiconductor element to reduce the current-carrying capability of the power semiconductor element. Subsequently, when the motor has caused a short-circuit failure, the power semiconductor element, because its gate voltage is reduced by the gate clamp circuit in advance, supplies only a load short current corresponding to the reduced gate voltage. Accordingly, the heat generation due to the short-circuit current is also small and an increase in temperature is also suppressed.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: January 16, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Morio Iwamizu, Yasuki Yoshida
  • Publication number: 20170302260
    Abstract: To provide an inductive load driving device which can control a clamp voltage using a ground voltage as a reference, with a simple structure. An inductive load driving device includes: an inductive load whose one end is connected to a power source and whose other end is connected to a ground: an output stage semiconductor switch element connected in series with the inductive load; a clamping circuit connected between a high-voltage side electrode and a control electrode of the output stage semiconductor switch element; and a resistance value control unit connected between the control electrode of the output stage semiconductor switch element and the ground.
    Type: Application
    Filed: February 21, 2017
    Publication date: October 19, 2017
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Morio IWAMIZU
  • Publication number: 20160365852
    Abstract: In activating a motor, a gate voltage with which a power semiconductor element may supply a rush current of the motor is generated by a charge pump circuit, when a certain time (time until the rush current ends) has elapsed after activating the motor, a timer circuit operates a gate clamp circuit, which reduces the gate voltage of the power semiconductor element to reduce the current-carrying capability of the power semiconductor element. Subsequently, when the motor has caused a short-circuit failure, the power semiconductor element, because its gate voltage is reduced by the gate clamp circuit in advance, supplies only a load short current corresponding to the reduced gate voltage. Accordingly, the heat generation due to the short-circuit current is also small and an increase in temperature is also suppressed.
    Type: Application
    Filed: May 10, 2016
    Publication date: December 15, 2016
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Morio IWAMIZU, Yasuki YOSHIDA
  • Patent number: 9520789
    Abstract: A power supply device includes an output semiconductor element and a clamp circuit. The output semiconductor element is provided between a power supply line and an output terminal. The output semiconductor element is driven and switched so as to supply electric power to an inductive load connected to the output terminal. The clamp circuit clamps a voltage applied between the power supply line and the output terminal due to a counter electromotive force generated in the inductive load when the output semiconductor element turns OFF, with reference to an operation reference voltage of the output semiconductor element. Thus, it is possible to provide a power supply device including a clamp circuit which can effectively clamp a negative voltage surge derived from a counter electromotive force generated in an inductive load, at a low clamp voltage.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: December 13, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Morio Iwamizu
  • Patent number: 9490793
    Abstract: An insulated-gate type device driving circuit for driving an insulated-gate semiconductor element based on a gate signal inputted from the outside includes a gate voltage control semiconductor element which is connected between a gate and a source of the insulated-gate semiconductor element, and a pull-up element which is constituted by a depletion type MOSFET connected between a gate and a drain of the gate voltage control semiconductor element. The gate voltage control semiconductor element is driven by a voltage applied to the gate of the insulated-gate semiconductor element, and a back gate of the MOSFET constituting the pull-up element is grounded to prevent a parasitic transistor from being formed.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: November 8, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Morio Iwamizu, Shinji Yamashina
  • Patent number: 9438032
    Abstract: The semiconductor device includes a power chip including a switching element that switches a supply of power from a power supply to a load between an on-state and an off-state, a control chip in which is incorporated a control circuit that controls the switching element of the power chip, and a reverse connection protection circuit, provided in the control chip, that controls the switching element of the power chip into an on-state when the power supply is reverse-connected, wherein the reverse connection protection circuit has protective resistors, interposed between the control circuit and the positive electrode side of the power supply, and a control voltage formation circuit into which is input an intermediate voltage of the protective resistors and which forms a control voltage that controls the switching element of the power chip into an on-state when the power supply is reverse-connected.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: September 6, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Morio Iwamizu
  • Publication number: 20160181792
    Abstract: A semiconductor device, including a main transistor configured to supply power from a power source to a load, and a current limiting device including a control transistor. The current limiting device is configured to detect that the current flowing from the main transistor is an overcurrent, and to limit the current upon determining that the current is equal to or greater than a current limit value, and an operating voltage of the control transistor is equal to or greater than a current limiting activation voltage. The current limit value is a threshold for determining whether the current is greater than an operating current of the main transistor for the load to operate in a steady state. The current limiting activation voltage is a sum of a correction voltage and a predetermined threshold voltage at the gate of the control transistor when the current rises to the current limit value.
    Type: Application
    Filed: November 6, 2015
    Publication date: June 23, 2016
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Morio IWAMIZU, Shigeyuki TAKEUCHI
  • Patent number: 9252693
    Abstract: In a stepping motor drive device, it is possible to prevent malfunction due to negative current from a stepping motor of a plurality of power MOSFETs that apply drive voltage in a complementary way to paired coils of the stepping motor. A fall delay circuit delays the timing of the fall of input pulse signals applied in a complementary way to the gate of each of a plurality of MOSFETs that apply drive voltage in a complementary way to paired coils of a stepping motor by a time Td, wherein Td>Trise?Tfall, in accordance with a rise time Trise when turning on, and a fall time Tfall when turning off, the relevant MOSFET, and after one MOSFET is turned on, another MOSFET is turned off.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: February 2, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Morio Iwamizu
  • Publication number: 20150263719
    Abstract: An insulated-gate type device driving circuit for driving an insulated-gate semiconductor element based on a gate signal inputted from the outside includes a gate voltage control semiconductor element which is connected between a gate and a source of the insulated-gate semiconductor element, and a pull-up element which is constituted by a depletion type MOSFET connected between a gate and a drain of the gate voltage control semiconductor element. The gate voltage control semiconductor element is driven by a voltage applied to the gate of the insulated-gate semiconductor element, and a back gate of the MOSFET constituting the pull-up element is grounded to prevent a parasitic transistor from being formed.
    Type: Application
    Filed: February 12, 2015
    Publication date: September 17, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Morio IWAMIZU, Shinji YAMASHINA
  • Publication number: 20150263611
    Abstract: A semiconductor device that compensates for imbalance between a plurality of semiconductor elements connected in parallel by negative feedback to achieve current balance utilizing reversed temperature characteristics without providing any dedicated element just for cancelling temperature characteristics. A gate driving circuit turns ON a power semiconductor element by applying a voltage elevated by a charge pump (CP) circuit to a gate through a resistor connected between the CP circuit and the gate. The power semiconductor element is turned OFF by control circuit that gives a control signal to turn ON a MOS switch in the gate driving circuit and discharges the gate through a diode.
    Type: Application
    Filed: February 11, 2015
    Publication date: September 17, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Morio IWAMIZU
  • Publication number: 20150123637
    Abstract: A power supply device includes an output semiconductor element and a clamp circuit. The output semiconductor element is provided between a power supply line and an output terminal. The output semiconductor element is driven and switched so as to supply electric power to an inductive load connected to the output terminal. The clamp circuit clamps a voltage applied between the power supply line and the output terminal due to a counter electromotive force generated in the inductive load when the output semiconductor element turns OFF, with reference to an operation reference voltage of the output semiconductor element. Thus, it is possible to provide a power supply device including a clamp circuit which can effectively clamp a negative voltage surge derived from a counter electromotive force generated in an inductive load, at a low clamp voltage.
    Type: Application
    Filed: October 7, 2014
    Publication date: May 7, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Morio IWAMIZU
  • Publication number: 20150109706
    Abstract: The semiconductor device includes a power chip including a switching element that switches a supply of power from a power supply to a load between an on-state and an off-state, a control chip in which is incorporated a control circuit that controls the switching element of the power chip, and a reverse connection protection circuit, provided in the control chip, that controls the switching element of the power chip into an on-state when the power supply is reverse-connected, wherein the reverse connection protection circuit has protective resistors, interposed between the control circuit and the positive electrode side of the power supply, and a control voltage formation circuit into which is input an intermediate voltage of the protective resistors and which forms a control voltage that controls the switching element of the power chip into an on-state when the power supply is reverse-connected.
    Type: Application
    Filed: August 27, 2014
    Publication date: April 23, 2015
    Inventor: Morio IWAMIZU
  • Publication number: 20140375244
    Abstract: In a stepping motor drive device, it is possible to prevent malfunction due to negative current from a stepping motor of a plurality of power MOSFETs that apply drive voltage in a complementary way to paired coils of the stepping motor. A fall delay circuit delays the timing of the fall of input pulse signals applied in a complementary way to the gate of each of a plurality of MOSFETs that apply drive voltage in a complementary way to paired coils of a stepping motor by a time Td, wherein Td>Trise?Tfall, in accordance with a rise time Trise when turning on, and a fall time Tfall when turning off, the relevant MOSFET, and after one MOSFET is turned on, another MOSFET is turned off.
    Type: Application
    Filed: June 13, 2014
    Publication date: December 25, 2014
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Morio IWAMIZU
  • Patent number: 8890581
    Abstract: A driving circuit for driving an insulated gate semiconductor device based on a voltage of an externally-inputted gate signal, where the insulated gate semiconductor device has a source, a drain and a gate, and a parasitic capacitor exists between the drain and the gate. The driving circuit includes a gate voltage controlling semiconductor device disposed between, and connecting, the gate and the source of the insulated gate semiconductor device. The gate voltage controlling semiconductor device has a source and a gate, and is driven by a current charging the parasitic capacitor. The driving circuit also includes a pull-up device disposed between, and connecting, the source and the drain of the gate voltage controlling semiconductor device.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: November 18, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Morio Iwamizu
  • Publication number: 20120038392
    Abstract: A driving circuit for driving an insulated gate semiconductor device based on a voltage of an externally-inputted gate signal, where the insulated gate semiconductor device has a source, a drain and a gate, and a parasitic capacitor exists between the drain and the gate. The driving circuit includes a gate voltage controlling semiconductor device disposed between, and connecting, the gate and the source of the insulated gate semiconductor device. The gate voltage controlling semiconductor device has a source and a gate, and is driven by a current charging the parasitic capacitor. The driving circuit also includes a pull-up device disposed between, and connecting, the source and the drain of the gate voltage controlling semiconductor device.
    Type: Application
    Filed: July 28, 2011
    Publication date: February 16, 2012
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Morio IWAMIZU