Abstract: The liquid crystal display device includes: a TFT substrate including scanning lines extending in a first direction and being arranged in a second direction, video signal lines extending in the second direction and being arranged in the first direction, pixel electrodes arranged in regions surrounded by the scanning lines and the video signal lines, and common electrodes formed with an insulating film arranged between the common electrodes and the pixel electrodes; a counter substrate opposed to the TFT substrate; and a liquid crystal. The first common electrode extends between the first and second scanning lines in the first direction, and the second common electrode extends between the second and third scanning lines in the first direction. The first and second common electrodes are electrically connected by a bridge. The bridge covers the first video signal line without covering the second video signal line, when seen in a plan view.

Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.

Abstract: A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a second node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the first node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period.

Abstract: The liquid crystal display device includes: a TFT substrate including scanning lines extending in a first direction and being arranged in a second direction, Video signal lines extending in the second direction and being arranged in the first direction, pixel electrodes arranged in regions surrounded by the scanning lines and the video signal lines, and common electrodes formed with an insulating film arranged between the common electrodes and the pixel electrodes; a counter substrate opposed to the TFT substrate; and a liquid. crystal. The first common electrode extends between the first and second scanning lines in the first direction, and the second common electrode extends between the second and third scanning lines in the first direction. The first and second common electrodes are electrically connected by a bridge. The bridge covers the first video signal line without covering the second video signal line, when seen in a plan view.

Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.

Abstract: A display device is provided with a pixel and a dummy pixel including a gate line and a signal line. The dummy pixel includes the gate line and a dummy semiconductor layer crossing the gate line through an insulating layer. The dummy semiconductor layer is electrically separated from the dummy semiconductor layer of the dummy pixel adjacent in the Y direction dummy pixel. The dummy pixel further includes a dummy signal line extending in the Y direction. The dummy signal line is connected to the dummy semiconductor layer through a plurality of contact holes. The contact holes are arranged with the gate line interposed between them in plan view.

Abstract: A display device includes, on an insulating substrate, a plurality of scanning lines, a plurality of signal lines, a plurality of sub-pixel regions each surrounded by a pair of scanning lines and a pair of signal lines, a plurality of semiconductor layers in the sub-pixel regions, and a base electrode connected to one end of the semiconductor layer. The other end of the same is connected to one of the pair of signal lines. When it is assumed that a signal connected to the semiconductor layer is a first signal line while a signal line not connected to the semiconductor layer is a second signal line in each sub-pixel region, a distance between the first signal line and the semiconductor layer is larger than a distance between the second signal line and the semiconductor layer at a connecting position between the semiconductor layer and the base electrode in plan view.

Abstract: A liquid crystal display device includes a TFT substrate and a counter substrate with liquid crystal sandwiched therebetween. The TFT substrate has scanning lines 10 extending in a first direction and arrayed in a second direction and video signal lines 20 extending in the second direction and arrayed in the first direction. The TFT substrate has a display area 500 in which TFT pixels are arrayed in a matrix pattern, and a frame area 600 surrounding the display area. In the frame area 600, common bus wires 521 are formed in the same layer and with the same material as the video signal lines 20 and are impressed with a common voltage. Dummy TFTs are formed in a layer under the common bus wires 521. The scanning lines 10, extending over the frame area 600, are divided outside the display area and are interconnected by bridging wires 170.

Abstract: According to one embodiment, a liquid crystal display device includes a first substrate including a scanning line, a first relay electrode, a second relay electrode, a first contact portion opposed to the first relay electrode, and a second contact portion opposed to the second relay electrode, and a spacer, a first contact hole for connecting the first relay electrode and the first contact portion being located on one side with respect to the scanning line, a second contact hole for connecting the second relay electrode and the second contact portion being located on the other side with respect to the scanning line, the spacer being located between the first contact hole and the second contact hole.

Abstract: The displacement between a TFT substrate and a counter substrate and the cut of an alignment film caused by a columnar spacer are prevented. A liquid crystal display device includes: a TFT substrate including a scanning line extending in a first direction, a picture signal line extending in a second direction, a pixel electrode formed in a region surrounded by the scanning line and the picture signal line, and a common electrode formed as opposed to the pixel electrode through an insulating film; a counter substrate disposed as opposed to the TFT substrate and having a spacer; and a liquid crystal sandwiched between the substrates. A common metal interconnection is formed to cover the picture signal line or the scanning line, and stacked on the common electrode. A through hole is formed on the common metal interconnection. The tip end of the spacer is disposed inside the through hole.

Abstract: A liquid crystal display device includes a TFT substrate and a counter substrate with liquid crystal sandwiched therebetween. The TFT substrate has scanning lines 10 extending in a first direction and arrayed in a second direction and video signal lines 20 extending in the second direction and arrayed in the first direction. The TFT substrate has a display area 500 in which TFT pixels are arrayed in a matrix pattern, and a frame area 600 surrounding the display area. In the frame area 600, common bus wires 521 are formed in the same layer and with the same material as the video signal lines 20 and are impressed with a common voltage. Dummy TFTs are formed in a layer under the common bus wires 521. The scanning lines 10, extending over the frame area 600, are divided outside the display area and are interconnected by bridging wires 170.

Abstract: A display device is provided with a pixel and a dummy pixel including a gate line and a signal line. The dummy pixel includes the gate line and a dummy semiconductor layer crossing the gate line through an insulating layer. The dummy semiconductor layer is electrically separated from the dummy semiconductor layer of the dummy pixel adjacent in the Y direction dummy pixel. The dummy pixel further includes a dummy signal line extending in the Y direction. The dummy signal line is connected to the dummy semiconductor layer through a plurality of contact holes. The contact holes are arranged with the gate line interposed between them in plan view.

Abstract: A display device is provided with a pixel and a dummy pixel including a gate line and a signal line. The dummy pixel includes the gate line and a dummy semiconductor layer crossing the gate line through an insulating layer. The dummy semiconductor layer is electrically separated from the dummy semiconductor layer of the dummy pixel adjacent in the Y direction dummy pixel. The dummy pixel further includes a dummy signal line extending in the Y direction. The dummy signal line is connected to the dummy semiconductor layer through a plurality of contact holes. The contact holes are arranged with the gate line interposed between them in plan view.

Abstract: The invention prevents the display unevenness of a high-resolution liquid crystal display device that results from the presence of regions where an alignment film is not applied. The invention provides a liquid crystal display device including: a TFT substrate having scan lines, video signal lines, and pixels formed by the intersecting scan lines and video signal lines; a counter substrate; and a liquid crystal layer placed between the TFT substrate and the counter substrate. Each of the pixels includes a TFT, a pixel electrode, a common electrode, and a through-hole and an opening that are used to connect the TFT and the pixel electrode. Connective ITO is formed in and around the through-hole at the same time as the common electrode is formed. A step d is formed at an edge portion of the connective ITO and covered with an alignment film.

Abstract: A terminal structure that keeps the resistance of its connecting portion small and secures mechanical reliability is to be achieved. A display device includes a display region and a terminal region. A terminal formed in the terminal region is formed with a terminal metal, a first oxide conductive film covering the end portion of the terminal metal, and a second oxide conductive film covering the first oxide conductive film and the terminal metal. The first oxide conductive film has an opening in the center part of the terminal.

Abstract: A gate signal line drive circuit whose power consumption is reduced, is provided. In the gate signal line drive circuit having plural basic circuits outputting respective gate signals, each basic circuit includes a high voltage application switching element to which a first basic clock signal having high voltage in a signal high period is input, a low voltage application switching element that turns on at timing starting a signal low period, and outputs a low voltage, and a first low voltage application on control element having an input terminal to which a second basic clock signal subsequent to the first basic clock signal is input, and which turns on according to the signal high period, and outputs the voltage of the second basic clock signal to the control terminal of the low voltage application switching element.

Abstract: The liquid crystal display device includes: a TFT substrate including scanning lines extending in a first direction and being arranged in a second direction, Video signal lines extending in the second direction and being arranged in the first direction, pixel electrodes arranged in regions surrounded by the scanning lines and the video signal lines, and common electrodes formed with an insulating film arranged between the common electrodes and the pixel electrodes; a counter substrate opposed to the TFT substrate; and a liquid. crystal. The first common electrode extends between the first and second scanning lines in the first direction, and the second common electrode extends between the second and third scanning lines in the first direction. The first and second common electrodes are electrically connected by a bridge. The bridge covers the first video signal line without covering the second video signal line, when seen in a plan view.

Abstract: A liquid crystal display device having an alignment layer stopper which is formed external to a display area to suppress the generation of an electric field between signal lines and the alignment layer stopper, wherein the alignment layer stopper includes a second conductive layer SP formed above the first substrate when the alignment layer stopper is formed by coating and a first conductive layer SH formed below the second conductive layer SP through an insulating film and arranged in such a manner that its marginal parts in the longitudinal direction of the second conductive layer SP are exposed when viewed from the plane direction from the second conductive layer SP, and the first conductive layer SH is formed in a thin film layer between signal lines arranged in the side parts of the display area and the second conductive layer SP.

Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.

Abstract: The liquid crystal display device includes: a TFT substrate including scanning lines extending in a first direction and being arranged in a second direction, video signal lines extending in the second direction and being arranged in the first direction, pixel electrodes arranged in regions surrounded by the scanning lines and the video signal lines, and common electrodes formed with an insulating film arranged between the common electrodes and the pixel electrodes; a counter substrate opposed to the TFT substrate; and a liquid crystal. The first common electrode extends between the first and second scanning lines in the first direction, and the second common electrode extends between the second and third scanning lines in the first direction. The first and second common electrodes are electrically connected by a bridge. The bridge covers the first video signal line without covering the second video signal line, when seen in a plan view.