Abstract: A wiring board of the present invention has pads disposed in a plurality of rows including: first row pads each being connected to a respective one of the connection wires that is long in length; and second row pads (30b) each being connected to a respective one of the connection wires that is shorter in length than that of first connection wires (10a) connected to the first row pads, each of the first connection wires (10a) being provided not in a region between adjacent ones of the second row pads (30b) but in a lower layer region of the second row pads (30b), in such a manner that at least a first insulating layer (20a) is sandwiched between the second row pads (30b) and the first connection wires (10a), and 0.8?W1/W2?1, where W1 is a line width of the first connection wires (10a) in the lower layer region of the second row pads (30b), and W2 is a width of the second row pads (30b).

Abstract: The present invention provides an electronic circuit device that can be downsized, a production method thereof, and a display device. The present invention is an electronic circuit device including: an electronic first component; an electronic second component; an electronic third component; an anisotropic first conductive layer; and an anisotropic second conductive layer, wherein the electronic first component is connected to the electronic third component via the anisotropic first conductive layer, and the electronic second component is connected to the electronic third component via the anisotropic first conductive layer and the anisotropic second conductive layer, the anisotropic first conductive layer and the anisotropic second conductive layer being stacked in this order on the electronic third component.

Abstract: First to fourth gate driver ICs G1 to G4 to be connected to a gate line 18 of a drive element 21 are arranged along a side of a liquid crystal display 2. Along a side of the first to four gate driver ICs G1 to G4, a FPC 5 for receiving signals is arranged. A first bus line 15 that branches between the first and second gate driver ICs G1 and G2 connects gate-low terminals 11b and 11a of the first and second gate driver ICs G1 and G2, respectively, to the FPC 5. A second bus line 16 that branches between the third and fourth gate driver ICs G3 and G4 connects gate-low terminals 11b and 11a of the third and fourth gate driver ICs G3 and G4, respectively, to the FPC 5. Gate-high terminals 10b and 10a, logic terminals 12b and 12a, and signal terminals 13 of the second and third gate driver ICs G2 and G3 are connected to the FPC 5.

Abstract: A semiconductor device includes a semiconductor substrate, a plurality of electrode pads aligned on the semiconductor substrate, and a plurality of bump electrodes placed on each electrode pad, wherein the plurality of bump electrodes on the electrode pad are aligned in a direction orthogonal to a direction where the electrode pads are aligned. A manufacturing method of the semiconductor device includes the steps of patterning a photoresist which serves as a bump electrode forming use mask on the semiconductor substrate having formed thereon the electrode pads and forming a bump electrode in a perpendicular straight wall shape to be thinner than the photoresist by plating the bump electrode forming use metal to the electrode pad.

Abstract: First to fourth gate driver ICs G1 to G4 to be connected to a gate line 18 of a drive element 21 are arranged along a side of a liquid crystal display 2. Along a side of the first to four gate driver ICs G1 to G4, a FPC 5 for receiving signals is arranged. A first bus line 15 that branches between the first and second gate driver ICs G1 and G2 connects gate-low terminals 11b and 11a of the first and second gate driver ICs G1 and G2, respectively, to the FPC 5. A second bus line 16 that branches between the third and fourth gate driver ICs G3 and G4 connects gate-low terminals 11b and 11a of the third and fourth gate driver ICs G3 and G4, respectively, to the FPC 5. Gate-high terminals 10b and 10a, logic terminals 12b and 12a, and signal terminals 13 of the second and third gate driver ICs G2 and G3 are connected to the FPC 5.

Abstract: A semiconductor device includes a semiconductor substrate, a plurality of electrode pads aligned on the semiconductor substrate, and a plurality of bump electrodes placed on each electrode pad, wherein the plurality of bump electrodes on the electrode pad are aligned in a direction orthogonal to a direction where the electrode pads are aligned. A manufacturing method of the semiconductor device includes the steps of patterning a photoresist which serves as a bump electrode forming use mask on the semiconductor substrate having formed thereon the electrode pads and forming a bump electrode in a perpendicular straight wall shape to be thinner than the photoresist by plating the bump electrode forming use metal to the electrode pad.

Abstract: In the manufacturing step of performing thermal compression bonding with respect to a driving integrated circuit and a glass substrate included in a liquid crystal panel so as to connect an electrode of the driving integrated circuit and an electrode of the glass substrate by using an anisotropic conductive adhesive in which conductive particles are diffused in an insulative adhesive, the anisotropic conductive adhesive includes conductive particles, a resin a whose average molecular weight is in a range of from 10000 to 100000, a resin b whose average molecular weight is of not more than 1000, a stress relaxation resin, and a curing agent; and a Young's modulus of the anisotropic conductive adhesive after curing is in a range of from 1.4 Gpa to 1.6 Gpa.

Abstract: In the manufacturing step of performing thermal compression bonding with respect to a driving integrated circuit and a glass substrate included in a liquid crystal panel so as to connect an electrode of the driving integrated circuit and an electrode of the glass substrate by using an anisotropic conductive adhesive in which conductive particles are diffused in an insulative adhesive, the anisotropic conductive adhesive includes conductive particles, a resin a whose average molecular weight is in a range of from 10000 to 100000, a resin b whose average molecular weight is of not more than 1000, a stress relaxation resin, and a curing agent; and a Young's modulus of the anisotropic conductive adhesive after curing is in a range of from 1.4 Gpa to 1.6 Gpa.

Abstract: A semiconductor device includes a semiconductor substrate, a plurality of electrode pads aligned on the semiconductor substrate, and a plurality of bump electrodes placed on each electrode pad, wherein the plurality of bump electrodes on the electrode pad are aligned in a direction orthogonal to a direction where the electrode pads are aligned. A manufacturing method of the semiconductor device includes the steps of patterning a photoresist which serves as a bump electrode forming use mask on the semiconductor substrate having formed thereon the electrode pads and forming a bump electrode in a perpendicular straight wall shape to be thinner than the photoresist by plating the bump electrode forming use metal to the electrode pad.

Abstract: A semiconductor device includes a semiconductor substrate, a plurality of electrode pads aligned on the semiconductor substrate, and a plurality of bump electrodes placed on each electrode pad, wherein the plurality of bump electrodes on the electrode pad are aligned in a direction orthogonal to a direction where the electrode pads are aligned. A manufacturing method of the semiconductor device includes the steps of patterning a photoresist which serves as a bump electrode forming use mask on the semiconductor substrate having formed thereon the electrode pads and forming a bump electrode in a perpendicular straight wall shape to be thinner than the photoresist by plating the bump electrode forming use metal to the electrode pad.

Abstract: A semiconductor device includes a semiconductor substrate, a plurality of electrode pads aligned on the semiconductor substrate, and a plurality of bump electrodes placed on each electrode pad, wherein the plurality of bump electrodes on the electrode pad are aligned in a direction orthogonal to a direction where the electrode pads are aligned. A manufacturing method of the semiconductor device includes the steps of patterning a photoresist which serves as a bump electrode forming use mask on the semiconductor substrate having formed thereon the electrode pads and forming a bump electrode in a perpendicular straight wall shape to be thinner than the photoresist by plating the bump electrode forming use metal to the electrode pad.

Abstract: A method for producing a reflection-type liquid crystal display device includes the steps of forming an ITO layer in the first substrate; patterning the ITO layer to form the top layer in the at least one of the terminal sections; forming a first protective layer so as to cover the top layer; forming a metal layer mainly formed of aluminum so as to cover the first protective layer; and at least partially removing the metal layer and the first protective layer to form a reflective section from the metal layer and expose only the flat area of the top surface of the top layer in the at least one of the terminal sections. Before the step of forming the first protective layer, only the flat area of the top surface of the layer is exposed in at least one of the terminal sections so as to allow the first protective layer to contact the top layer along only the flat area.

Abstract: A liquid crystal display device according to the present invention includes a substrate provided with a line pattern, and a circuit element electrically connected to the line pattern via a conductive layer. The line pattern has at least one bonding pad. The circuit element has at least one electrode pad. The at least one electrode pad has a plurality of bump electrodes provided thereon. The at least one electrode pad is electrically connected to the at least one bonding pad via the conductive layer which is provided between the plurality of bump electrodes and the bonding pad facing the plurality of bump electrodes, where the conductive layer is an insulative material having conductive particles dispersed throughout.

Abstract: A display board has wirings on a surface thereof for transmitting a signal received from outside at a peripheral portion of the display board to a display area of the display board. Each wiring has a first conductive film formed of a first material and disposed on the surface of the display board, a second conductive film which is formed of a second material satisfying a condition that a surface of the second conductive film is less prone to oxidation than a surface of the first conductive film and which is disposed on a part of the first conductive film, and a transparent conductive film which is an oxide film and which is disposed on at least the second conductive film. Those first conductive film, second conductive film and transparent film constitute a three-layered structure portion of the wiring.