Patents by Inventor Motonobu Takeya

Motonobu Takeya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150325689
    Abstract: Disclosed are a group III-V based transistor and a method for manufacturing same. The group III-V based transistor includes a laminated semiconductor structure having an upper surface and a lower surface and including a group III-V based semiconductor layer, and at least one 2DEG region extending from the upper surface of the laminated semiconductor structure to the lower surface thereof. A vertical-type GaN-based transistor using 2DEG can be provided by adopting the 2DEG region.
    Type: Application
    Filed: June 18, 2013
    Publication date: November 12, 2015
    Applicant: Seoul Semiconductor Co., Ltd.
    Inventors: Motonobu TAKEYA, Kang Nyung LEE, Kwan Hyun LEE, II Kyung SUH, Young Do JONG, June Sik KWAK, Yu Dae HAN
  • Patent number: 9142688
    Abstract: A GaN-based diode may include an intrinsic GaN-based semiconductor layer, GaN-based semiconductor layers configured to have a first conductivity type and bonded to the intrinsic GaN-based semiconductor layer. A first electrode made of metal is placed on a surface opposite a surface bonded to the GaN-based semiconductor layers of the intrinsic GaN-based semiconductor layer; a second electrode is placed on a surface opposite to a surface bonded to the intrinsic GaN-based semiconductor layer of the GaN-based semiconductor layers of the first conductivity type. Voltage-resistant layers configured to have a second conductivity type are formed in regions of the intrinsic GaN-based semiconductor layer that come in contact with edges of the first electrode.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: September 22, 2015
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Motonobu Takeya, Kang Nyung Lee
  • Publication number: 20150034964
    Abstract: A GaN-based diode may include an intrinsic GaN-based semiconductor layer, GaN-based semiconductor layers configured to have a first conductivity type and bonded to the intrinsic GaN-based semiconductor layer. A first electrode made of metal is placed on a surface opposite a surface bonded to the GaN-based semiconductor layers of the intrinsic GaN-based semiconductor layer; a second electrode is placed on a surface opposite to a surface bonded to the intrinsic GaN-based semiconductor layer of the GaN-based semiconductor layers of the first conductivity type. Voltage-resistant layers configured to have a second conductivity type are formed in regions of the intrinsic GaN-based semiconductor layer that come in contact with edges of the first electrode.
    Type: Application
    Filed: July 30, 2014
    Publication date: February 5, 2015
    Inventors: Motonobu TAKEYA, Kang Nyung LEE
  • Publication number: 20150034966
    Abstract: Disclosed herein is a GaN-based transistor. The GaN-based transistor includes source electrodes, first switching semiconductor layers of a first conductivity type formed under the respective source electrodes, second switching semiconductor layers of a second conductivity type formed under the respective first switching semiconductor layers, and third switching semiconductor layers of the first conductivity type surrounding lower parts of the second switching semiconductor layers and sides of the first switching semiconductor layers and the second switching semiconductor layers. Gates are formed each having vertical faces or inclined faces in which a channel is formed on sides of the first switching semiconductor layer and the second switching semiconductor layer. Gate insulating layers are formed under the gates, and a drain electrode electrically is coupled to the source electrodes along a flow of charges in a vertical direction that passes through the channels.
    Type: Application
    Filed: August 4, 2014
    Publication date: February 5, 2015
    Inventor: Motonobu TAKEYA
  • Publication number: 20140332822
    Abstract: A normally off nitride-based transistor may include a source electrode and a drain electrode, a channel layer serving as a charge transfer path between the source electrode and the drain electrode, and a gate electrode that controls charge transfer of the channel layer. The channel layer may have a junction structure of a first conductive nitride semiconductor layer and an intrinsic nitride semiconductor layer such that a fixed turn-off blocking electric field is generated in the channel layer between the source electrode and the drain electrode in a turn-off state. The intrinsic nitride semiconductor layer may include an intrinsic GaN semiconductor layer, and the first conductive nitride semiconductor layer may include a p type GaN semiconductor layer stacked over the intrinsic GaN semiconductor layer.
    Type: Application
    Filed: May 12, 2014
    Publication date: November 13, 2014
    Applicant: Seoul Semiconductor Co., Ltd.
    Inventor: Motonobu TAKEYA
  • Publication number: 20140252371
    Abstract: Exemplary embodiments of the present invention disclose a heterojunction transistor having a normally off characteristic using a gate recess structure and a method of fabricating the same. The heterojunction transistor may include a substrate, a channel layer disposed on the substrate and made of a first nitride-based semiconductor having a first energy bandgap, a first barrier layer disposed on the channel layer and made of a second nitride-based semiconductor having a second energy bandgap different from the first energy bandgap, a gate electrode disposed in a gate control region of the first barrier layer, and a second barrier layer disposed in gate non-control regions of the first barrier layer and separated from the first barrier layer.
    Type: Application
    Filed: March 6, 2014
    Publication date: September 11, 2014
    Applicant: Seoul Semiconductor Co., Ltd.
    Inventors: June Sik KWAK, Yu Dae HAN, Kwan Hyun LEE, Motonobu TAKEYA, Young Do JONG
  • Publication number: 20140225122
    Abstract: A vertical gallium nitride transistor according to an exemplary embodiment of the present invention includes a semiconductor structure including a first semiconductor layer of a first conductivity-type having a first surface and sidewalls, a second semiconductor layer of the first conductivity-type surrounding the first surface and the sidewalls of the first semiconductor layer, and a third semiconductor layer of a second conductivity-type disposed between the first semiconductor layer and the second semiconductor layer, the third semiconductor layer separating the first and second semiconductor layers from each other.
    Type: Application
    Filed: February 11, 2014
    Publication date: August 14, 2014
    Applicant: Seoul Semiconductor Co., Ltd.
    Inventors: Motonobu TAKEYA, Kwan Hyun Lee, June Sik Kwak, Young Do Jong, Kang Nyung Lee
  • Patent number: 8513683
    Abstract: An optical integrated semiconductor light emitting device with improved light emitting efficiency is provided by preventing leak current from flowing through a high defect region of the substrate. The optical integrated semiconductor light emitting device includes: a substrate, in which in a low defect region made of crystal having a first average dislocation density, one or more high defect regions having a second average dislocation density higher than the first average dislocation density are included; and a Group III-V nitride semiconductor layer which is formed on the substrate, has a plurality of light emitting device structures, and has a groove in the region including the region corresponding to the high defect region (high defect region).
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: August 20, 2013
    Assignee: Sony Corporation
    Inventors: Osamu Maeda, Tsuyoshi Fujimoto, Motonobu Takeya, Toshihiro Hashidu, Masaki Shiozaki, Yoshio Oofuji
  • Patent number: 8460958
    Abstract: A method of manufacturing a semiconductor light emitting device made of nitride III-V compound semiconductors is includes an active layer made of a first nitride III-V compound semiconductor containing In and Ga, such as InGaN; an intermediate layer made of a second nitride III-V compound semiconductor containing In and Ga and different from the first nitride III-V compound semiconductor, such as InGaN; and a cap layer made of a third nitride III-V compound semiconductor containing Al and Ga, such as p-type AlGaN, which are deposited in sequential contact.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: June 11, 2013
    Assignee: Sony Corporation
    Inventors: Osamu Goto, Takeharu Asano, Yasuhiko Suzuki, Motonobu Takeya, Katsuyoshi Shibuya, Takashi Mizuno, Tsuyoshi Tojo, Shiro Uchida, Masao Ikeda
  • Publication number: 20110183452
    Abstract: A method of manufacturing a semiconductor light emitting device made of nitride III-V compound semiconductors is includes an active layer made of a first nitride III-V compound semiconductor containing In and Ga, such as InGaN; an intermediate layer made of a second nitride III-V compound semiconductor containing In and Ga and different from the first nitride III-V compound semiconductor, such as InGaN; and a cap layer made of a third nitride III-V compound semiconductor containing Al and Ga, such as p-type AlGaN, which are deposited in sequential contact.
    Type: Application
    Filed: April 6, 2011
    Publication date: July 28, 2011
    Applicant: SONY CORPORATION
    Inventors: Osamu Goto, Takeharu Asano, Yasuhiko Suzuki, Motonobu Takeya, Katsuyoshi Shibuya, Takashi Mizuno, Tsuyoshi Tojo, Shiro Uchida, Masao Ikeda
  • Patent number: 7964419
    Abstract: A semiconductor light emitting device made of nitride III-V compound semiconductors is includes an active layer made of a first nitride III-V compound semiconductor containing In and Ga, such as InGaN; an intermediate layer made of a second nitride III-V compound semiconductor containing In and Ga and different from the first nitride III-V compound semiconductor, such as InGaN; and a cap layer made of a third nitride III-V compound semiconductor containing Al and Ga, such as p-type AlGaN, which are deposited in sequential contact.
    Type: Grant
    Filed: January 3, 2008
    Date of Patent: June 21, 2011
    Assignee: Sony Corporation
    Inventors: Osamu Goto, Takeharu Asano, Yasuhiko Suzuki, Motonobu Takeya, Katsuyoshi Shibuya, Takashi Mizuno, Tsuyoshi Tojo, Shiro Uchida, Masao Ikeda
  • Publication number: 20100175620
    Abstract: A chemical vapor deposition apparatus includes a substrate ceiling unit forming a reaction chamber to which a reaction gas is supplied to epitaxially grow a substrate, and an exhaust unit separated from the substrate ceiling unit and serving to discharge an exhaust gas after epitaxial growth reaction. The exhaust unit includes a particle formation part to which particles generated in the epitaxial growth of the substrate are attached.
    Type: Application
    Filed: October 15, 2009
    Publication date: July 15, 2010
    Applicant: SAMSUNG LED CO., LTD.
    Inventors: Motonobu TAKEYA, Sang Duk Yoo, Sung Hwan Jang
  • Patent number: 7729400
    Abstract: An external cavity type semiconductor laser that has a larger output and a more excellent single mode characteristic than a conventional external cavity type semiconductor laser is provided. The external cavity type semiconductor laser has a laser diode 11, a window glass 16, a grating, and a lens. The external cavity type semiconductor laser has several modifications over the conventional one. A first modification is that the window glass 16 is inclined to a beam emission surface 19 of a laser diode 11 for a predetermined angle. A second modification is that arrangements of the laser diode 11 and so forth are adjusted so that a S wave reaches the grating. A third modification is that when an output power of the laser diode 11 is 45 mW or less, a kink is suppressed.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: June 1, 2010
    Assignee: Sony Corporation
    Inventors: Tomiji Tanaka, Kazuo Takahashi, Motonobu Takeya
  • Publication number: 20100126419
    Abstract: Provided are a susceptor and a chemical vapor deposition (CVD) apparatus including the susceptor. The susceptor has a simple structure and is configured to prevent bending of a substrate for uniformly heating the substrate and maintain wavelength uniformity of an epitaxial layer formed on the substrate.
    Type: Application
    Filed: October 8, 2009
    Publication date: May 27, 2010
    Inventors: Sung Hwan JANG, Sang Duk Yoo, Ho IL Jung, Chul Kyu Lee, Motonobu Takeya
  • Patent number: 7561606
    Abstract: An upper portion of a second clad layer and a contact layer are provided with grooves so as to form a ridge therebetween. An electrode is formed on the ridge. An insulation film is formed to extent on side surfaces of the ridge, on the inside of the grooves, and those portions of the contact layer which are located on the outside of the grooves. The thickness of those portions of the insulation film which are located on the contact layer in the areas on the outside of the grooves is set to be greater than at least the thickness of the electrode. Besides, a pad electrode is formed to cover the electrode and to extend on the insulation film on the upper side of the areas on the outside of the grooves. The upper surfaces of those portions of the pad electrode which are located on the upper side of the areas on the outside of the grooves are set to be above the upper surface of that portion of the pad electrode which is located on the upper side of the ridge.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: July 14, 2009
    Assignee: Sony Corporation
    Inventors: Manabu Taniguchi, Motonobu Takeya, Tsuyoshi Fujimoto, Masao Ikeda, Toshihiro Hashidu
  • Patent number: 7439546
    Abstract: A semiconductor light emitting device made of nitride III-V compound semiconductors includes an active layer made of a first nitride III-V compound semiconductor containing In and Ga, such as InGaN; an intermediate layer made of a second nitride III-V compound semiconductor containing In and Ga and different from the first nitride III-V compound semiconductor, such as InGaN; and a cap layer made of a third nitride III-V compound semiconductor containing Al and Ga, such as p-type AlGaN, which are deposited in sequential contact.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: October 21, 2008
    Assignee: Sony Corporation
    Inventors: Osamu Goto, Takeharu Asano, Yasuhiko Suzuki, Motonobu Takeya, Katsuyoshi Shibuya, Takashi Mizuno, Tsuyoshi Tojo, Shiro Uchida, Masao Ikeda
  • Publication number: 20080108160
    Abstract: A semiconductor light emitting device made of nitride III-V compound semiconductors is includes an active layer made of a first nitride III-V compound semiconductor containing In and Ga, such as InGaN; an intermediate layer made of a second nitride III-V compound semiconductor containing In and Ga and different from the first nitride III-V compound semiconductor, such as InGaN; and a cap layer made of a third nitride III-V compound semiconductor containing Al and Ga, such as p-type AlGaN, which are deposited in sequential contact.
    Type: Application
    Filed: January 3, 2008
    Publication date: May 8, 2008
    Applicant: SONY CORPORATION
    Inventors: Osamu Goto, Takeharu Asano, Yasuhiko Suzuki, Motonobu Takeya, Katsuyoshi Shibuya, Takashi Mizuno, Tsuyoshi Tojo, Shiro Uchida, Masao Ikeda
  • Patent number: 7339195
    Abstract: A semiconductor light emitting device made of nitride III-V compound semiconductors includes an active layer made of a first nitride III-V compound semiconductor containing In and Ga, such as InGaN; an intermediate layer made of a second nitride III-V compound semiconductor containing In and Ga and different from the first nitride III-V compound semiconductor, such as InGaN; and a cap layer made of a third nitride III-V compound semiconductor containing Al and Ga, such as p-type AlGaN, which are deposited in sequential contact.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: March 4, 2008
    Assignee: Sony Corporation
    Inventors: Osamu Goto, Takeharu Asano, Yasuhiko Suzuki, Motonobu Takeya, Katsuyoshi Shibuya, Takashi Mizuno, Tsuyoshi Tojo, Shiro Uchida, Masao Ikeda
  • Patent number: 7282379
    Abstract: Provided is a nitride semiconductor having a larger low-defective region on a surface thereof, a semiconductor device using the nitride semiconductor, a method of manufacturing a nitride semiconductor capable of easily reducing surface defects in a step of forming a layer through lateral growth, and a method of manufacturing a semiconductor device manufactured by the use of the nitride semiconductor. A seed crystal portion is formed into stripes on a substrate with a buffer layer sandwiched therebetween. Then, a crystal is grown from the seed crystal portion in two steps of growth conditions to form a nitride semiconductor layer. In a first step, a low temperature growth portion having a trapezoidal-shaped cross section in a layer thickness direction is formed at a growth temperature of 1030° C., and in a second step, lateral growth predominantly takes place at a growth temperature of 1070° C. Then, a high temperature growth potion is formed between the low temperature growth portions.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: October 16, 2007
    Assignee: Sony Corporation
    Inventors: Osamu Goto, Takeharu Asano, Motonobu Takeya, Katsunori Yanashima
  • Publication number: 20070064755
    Abstract: An external cavity type semiconductor laser that has a larger output and a more excellent single mode characteristic than a conventional external cavity type semiconductor laser is provided. The external cavity type semiconductor laser has a laser diode 11, a window glass 16, a grating, and a lens. The external cavity type semiconductor laser has several modifications over the conventional one. A first modification is in that the window glass 16 is inclined to a beam emission surface 19 of a laser diode 11 for a predetermined angle. A second modification is in that arrangements of the laser diode 11 and so forth are adjusted so that an S wave reaches the grating. A third modification is in that when an output power of the laser diode 11 is 45 mW or less, a kink is suppressed.
    Type: Application
    Filed: November 30, 2004
    Publication date: March 22, 2007
    Applicant: Sony Corporation
    Inventors: Tomiji Tanaka, Kazuo Takahashi, Motonobu Takeya