Patents by Inventor Mujahid Muhammad
Mujahid Muhammad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240028811Abstract: A process design kit (PDK) is supplied to a layout design tool. The PDK includes parameterized cells (Pcells) adapted to cause the layout design tool to automatically add labels to device layouts in the graphic design system (GDS) file that is being created by the layout design tool. Each corresponding label lists parameters used when creating the corresponding device layout. The GDS file is receive back from the layout design tool. The parameters from the labels is applied to corresponding ones of the Pcells within the PDK to create a device verification layout for each of the device layouts in the GDS file. Each of the device layouts in the GDS file is compared to a corresponding device verification layout. The device layouts within the GDS file that fail to match the corresponding device verification layout are thereby identified.Type: ApplicationFiled: July 19, 2022Publication date: January 25, 2024Inventors: Alain F. Loiseau, Romain H.A. Feuillette, Mujahid Muhammad
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Patent number: 11141902Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: GrantFiled: June 26, 2019Date of Patent: October 12, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Souvick Mitra, Mujahid Muhammad
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Patent number: 11130270Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: GrantFiled: June 25, 2019Date of Patent: September 28, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Souvick Mitra, Mujahid Muhammad
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Patent number: 10974433Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: GrantFiled: July 2, 2019Date of Patent: April 13, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Souvick Mitra, Mujahid Muhammad
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Patent number: 10940627Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: GrantFiled: July 12, 2018Date of Patent: March 9, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Souvick Mitra, Mujahid Muhammad
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Patent number: 10770594Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: GrantFiled: July 13, 2018Date of Patent: September 8, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Souvick Mitra, Mujahid Muhammad
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Patent number: 10658514Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: GrantFiled: February 7, 2018Date of Patent: May 19, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Souvick Mitra, Mujahid Muhammad
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Publication number: 20200135856Abstract: The disclosure provides an apparatus for preventing an integrated circuit (IC) structure from entering a latch-up mode. In an embodiment, the apparatus may include: a p-type substrate; an n-well within the p-type substrate; an n-type region within the p-type substrate, the n-type region being distinct from the n-well; a p-type region within the n-well; a power supply electrically coupled to the p-type region within the n-well; and a directional diode electrically coupling the power supply to the n-well in parallel with the p-type region. The directional diode biases a current flow from the power supply to the n-well, and the directional diode contacts the n-well distal to the p-type region.Type: ApplicationFiled: October 31, 2018Publication date: April 30, 2020Inventors: Shunhua T. Chang, Ephrem G. Gebreselasie, Mujahid Muhammad, Xiangxiang Lu, Mickey H. Yu
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Patent number: 10636872Abstract: The disclosure provides an apparatus for preventing an integrated circuit (IC) structure from entering a latch-up mode. In an embodiment, the apparatus may include: a p-type substrate; an n-well within the p-type substrate; an n-type region within the p-type substrate, the n-type region being distinct from the n-well; a p-type region within the n-well; a power supply electrically coupled to the p-type region within the n-well; and a directional diode electrically coupling the power supply to the n-well in parallel with the p-type region. The directional diode biases a current flow from the power supply to the n-well, and the directional diode contacts the n-well distal to the p-type region.Type: GrantFiled: October 31, 2018Date of Patent: April 28, 2020Assignee: GLOBALFOUNDRIES INC.Inventors: Shunhua T. Chang, Ephrem G. Gebreselasie, Mujahid Muhammad, Xiangxiang Lu, Mickey H. Yu
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Patent number: 10593805Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: GrantFiled: September 27, 2019Date of Patent: March 17, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Souvick Mitra, Mujahid Muhammad
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Patent number: 10573754Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: GrantFiled: November 21, 2017Date of Patent: February 25, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Souvick Mitra, Mujahid Muhammad
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Publication number: 20200027987Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: ApplicationFiled: September 27, 2019Publication date: January 23, 2020Inventors: John B. CAMPI, JR., Robert J. GAUTHIER, JR., Rahul MISHRA, Souvick MITRA, Mujahid MUHAMMAD
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Publication number: 20190326438Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: ApplicationFiled: July 2, 2019Publication date: October 24, 2019Inventors: John B. CAMPI, JR., Robert J. GAUTHIER, JR., Rahul MISHRA, Souvick MITRA, Mujahid MUHAMMAD
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Publication number: 20190319129Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: ApplicationFiled: June 25, 2019Publication date: October 17, 2019Inventors: John B. CAMPI, JR., Robert J. GAUTHIER, JR., Rahul MISHRA, Souvick MITRA, Mujahid MUHAMMAD
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Publication number: 20190319130Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: ApplicationFiled: June 26, 2019Publication date: October 17, 2019Inventors: John B. CAMPI, JR., Robert J. GAUTHIER, JR., Rahul MISHRA, Souvick MITRA, Mujahid MUHAMMAD
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Patent number: 10388793Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: GrantFiled: November 21, 2017Date of Patent: August 20, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Souvick Mitra, Mujahid Muhammad
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Patent number: 10381483Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: GrantFiled: March 30, 2017Date of Patent: August 13, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Souvick Mitra, Mujahid Muhammad
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Patent number: 10381484Abstract: A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.Type: GrantFiled: October 4, 2017Date of Patent: August 13, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Souvick Mitra, Mujahid Muhammad
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Patent number: 10347622Abstract: Silicon-controlled rectifiers, electrostatic discharge circuits, and methods of fabricating a silicon-controlled rectifier for use in an electrostatic discharge circuit. A device structure for the silicon controlled rectifier includes a first well of a first conductivity type in a semiconductor layer, a second well of a second conductivity type in the semiconductor layer, a cathode coupled with the first well, and an anode coupled with the second well. First and second body contacts are coupled with the first well, and the first and second body contacts each have the first conductivity type. A triggering device may be coupled with the first body contact.Type: GrantFiled: January 5, 2017Date of Patent: July 9, 2019Assignee: GLOBALFOUNDRIES Inc.Inventors: You Li, Manjunatha Prabu, Mujahid Muhammad, John B. Campi, Jr., Robert J. Gauthier, Jr., Souvick Mitra
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Patent number: 10283959Abstract: Circuits and methods of fabricating circuits that provide electrostatic discharge protection, as well as methods of protecting an integrated circuit from an electrostatic discharge event at an input/output pin. The protection circuit includes a silicon-controlled rectifier having a well and an anode in the well. The anode is coupled with the input/output pin. The protection circuit further includes a control circuit coupled with the well. The control circuit is configured to supply a first control logic voltage to the well that places the silicon-controlled rectifier in a blocking state, and a second control logic voltage to the well that places the silicon-controlled rectifier in a low impedance state. When placed in its low impedance state, the silicon-controlled rectifier is configured to divert current from the electrostatic discharge event at the input/output pin away from the integrated circuit.Type: GrantFiled: August 1, 2014Date of Patent: May 7, 2019Assignee: International Business Machines CorporationInventors: John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Souvick Mitra, Mujahid Muhammad