Patents by Inventor Mutsumi Okajima

Mutsumi Okajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7321147
    Abstract: A device including a trench capacitor formed in a semiconductor substrate for configuring a DRAM cell together with a cell transistor is provided. The device also includes a cell transistor including diffused regions formed in a surface of a semiconductor substrate; a trench capacitor formed in said semiconductor substrate for configuring a DRAM cell together with said cell transistor; a buried strap formed in said semiconductor substrate to connect said diffused region to said trench capacitor; and a collar insulation film formed on sides of said buried strap.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Mutsumi Okajima
  • Publication number: 20070262356
    Abstract: A semiconductor device manufacturing method includes forming a first insulating film on a semiconductor substrate, forming a first conductor film on the first insulating film, forming a second insulating film on the first conductor film, forming a first line-and-space pattern by etching the second insulating film and the first conductor film, forming a etched region etched into a second line-and-space pattern perpendicular to the first line-and-space pattern by etching the second insulating film, the first conductor film, the first insulating film, and the semiconductor substrate, burying a third insulating film in the etched region, removing the second insulating film, forming a fourth insulating film on the first conductor film and the third insulating film, forming a second conductor film on the fourth insulating film, and forming a third line-and-space pattern parallel to the first line-and-space pattern by etching the second conductor film.
    Type: Application
    Filed: April 24, 2007
    Publication date: November 15, 2007
    Inventor: Mutsumi Okajima
  • Publication number: 20070187799
    Abstract: A method of manufacturing a semiconductor device according to an aspect of the present invention comprises: depositing an insulation film on a silicon substrate; forming element isolation regions by processing the insulation film as well as exposing the surface of the silicon substrate in the region thereof acting as active element forming regions later; and forming the active element forming regions by epitaxially growing a silicon film on the exposed surface of the silicon substrate such that the thickness thereof is larger than the short side width in the perpendicular cross section thereof as well as smaller than the dimension of the element isolation regions in the depth direction thereof.
    Type: Application
    Filed: April 27, 2006
    Publication date: August 16, 2007
    Inventors: Toshiharu Tanaka, Shinya Watanabe, Mutsumi Okajima
  • Publication number: 20070102744
    Abstract: A method of manufacturing semiconductor devices is provided. The device includes a trench capacitor formed in a semiconductor substrate for configuring a DRAM cell together with a cell transistor. The method comprises forming a trench in a semiconductor substrate; forming a collar insulation film on sidewalls of the trench, the collar insulator extending to a surface of the semiconductor substrate; forming a trench capacitor in the trench; introducing ions into a part of the collar insulation film by implanting ions of an impurity from one of slanting directions; etching off the ion-introduced part of the collar insulation film through the use of a difference in etching rate from other parts of the collar insulation film; and forming a buried strap in the trench above the trench capacitor.
    Type: Application
    Filed: January 17, 2006
    Publication date: May 10, 2007
    Inventor: Mutsumi Okajima
  • Publication number: 20060138526
    Abstract: Disclosed is a semiconductor device comprising a first conductive film serving as a floating gate and formed on a semiconductor film via a first gate insulating film, a second conductive film serving as a control gate and formed on the first conductive film via a second gate insulating film, and a third conductive film buried in a contact hole formed by removing a part of the second conductive film and second gate insulating film so as to reach an upper surface of the first conductive film from an upper surface of the second conductive film.
    Type: Application
    Filed: February 22, 2006
    Publication date: June 29, 2006
    Inventor: Mutsumi Okajima
  • Publication number: 20050082602
    Abstract: Disclosed is a semiconductor device comprising a first conductive film serving as a floating gate and formed on a semiconductor film via a first gate insulating film, a second conductive film serving as a control gate and formed on the first conductive film via a second gate insulating film, and a third conductive film buried in a contact hole formed by removing a part of the second conductive film and second gate insulating film so as to reach an upper surface of the first conductive film from an upper surface of the second conductive film.
    Type: Application
    Filed: January 23, 2004
    Publication date: April 21, 2005
    Inventor: Mutsumi Okajima
  • Patent number: 6759333
    Abstract: A semiconductor device comprises a first conductor formed inside or on the top surface of a semiconductor substrate; an insulating film formed on the top surface of said semiconductor substrate or on the top surface of said first conductor; contact holes penetrating said insulating layer to reach said first conductor; a second conductor filled inside said contact holes and electrically connected to said first conductor; and an interconnection extending across contact regions on a top surface region of said insulating layer where said contact holes are formed respectively, and having opposite sides at least one of which is in contact with said second conductor inside said contact regions.
    Type: Grant
    Filed: September 10, 2002
    Date of Patent: July 6, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Mutsumi Okajima
  • Publication number: 20040009661
    Abstract: A semiconductor device comprises a first conductor formed inside or on the top surface of a semiconductor substrate; an insulating film formed on the top surface of said semiconductor substrate or on the top surface of said first conductor; contact holes penetrating said insulating layer to reach said first conductor; a second conductor filled inside said contact holes and electrically connected to said first conductor; and an interconnection extending across contact regions on a top surface region of said insulating layer where said contact holes are formed respectively, and having opposite sides at least one of which is in contact with said second conductor inside said contact regions.
    Type: Application
    Filed: September 10, 2002
    Publication date: January 15, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Mutsumi Okajima