Patents by Inventor Mutsuo Yamamoto
Mutsuo Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8294152Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: GrantFiled: February 15, 2011Date of Patent: October 23, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
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Publication number: 20110133201Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: ApplicationFiled: February 15, 2011Publication date: June 9, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Minoru MIYAZAKI, Akane MURAKAMI, Baochun CUI, Mutsuo YAMAMOTO
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Patent number: 7897972Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: GrantFiled: June 2, 2009Date of Patent: March 1, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
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Publication number: 20090236607Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: ApplicationFiled: June 2, 2009Publication date: September 24, 2009Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Minoru MIYAZAKI, Akane MURAKAMI, Baochun CUI, Mutsuo YAMAMOTO
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Patent number: 7547916Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: GrantFiled: June 7, 2006Date of Patent: June 16, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
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Publication number: 20070012923Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: ApplicationFiled: June 7, 2006Publication date: January 18, 2007Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
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Patent number: 7105898Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: GrantFiled: December 28, 2004Date of Patent: September 12, 2006Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
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Patent number: 7061016Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: GrantFiled: August 15, 2003Date of Patent: June 13, 2006Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
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Patent number: 7045399Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layers is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: GrantFiled: July 17, 2003Date of Patent: May 16, 2006Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
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Publication number: 20050145847Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: ApplicationFiled: December 28, 2004Publication date: July 7, 2005Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
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Patent number: 6743667Abstract: An amorphous semiconductor film comprising silicon is provided with a metal element which is capable of promoting a crystallization of silicon. Then, the semiconductor film is crystallized by hating at a relatively low temperature. After introducing impurity ions into source and drain regions of the semiconductor film, the source and drain regions are recrystallized by heating. During the recrystallization, the channel region having crystallinity functions as crystalline nuclei. Accordingly, it is possible to avoid defects occurring in the boundary regions between the channel region and source/drain regions.Type: GrantFiled: February 2, 2001Date of Patent: June 1, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masamitsu Hiroki, Yasuhiko Takemura, Mutsuo Yamamoto, Naoaki Yamaguchi, Satoshi Teramoto
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Publication number: 20040051102Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layers is less than 1500 Å, e.g., between 100 and 750 Å. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: ApplicationFiled: August 15, 2003Publication date: March 18, 2004Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
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Publication number: 20040023445Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layers is less than 1500 Å, e.g., between 100 and 750 Å. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: ApplicationFiled: July 17, 2003Publication date: February 5, 2004Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
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Patent number: 6608353Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 Å, e.g., between 100 and 750 Å. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: GrantFiled: July 12, 2002Date of Patent: August 19, 2003Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
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Publication number: 20020179969Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layers is less than 1500 Å, e.g., between 100 and 750 Å. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: ApplicationFiled: July 12, 2002Publication date: December 5, 2002Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
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Patent number: 6448612Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layers is less than 1500 Å, e.g., between 100 and 750 Å. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: GrantFiled: November 2, 2000Date of Patent: September 10, 2002Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
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Patent number: 6326246Abstract: In a thin film transistor (TFT), a part of a surface or a whole surface of aluminum used as a gate electrode is covered by anodic oxide. In a process after anodization process, ultraviolet light is irradiated to a gate electrode in an oxidizing atmosphere containing oxygen, ozone, or nitrous oxide. Or, in a process after anodization process, a TFT is leaved (placed) in plasma in an oxidizing atmosphere. Or, ultraviolet light is irradiated to a gate electrode in plasma in an oxidizing atmosphere. A substrate temperature is a room temperature (50° C.) to 500° C., for example, 200 to 300° C. By ultraviolet light irradiation or plasma processing, metallic aluminum contained in anodic oxide is oxidized.Type: GrantFiled: June 17, 1998Date of Patent: December 4, 2001Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Mutsuo Yamamoto
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Publication number: 20010019858Abstract: An amorphous semiconductor film comprising silicon is provided with a metal element which is capable of promoting a crystallization of silicon. Then, the semiconductor film is crystallized by hating at a relatively low temperature. After introducing impurity ions into source and drain regions of the semiconductor film, the source and drain regions are recrystallized by heating. During the recrystallization, the channel region having crystallinity functions as crystalline nuclei. Accordingly, it is possible to avoid defects occurring in the boundary regions between the channel region and source/drain regions.Type: ApplicationFiled: February 2, 2001Publication date: September 6, 2001Inventors: Masamitsu Hiroki, Yasuhiko Takemura, Mutsuo Yamamoto, Naoaki Yamaguchi, Satoshi Teramoto
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Patent number: 6194255Abstract: A method of manufacturing a semiconductor device includes process of introducing a material for promoting crystallization of an amorphous semiconductor film, crystallizing the amorphous semiconductor film to form a crystalline semiconductor film, introducing phosphorus to form a source region, a drain region, a pair of light doped regions and a channel region being defined between the pair of the light doped region, heating the crystalline semiconductor film so that the material is diffused from the channel region to each of the source and drain regions through each of the pair of light doped region.Type: GrantFiled: April 18, 1997Date of Patent: February 27, 2001Assignee: Semiconductor Energy Laboratry Co. LtdInventors: Masamitsu Hiroki, Yasuhiko Takemura, Mutsuo Yamamoto, Naoaki Yamaguchi, Satoshi Teramoto
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Patent number: 6166414Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layers is less than 1500 .ANG., e.g., between 100 and 750 .ANG.. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.Type: GrantFiled: August 25, 1999Date of Patent: December 26, 2000Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto