Abstract: A nonvolatile memory device including a lower electrode, a resistor structure disposed on the lower electrode, a middle electrode disposed on the resistor structure, a diode structure disposed on the middle electrode, and an upper electrode disposed on the diode structure. A nonvolatile memory device wherein the resistor structure includes one resistor and the diode structure includes one diode. An array of nonvolatile memory device as described above.

Abstract: A resistive random access memory (RRAM) having a solid solution layer and a method of manufacturing the RRAM are provided. The RRAM includes a lower electrode, a solid solution layer on the lower electrode, a resistive layer on the solid solution layer, and an upper electrode on the resistive layer. The method of manufacturing the RRAM includes forming a lower electrode, forming a solid solution layer on the lower electrode, forming a resistive layer on the solid layer and forming an upper electrode on the resistive layer, wherein the RRAM is formed of a transition metal solid solution.

Abstract: Provided is a nonvolatile memory device and method of operating and fabricating the same for higher integration and higher speed, while allowing for a lower operating current. The nonvolatile memory device may include a semiconductor substrate. Resistive layers each storing a variable resistive state may be formed on the surface of the semiconductor substrate. Buried electrodes may be formed on the semiconductor substrate under the resistive layers and may connect to the resistive layers. Channel regions may be formed on the surface of the semiconductor substrate and connect adjacent resistive layers to each other, but not to the buried electrodes. Gate insulating layers may be formed on the channel regions of the semiconductor substrate. Gate electrodes may be formed on the gate insulating layers and extend over the resistive layers.

Abstract: A threshold switching operation method of a nonvolatile memory device may be provided. In the threshold switching operation method of a nonvolatile memory a pulse voltage may be supplied to a metal oxide layer of the nonvolatile memory device. Accordingly, it may be possible to operate the nonvolatile memory device at a lower voltage with lower threshold switching current.

Abstract: Provided is a non-volatile memory device including a variable resistance material and method of fabricating the same. The non-volatile memory device may include a lower electrode, an intermediate layer on the lower electrode including one material selected from the group consisting of HfO, ZnO, InZnO, and ITO, a variable resistance material layer on the intermediate layer, and an upper electrode on the variable resistance material layer. A memory device having multi-level bipolar switching characteristics based upon the size of the device may be provided.

Abstract: Provided is a resistance random access memory (RRAM) device and a method of manufacturing the same. A resistance random access memory (RRAM) device may include a lower electrode, a first oxide layer on the lower electrode and storing information using two resistance states, a current control layer made of a second oxide on the first oxide layer and an upper electrode on the current control layer.

Abstract: A nonvolatile memory device having self-presence diode characteristics, and/or a nonvolatile memory array including the nonvolatile memory device may be provided. The nonvolatile memory device may include a lower electrode, a first semiconductor oxide layer on the lower electrode, a second semiconductor oxide layer on the first semiconductor oxide layer, and/or an upper electrode on the second semiconductor oxide layer.

Abstract: Resistive memory devices having at least one varistor and methods of operating the same are disclosed. The resistive memory device may include at least one bottom electrode line, at least one top electrode line crossing the at least one bottom electrode line, and at least one stack structure disposed at an intersection of the at least one top electrode line and the at least one bottom electrode line including a varistor and a data storage layer.

Abstract: A multi-bit memory cell stores information corresponding to a high resistive state and multiple other resistive states lower than the high resistive state. A resistance of a memory element within the multi-bit memory cell switches from the high resistive state to one of the other multiple resistive states by applying a corresponding current to the memory element.

Abstract: A method of forming carbon fibers at a low temperature below 450° C. using an organic-metal evaporation method is provided. The method includes: heating a substrate and maintaining the substrate at a temperature of 200 to 450° C. after loading the substrate into a reaction chamber; preparing an organic-metal compound containing Ni; forming an organic-metal compound vapor by vaporizing the organic-metal compound; and forming carbon fibers on the substrate by facilitating a chemical reaction between the organic-metal compound vapor and a reaction gas containing ozone in the reaction chamber.

Abstract: A memory device may include a switching device and a storage node coupled with the switching device. The storage node may include a first electrode, a second electrode, a data storage layer and at least one contact layer. The data storage layer may be disposed between the first electrode and the second electrode and may include a transition metal oxide or aluminum oxide. The at least one contact layer may be disposed at least one of above or below the data storage layer and may include a conductive metal oxide.

Abstract: A nonvolatile memory device including one transistor and one resistant material and a method of manufacturing the nonvolatile memory device are provided. The nonvolatile memory device includes a substrate, a transistor formed on the substrate, and a data storage unit connected to a drain of the transistor. The data storage unit includes a data storage material layer having different resistance characteristics in different voltage ranges.

Abstract: A nonvolatile memory device including a nano dot and a method of fabricating the same are provided. The nonvolatile memory device may include a lower electrode, an oxide layer on the lower electrode, a nano dot in the oxide layer and an upper electrode on the oxide layer. In example embodiments, the current paths inside the oxide layer may be unified, thereby stabilizing the reset current.

Abstract: An apparatus for injecting plasma in the atmosphere is provided, including a plurality of dielectric panels (13a, 13b, 13c), and 13d, which are disposed in parallel at predetermined intervals, a gas supply portion (14), to which the dielectric panels (13a, 13b, 13c, and 13d) are fixed and which supplies a gas to spaces between the dielectric panels (13a and 13b), between the dielectric panels (13b and 13c), and between the dielectric panels (13c and 13d), power electrodes (15a, 15b, and 15c), which are linearly installed near the gas supply portion (14) and between the dielectric panels (13a and 13b, between the dielectric panels 13b and 13c, and between the dielectric panels 13c and 13d), respectively, ground electrodes (16a, 16b, 16c, and 16d), which are formed in the ends of the dielectric panels (13a, 13b, 13c, and 13d), respectively, and a high frequency generator (17), which applies high frequency power to the power electrodes (15a, 15b, and 15c) and the ground electrodes (16a, 16b, 16c, and 16d).

Abstract: Example embodiments relate to a method of manufacturing amorphous NiO thin films and nonvolatile memory devices including amorphous thin films that use a resistance material. Other example embodiments relate to a method of manufacturing amorphous NiO thin films having improved switching and resistance characteristics by reducing a leakage current and non-volatile memory devices using an amorphous NiO thin film. Provided is a method of manufacturing an amorphous NiO thin film having improved switching behavior by reducing leakage current and improving resistance characteristics. The method may include preparing a substrate in a vacuum chamber, preparing a nickel precursor material, preparing a source gas by vaporizing the nickel precursor material, preparing a reaction gas, preparing a purge gas and forming a monolayer NiO thin film on the substrate by performing one cycle of sequentially supplying the source gas, the purge gas, the reaction gas and the purge gas into the vacuum chamber.

Abstract: The nonvolatile memory device includes a semiconductor substrate on which a source, a drain, and a channel region are formed, a tunneling oxide film formed on the channel region, a floating gate formed of a transition metal oxide (TMO) on the tunneling oxide, a blocking oxide film formed on the floating gate, a gate electrode formed on the blocking oxide film.

Abstract: A nonvolatile memory device having two or more resistors and methods of forming and using the same. A nonvolatile memory device having two resistance layers, and more particularly, to a nonvolatile memory device formed and operated using a resistance layer having memory switching characteristics and a resistance layer having threshold switching characteristics. The nonvolatile semiconductor memory device may include a lower electrode; a first resistance layer having at least two resistance characteristics formed on the lower electrode, a second resistance layer having threshold switching characteristics formed on the first resistance layer, and an upper electrode formed on the second resistance layer.

Abstract: A nonvolatile memory device including one resistor and one transistor. The resistor may correspond to a resistance layer electrically connected to a first impurity region and a second impurity region of the transistor.

Abstract: A nonvolatile memory device and method that uses a resistor having various resistance states. The memory device may include a switching device and a resistor. The resistor may be electrically connected with the switching device and may have one reset resistance state and at least two or more set resistance states.

Abstract: A transistor in which a physical property of its channel is changed according to an applied voltage, and methods of manufacturing and operating the same are provided. The transistor may include a first conductive layer on a substrate, a phase change layer and a second conductive layer which are sequentially stacked on the first conductive layer, a first current direction limiting unit and a second current direction limiting unit formed on the second conductive layer by being separated within a space, a third conductive layer and a fourth conductive layer formed on the first current direction limiting unit and the second current direction limiting unit, respectively, a word line connected to the third conductive layer, a bit line connected to the fourth conductive layer, and a voltage lowering unit connected to the word line.