Patents by Inventor Myoung Jae Lee

Myoung Jae Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8445882
    Abstract: Example embodiments, relate to a non-volatile memory element and a memory device including the same. The non-volatile memory element may include a memory layer having a multi-layered structure between two electrodes. The memory layer may include first and second material layers and may show a resistance change characteristic due to movement of ionic species therebetween. The first material layer may be an oxygen-supplying layer. The second material layer may be an oxide layer having a multi-trap level.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: May 21, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-soo Lee, Man Chang, Young-bae Kim, Myoung-jae Lee, Chang-bum Lee, Seung-ryul Lee, Chang-jung Kim, Ji-hyun Hur
  • Patent number: 8426837
    Abstract: Provided is a resistive memory device and a method of manufacturing the resistive memory device that includes a bottom electrode, an insulating layer that is formed on the bottom electrode and has a hole that exposes the bottom electrode, a resistance layer and an intermediate layer which are formed in the hole, a switch structure formed on a surface of the intermediate layer, and an upper electrode formed on the switch structure.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: April 23, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myoung-jae Lee, Young-soo Park, Jung-hyun Lee, Soon-won Hwang, Seok-jae Chung, Chang-soo Lee
  • Publication number: 20130058153
    Abstract: In a method of operating a semiconductor device, a resistance value of a variable resistance element is changed from a first resistance value to a second resistance value by applying a first voltage to the variable resistance element; and a first current that flows through the variable resistance element is sensed. A second voltage for changing the resistance value of the variable resistance element from the second resistance value to the first resistance value is modulated based on a dispersion of the first current, and the first voltage is re-applied to the variable resistance element based on a dispersion of the first current.
    Type: Application
    Filed: June 5, 2012
    Publication date: March 7, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Man Chang, Young-bae Kim, Dong-soo Lee, Chang-bum Lee, Seung-ryul Lee, Chang-jung Kim, Myoung-jae Lee, Kyung-min Kim
  • Publication number: 20130051125
    Abstract: According to an example embodiment, a method of operating a semiconductor device having a variable resistance device includes: applying a first voltage to the variable resistance device to change a resistance value of the variable resistance device from a first resistance value to a second resistance value that is different from the first resistance value; sensing a first current flowing through the variable resistance device to which the first voltage is applied; determining a second voltage used for changing the variable resistance device from the second resistance value to the first resistance value, based on a dispersion of the sensed first current; and applying the determined second voltage to the variable resistance device.
    Type: Application
    Filed: August 21, 2012
    Publication date: February 28, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Man CHANG, Young-bae KIM, Chang-jung KIM, Myoung-jae LEE, Seong-jun PARK, Ji-hyun HUR, Dong-soo LEE, Chang-bum LEE, Seung-ryul LEE
  • Publication number: 20130051164
    Abstract: A method of driving a nonvolatile memory device including applying a reset voltage to a unit memory cell, reading a reset current of the unit memory cell, confirming whether the reset current is within a first current range, if the reset current is not within the first current range, changing the reset voltage and applying a changed reset voltage or applying again the reset voltage to the unit memory cell after applying a set voltage to the unit memory cell, if the reset current is within the first current range, confirming whether a difference between the present reset current and an immediately previous set current is within a second current range, and, if the difference is not within the second current range, applying the reset voltage or applying again the reset voltage to the unit memory cell after applying a set voltage to the unit memory cell.
    Type: Application
    Filed: June 14, 2012
    Publication date: February 28, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Man Chang, Young-bae Kim, Dong-soo Lee, Chang-bum Lee, Seung-ryul Lee, Chang-jung Kim, Myoung-jae Lee, Kyung-min Kim
  • Publication number: 20130043451
    Abstract: Nonvolatile memory elements and memory devices including the nonvolatile memory elements. A nonvolatile memory element may include a memory layer between two electrodes, and the memory layer may have a multi-layer structure. The memory layer may include a base layer and an ionic species exchange layer and may have a resistance change characteristic due to movement of ionic species between the base layer and the ionic species exchange layer. The ionic species exchange layer may have a multi-layer structure including at least two layers. The nonvolatile memory element may have a multi-bit memory characteristic due to the ionic species exchange layer having the multi-layer structure. The base layer may be an oxygen supplying layer, and the ionic species exchange layer may be an oxygen exchange layer.
    Type: Application
    Filed: March 27, 2012
    Publication date: February 21, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-ryul Lee, Young-bae Kim, Chang-jung Kim, Myoung-jae Lee, Ji-hyun Hur, Dong-soo Lee, Man Chang, Chang-bum Lee, Kyung-min Kim
  • Patent number: 8350262
    Abstract: A nonvolatile memory device having self-presence diode characteristics, and/or a nonvolatile memory array including the nonvolatile memory device may be provided. The nonvolatile memory device may include a lower electrode, a first semiconductor oxide layer on the lower electrode, a second semiconductor oxide layer on the first semiconductor oxide layer, and/or an upper electrode on the second semiconductor oxide layer.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: January 8, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myoung-Jae Lee, In-Kyeong Yoo, Eun-Hong Lee, Jong-Wan Kim, Dong-Chul Kim, Seung-Eon Ahn
  • Patent number: 8350247
    Abstract: A resistive random access memory (RRAM) having a solid solution layer and a method of manufacturing the RRAM are provided. The RRAM includes a lower electrode, a solid solution layer on the lower electrode, a resistive layer on the solid solution layer, and an upper electrode on the resistive layer. The method of manufacturing the RRAM includes forming a lower electrode, forming a solid solution layer on the lower electrode, forming a resistive layer on the solid layer and forming an upper electrode on the resistive layer, wherein the RRAM is formed of a transition metal solid solution.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: January 8, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myoung-jae Lee, Young-soo Park, Ran-ju Jung, Sun-ae Seo, Dong-chul Kim, Seung-eon Ahn
  • Publication number: 20120319076
    Abstract: In one embodiment, the memory element may include a first electrode, a second electrode spaced apart from the first electrode, a memory layer between the first electrode and the second electrode, and an auxiliary layer between the memory layer and the second electrode. The auxiliary layer provides a multi-bit memory characteristic to the memory layer.
    Type: Application
    Filed: May 30, 2012
    Publication date: December 20, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-bum Lee, Chang-jung Kim, Young-bae Kim, Myoung-jae Lee, Dong-soo Lee, Man Chang, Seung-ryul Lee, Kyung-min Kim
  • Patent number: 8274067
    Abstract: Memory devices and methods of manufacturing the same are provided. In a memory device, a memory-switch structure is formed between a first and second electrode. The memory-switch structure includes a memory resistor and a switch structure. The switch structure controls current supplied to the memory resistor. A memory region of the memory resistor and a switch region of the switch structure are different from each other.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: September 25, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-eon Ahn, Myoung-jae Lee, Suk-pil Kim, Young-soo Park
  • Publication number: 20120230080
    Abstract: According to an example embodiment, a method of operating a semiconductor device includes applying a first voltage to the variable resistance device so as to change a resistance value of the variable resistance device from a first resistance value to a second resistance value that is different from the first resistance value, sensing first current flowing through the variable resistance device to which the first voltage is applied, determining a second voltage used to change the resistance value of the variable resistance device from the second resistance value to the first resistance value based on a distribution of the sensed first current, and applying the determined second voltage to the variable resistance device.
    Type: Application
    Filed: November 30, 2011
    Publication date: September 13, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Man Chang, Young-bae Kim, Chang-jung Kim, Myoung-jae Lee, Seong-jun Park, Ji-hyun Hur, Dong-soo Lee, Chang-bum Lee, Seung-ryul Lee
  • Publication number: 20120161821
    Abstract: A method of operating a semiconductor device that includes a variable resistance device, the method including applying a first voltage to the variable resistance device so as to change a resistance value of the variable resistance device from a first resistance value to a second resistance value that is different from the first resistance value; sensing first current flowing through the variable resistance device to which the first voltage is applied; determining whether the first current falls within a predetermined range of current; and if the first current does not fall within the first range of current, applying an additional first voltage that is equal to the first voltage to the variable resistance device.
    Type: Application
    Filed: December 7, 2011
    Publication date: June 28, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Man CHANG, Young-bae KIM, Chang-jung KIM, Myoung-jae LEE, Ji-hyun HUR, Dong-soo LEE, Chang-bum LEE, Seung-ryul LEE
  • Patent number: 8203863
    Abstract: A nonvolatile memory cell may include a bidirectional switch having a first threshold voltage when a forward current is applied to the bidirectional switch and a second threshold voltage when a reverse current is applied to the bidirectional switch; and a variable resistor connected to the bidirectional switch in series. A state of resistance of the variable resistor may be controlled according to voltage applied to the variable resistor. A sum of a magnitude of the first threshold voltage and a magnitude of the second threshold voltage may be greater than a write voltage that is used to perform a write operation on the variable resistor.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: June 19, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-jung Kim, In-kyeong Yoo, Jai-kwang Shin, Chang-jung Kim, Myoung-jae Lee, Ki-ha Hong
  • Publication number: 20120104353
    Abstract: A cross point memory array includes a structure in which holes are formed in an insulating layer and a storage node is formed in each of the holes. The storage node may include a memory resistor and a switching structure. The master for an imprint process used to form the cross-point memory array includes various pattern shapes, and the method of manufacturing the master uses various etching methods.
    Type: Application
    Filed: December 28, 2011
    Publication date: May 3, 2012
    Inventors: Byung-kyu LEE, Du-hyun Lee, Myoung-jae Lee
  • Patent number: 8164130
    Abstract: A nonvolatile memory device including one transistor and one resistant material and a method of manufacturing the nonvolatile memory device are provided. The nonvolatile memory device includes a substrate, a transistor formed on the substrate, and a data storage unit connected to a drain of the transistor. The data storage unit includes a data storage material layer having different resistance characteristics in different voltage ranges.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: April 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sun-ae Seo, In-kyeong Yoo, Myoung-jae Lee, Wan-jun Park
  • Publication number: 20120049145
    Abstract: A non-volatile memory element includes: a memory layer disposed between a first electrode and a second electrode; and a buffer layer disposed between the memory layer and the first electrode. The memory layer includes a first material layer and a second material layer. The first material layer and the second material layer are configured to exchange ionic species to change a resistance state of the memory layer.
    Type: Application
    Filed: May 25, 2011
    Publication date: March 1, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-bum Lee, Chang-jung Kim, Young-bae Kim, Myoung-jae Lee, Ji-hyun Hur, Dong-soo Lee, Man Chang, Seung-ryul Lee
  • Publication number: 20120032132
    Abstract: Nonvolatile memory elements may include a first electrode, a second electrode, a first buffer layer, a second buffer layer and a memory layer. The memory layer may be between the first and second electrodes. The first butter layer may be between the memory layer and the first electrode. The second buffer layer may be between the memory layer and the second electrode. The memory layer may be a multi-layer structure including a first material layer and a second material layer. The first material layer may include a first metal oxide which is of the same group as, or a different group from, a second metal oxide included in the second material layer.
    Type: Application
    Filed: August 5, 2011
    Publication date: February 9, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-ryul Lee, Chang-jung Kim, Young-bae Kim, Myoung-jae Lee, Ji-hyun Hur, Dong-soo Lee, Man Chang, Chang-bum Lee
  • Patent number: 8105884
    Abstract: A cross point memory array includes a structure in which holes are formed in an insulating layer and a storage node is formed in each of the holes. The storage node may include a memory resistor and a switching structure. The master for an imprint process used to form the cross-point memory array includes various pattern shapes, and the method of manufacturing the master uses various etching methods.
    Type: Grant
    Filed: October 5, 2009
    Date of Patent: January 31, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-kyu Lee, Du-hyun Lee, Myoung-jae Lee
  • Publication number: 20120018695
    Abstract: Example embodiments, relate to a non-volatile memory element and a memory device including the same. The non-volatile memory element may include a memory layer having a multi-layered structure between two electrodes. The memory layer may include first and second material layers and may show a resistance change characteristic due to movement of ionic species therebetween. The first material layer may be an oxygen-supplying layer. The second material layer may be an oxide layer having a multi-trap level.
    Type: Application
    Filed: May 24, 2011
    Publication date: January 26, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-soo Lee, Man Chang, Young-bae Kim, Myoung-jae Lee, Chang-bum Lee, Seung-ryul Lee, Chang-jung Kim, Ji-hyun Hur
  • Patent number: 8101983
    Abstract: A nonvolatile memory device including one transistor and one resistant material and a method of manufacturing the nonvolatile memory device are provided. The nonvolatile memory device includes a substrate, a transistor formed on the substrate, and a data storage unit connected to a drain of the transistor. The data storage unit includes a data storage material layer having different resistance characteristics in different voltage ranges.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: January 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sun-ae Seo, In-kyeong Yoo, Myoung-jae Lee, Wan-jun Park