Patents by Inventor Nadim Khlat
Nadim Khlat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12388429Abstract: Group delay determination in a communication circuit is disclosed. The communication circuit includes a power amplifier circuit that amplifies a radio frequency (RF) signal based on a modulated voltage and a power management integrated circuit (PMIC) that generates the modulated voltage. Herein, the PMIC includes a group delay determination circuit to determine a relative group delay between the modulated voltage and a modulated current, which is internal to the power amplifier circuit and unknown to the PMIC, solely based on signals known to the PMIC. The determined relative group delay can help to time align the modulated voltage with the modulated current at the power amplifier circuit to improve error vector magnitude (EVM) and/or adjacent channel leakage ratio (ACLR). Further, by determining the relative group delay based on known signals to the PMIC, it is possible to achieve good time alignment between the modulated voltage and the modulated current.Type: GrantFiled: October 5, 2022Date of Patent: August 12, 2025Assignee: Qorvo US, Inc.Inventors: Marcus Granger-Jones, Nadim Khlat
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Publication number: 20250253884Abstract: Systems and method for bidirectional communication for front end modules (FEM) are disclosed. In one aspect, a bidirectional communication path tunneling through an existing communication bus between a FEM and a baseband processor is created. In a particular aspect, a driver may be hosted by an external processor and communicate with the baseband processor to effectuate the desired tunneled communication through the bus between the baseband processor and the FEM. The bidirectional communication may allow the FEM to adjust settings to optimize performance based on the information provided by the baseband processor. Likewise, information from the FEM may be used to adjust operation of the baseband processor.Type: ApplicationFiled: May 19, 2023Publication date: August 7, 2025Inventors: George Maxim, Suryanarayana Pappu, Paul Bricketto, Jackie Johnson, Woo Yong Lee, Nadim Khlat, Baker Scott
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Publication number: 20250253882Abstract: A transceiver circuit operable in a dynamic power range is provided. In embodiments disclosed herein, the transceiver circuit is configured to generate a radio frequency (RF) signal and a target voltage that is adapted according to a power range of the RF signal. More specifically, the transceiver circuit is configured to generate the target voltage differently when the power range of the RF signal is higher (e.g., ?18 dBm) or lower (e.g., <18 dBm). By adapting the target voltage based on the power range of the RF signal, it is possible to suppress a potential voltage ripple in a modulated voltage generated according to the target voltage to thereby achieve a desired adjacent channel leakage ratio (ACLR) when the RF signal is amplified at a power amplifier circuit based on the modulated voltage.Type: ApplicationFiled: April 20, 2023Publication date: August 7, 2025Inventors: Nadim Khlat, Ahmad Chaudhry
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Patent number: 12381524Abstract: A multi-voltage power generation circuit is disclosed. More specifically, the multi-voltage generation circuit includes multiple voltage modulation circuits that are configured to generate and maintain multiple modulated voltages. In a non-limiting example, the multiple modulated voltages can be used for amplifying multiple radio frequency (RF) signals concurrently. Contrary to using multiple direct-current (DC) to DC (DC-DC) converters for generating the multiple modulated voltages, the voltage modulation circuits are configured to share a single current modulation circuit based on time-division. By sharing a single current modulation circuit among the multiple voltage modulation circuits, it is possible to concurrently support multiple load circuits (e.g., power amplifier circuits) with significantly reduced footprint.Type: GrantFiled: September 16, 2022Date of Patent: August 5, 2025Assignee: Qorvo US, Inc.Inventor: Nadim Khlat
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Patent number: 12381514Abstract: A power management circuit supporting phase correction in an analog signal is disclosed. The power management circuit includes a power amplifier circuit configured to amplify an analog signal having a time-variant power envelope based on a modulated voltage. The power management circuit also includes an envelope tracking (ET) integrated circuit (ETIC) configured to generate the modulated voltage and a modulated phase correction voltage to thereby cause a phase change in the analog signal. In embodiments disclosed herein, a correlation between the time-variant power envelope, the modulated voltage, and the modulated phase correction voltage is explored to thereby allow the ETIC to generate the modulated voltage and the modulated phase correction voltage based on the time-variant power envelope. As a result, it is possible to enable good time and phase alignment between the modulated voltage and the time-variant power envelope to thereby improve efficiency and linearity of the power amplifier circuit.Type: GrantFiled: November 29, 2021Date of Patent: August 5, 2025Assignee: Qorvo US, Inc.Inventors: Andrew F. Folkmann, Nadim Khlat, Mark Connor
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Patent number: 12381525Abstract: The present disclosure relates to an amplifier system having an output amplifier stage with a signal input and output, and a varactor with a capacitive output that is coupled to the signal input for adjusting input capacitance. The amplifier system also includes push varactor bias circuitry with a bias level output that is coupled to a tuning input, and a bias control input. The push varactor bias circuitry is configured to adjust bias voltage at the tuning input and thereby adjust the capacitance at the signal input by way of the varactor and reduce signal distortion at the signal output in response to a distortion compensation signal received at the bias control input.Type: GrantFiled: June 14, 2023Date of Patent: August 5, 2025Assignee: Qorvo US, Inc.Inventors: George Maxim, Nadim Khlat, Baker Scott, Kevin Wesley Kobayashi
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Patent number: 12381521Abstract: A distributed power management circuit is disclosed. Herein, a phase correction in a radio frequency (RF) signal is performed by a power management integrated circuit (PMIC), a distributed PMC, and a power amplifier circuit. The power amplifier circuit includes a phase shifter circuit configured to phase-shift the RF signal based on a phase correction signal and a power amplifier configured to amplify the phase-shifted RF signal based on a modulated voltage. The distributed PMIC is configured to generate the phase correction signal and the modulated voltage based on a modulated target voltage. The PMIC is configured to generate the modulated target voltage based on a time-variant power envelope of the RF signal. As a result, the modulated voltage and the time-variant power envelope can be better aligned in time and/or phase at the power amplifier circuit to thereby improve efficiency and linearity of the power amplifier.Type: GrantFiled: December 29, 2021Date of Patent: August 5, 2025Assignee: Qorvo US, Inc.Inventor: Nadim Khlat
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Patent number: 12375064Abstract: An acoustic transformer in a transmitter chain is disclosed. In one aspect, a differential power amplifier may produce a differential signal that is provided to an acoustic transformer coupled to an acoustic filter. The acoustic transformer provides a single-ended output signal for use by the acoustic filter. To facilitate operation in multiple bands, multiple acoustic transformer-acoustic filter pairs may be provided with a switching network used to route the amplified signal to the appropriate transformer-filter pair.Type: GrantFiled: September 1, 2023Date of Patent: July 29, 2025Assignee: Qorvo US, Inc.Inventors: Baker Scott, Nadim Khlat
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Patent number: 12375040Abstract: A virtual radio frequency (VRF) equalizer for an envelope tracking integrated circuit (ETIC) is disclosed. In one aspect, an ETIC provides envelope tracking (ET) for a barely Doherty (BD) power amplifier stage. The VRF equalizer includes circuitry that provides ripple cancelation that is caused by load modulation of the BD power amplifier stage. Additional circuitry is included to compensate for an amplifier within the ETIC. By canceling the ripple within the ETIC, the overall performance and efficiency of the BD power amplifier stage is improved, resulting in better performance of a transmitter in a wireless communication device.Type: GrantFiled: March 11, 2022Date of Patent: July 29, 2025Assignee: Qorvo US, Inc.Inventor: Nadim Khlat
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Publication number: 20250233561Abstract: Hybrid predistortion in a wireless transmission circuit is provided. The wireless transmission circuit includes a transceiver circuit that generates a radio frequency (RF) signal and a power amplifier circuit than amplifies the RF signal for transmission. In aspects disclosed herein, the transceiver circuit is configured to perform a digital predistortion(s) (DPD) on a digital version of the RF signal and the power amplifier circuit is configured to perform an analog predistortion(s) (APD) on the RF signal to collectively cancel varies types of distortions in the RF signal. By concurrently performing a combination of DPD and APD (a.k.a. hybrid predistortion) across the transceiver circuit and the power amplifier circuit, it is possible to effectively restore linearity in the RF signal and improve overall performance of the wireless transmission circuit with reduced footprint, cost, and computational complexity.Type: ApplicationFiled: January 18, 2023Publication date: July 17, 2025Inventors: George Maxim, Nadim Khlat, Baker Scott
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Patent number: 12362728Abstract: An acoustic transformer in a transmitter chain is disclosed. In one aspect, a differential power amplifier may produce a differential signal that is provided to a first transformer. A differential output of this first transformer is provided to an acoustic transformer that provides a single ended output signal for use by an acoustic filter. By making the second transformer an acoustic transformer, the second transformer may be integrated into the same circuitry that forms the acoustic filter, thereby simplifying the die. Further, the acoustic transformer may be tuned if ferroelectric resonators are used, which provides strong out-of-band signal cancelation.Type: GrantFiled: July 11, 2023Date of Patent: July 15, 2025Assignee: Qorvo US, Inc.Inventor: Nadim Khlat
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Patent number: 12335073Abstract: Intra-symbol voltage modulation in a wireless communication circuit is disclosed. In a wireless communication circuit, a power amplifier circuit is configured to amplify a radio frequency (RF) signal based on a modulated voltage that tracks a time-variant input power of the RF signal. Herein, intra-symbol voltage modulation means that the modulated voltage can be adapted within a voltage modulation interval(s), such as an orthogonal frequency division multiplexing (OFDM) symbol duration. In embodiments disclosed herein, the voltage modulation interval(s) is divided into multiple voltage modulation subintervals and a respective voltage target is determined for each of the voltage modulation subintervals. Accordingly, the modulated voltage can be adapted in each of the voltage modulation subintervals according to the respective voltage target.Type: GrantFiled: October 31, 2022Date of Patent: June 17, 2025Assignee: Qorvo US, Inc.Inventor: Nadim Khlat
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Publication number: 20250192724Abstract: A power amplifier system having a carrier amplifier having a first supply node, a peaking amplifier having a second supply node, and envelope tracking (ET) circuitry is disclosed. The ET circuitry has a first tracking amplifier that generates a first voltage signal at the first supply node, a second tracking amplifier that generates a second voltage signal at the second supply node, and a transistor coupled between the first supply node and the second supply node. A control circuit has a first input coupled to an output of both or either of the first tracking amplifier and the second tracking amplifier and a control output terminal coupled to a control input terminal of the transistor, wherein the control circuit is configured to progressively turn on the transistor to pass current from the first supply node to the second supply node as the peaking amplifier progressively becomes active.Type: ApplicationFiled: February 14, 2025Publication date: June 12, 2025Inventor: Nadim Khlat
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Publication number: 20250192738Abstract: Voltage ripple reduction in a power management circuit is disclosed. The power management circuit includes a power amplifier circuit configured to amplify a radio frequency (RF) signal based on a modulated voltage and an envelope tracking integrated circuit (ETIC) configured to provide the modulated voltage to the power amplifier circuit via a conductive path. Notably, an output impedance presenting at an input of the power amplifier circuit can interact with a modulated load current in the power amplifier circuit to create a voltage ripple in the modulated voltage to potentially cause an undesirable error in the RF signal. Herein, the ETIC is configured to modify the modulated voltage based on feedback of the voltage ripple in the modulated voltage. As such, it is possible to reduce the output impedance at the input of the power amplifier circuit to thereby reduce the voltage ripple in the modulated voltage.Type: ApplicationFiled: February 24, 2025Publication date: June 12, 2025Inventors: Michael R. Kay, Nadim Khlat
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Publication number: 20250192736Abstract: A power amplifier system is disclosed having a first amplifier with a high-power input and a high-power output. A second amplifier has a low-power input and a low-power output. A reconfigurable mode switch network has a first series switch branch coupled between the high-power output and an RF output, a first shunt branch is coupled between the RF output and a fixed voltage node, and a second series switch branch is coupled between the low-power output and a shared node of the first shunt branch. The shared node separates the first shunt branch into a first shared section that is between the RF output and the shared node and a second shared section that is between the shared node and the fixed voltage node.Type: ApplicationFiled: February 14, 2025Publication date: June 12, 2025Inventors: Baker Scott, George Maxim, Nadim Khlat, Chong Woo, Jungmin Park
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Patent number: 12323174Abstract: Amplitude-to-phase (AM-PM) error correction in a transceiver circuit is provided. The transceiver circuit is configured to generate a radio frequency (RF) signal from a time-variant input vector for transmission in one or more transmission frequencies. In embodiments disclosed herein, the transceiver circuit is configured to determine a phase correction term from the time-variant input vector and apply the determined phase correction term to the time-variant input vector to thereby correct an AM-PM error(s) in the RF signal. By correcting the AM-PM error(s) in the transceiver circuit, it is possible to prevent undesired amplitude distortion and/or spectrum regrowth in any of the transmission frequencies, particularly when the RF signal is modulated across a wide modulation bandwidth (e.g., ?200 MHz).Type: GrantFiled: August 18, 2022Date of Patent: June 3, 2025Assignee: Qorvo US, Inc.Inventor: Nadim Khlat
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Patent number: 12323107Abstract: Envelope tracking power supply circuitry includes a look up table (LUT) configured to provide a target supply voltage based on a power envelope measurement. The target supply voltage is dynamically adjusted based on a delay between the power envelope of an RF signal and a provided envelope tracking supply voltage. The envelope tracking supply voltage is generated from the adjusted target supply voltage in order to synchronize the envelope tracking supply voltage with the power envelope of the RF signal.Type: GrantFiled: March 19, 2024Date of Patent: June 3, 2025Assignee: Qorvo US, Inc.Inventors: James M. Retz, Nadim Khlat
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Patent number: 12323103Abstract: An envelope tracking (ET) integrated circuit (ETIC) is provided. The ETIC is configured to generate an ET voltage for amplifying a radio frequency (RF) signal modulated for communication in multiple time intervals. In embodiments disclosed herein, the ETIC is self-contained to generate an ET target voltage based on a power envelope of the RF signal and to generate the ET voltage based on the ET target voltage. Given that the RF signal may be modulated at a very high modulation bandwidth, the ETIC can be configured to modify the ET target voltage in each of the time intervals to thereby cause the ET voltage to be adapted on a per time interval basis. As a result, the ET voltage can better track the power envelope of the RF signal in each of the time intervals to help improve operating efficiency of a power amplifier apparatus that employs the ETIC.Type: GrantFiled: November 11, 2021Date of Patent: June 3, 2025Assignee: Qorvo US, Inc.Inventor: Nadim Khlat
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Publication number: 20250158643Abstract: Systems and methods for front-end linearization using information from a baseband circuit are disclosed. In one aspect, a baseband circuit provides information to a front-end module that uses the information to adjust operating parameter settings such as how an analog predistortion (APD) circuit or power management integrated circuit behaves to provide more linear operation of the front-end module across the frequencies of interest. In exemplary aspects, the front-end module may receive raw information from which the front-end module determines what changes should be made. In alternate exemplary aspects, the baseband circuit provides instructions or coefficients that are then used by the front-end module to make the changes. In either event, the front-end module may optimize operation to reduce power consumption and provide more linear operation so that the transceiver may better operate within the parameters of a given wireless protocol.Type: ApplicationFiled: January 18, 2023Publication date: May 15, 2025Inventors: George Maxim, Nadim Khlat, Baker Scott, Jackie Johnson
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Patent number: 12301184Abstract: An average power tracking (APT) power management circuit is provided. The APT power management circuit is configured to generate a first APT voltage(s) for a first power amplifier(s) and a second APT voltage(s) for a second power amplifier(s). The APT power management circuit further includes a pair of switcher circuits that can generate a pair of reference voltages. Depending on various operating scenarios of the APT power management circuit, it is possible to selectively output any of the reference voltages as any one or more of the first APT voltage(s) and the second APT voltage(s). As such, it is possible to flexibly configure the APT power management circuit to support the various operating scenarios based on a minimum possible number of the switcher circuits, thus helping to reduce footprint and cost of the APT power management circuit.Type: GrantFiled: May 30, 2023Date of Patent: May 13, 2025Assignee: Qorvo US, Inc.Inventors: Nadim Khlat, Michael R. Kay