Patents by Inventor Nadim Khlat

Nadim Khlat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11031909
    Abstract: A group delay optimization circuit is provided. The group delay optimization circuit receives a first signal (e.g., a voltage signal) and a second signal (e.g., a current signal). Notably, the first signal and the second signal may experience different group delays that can cause the first signal and the second signal to misalign at an amplifier circuit configured to amplify a radio frequency (RF) signal. The group delay optimization circuit is configured to determine a statistical indicator indicative of a group delay offset between the first signal and the second signal. Accordingly, the group delay optimization circuit may minimize the group delay offset by reducing the statistical indicator to below a defined threshold in one or more group delay optimization cycles. As a result, it may be possible to pre-compensate for the group delay offset in the RF signal, thus helping to improve efficiency and linearity of the amplifier circuit.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: June 8, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11031911
    Abstract: An envelope tracking (ET) integrated circuit (IC) (ETIC) is provided. The ETIC is configured to generate an ET voltage based on a supply voltage(s) and provide the ET voltage to an amplifier circuit(s) for amplifying a radio frequency (RF) signal(s). Notably, the RF signal(s) may be modulated in different modulation bandwidths and the amplifier circuit(s) may correspond to different load-line impedances. Accordingly, the ETIC may need to adapt the ET voltage such that the ETIC and the amplifier circuit(s) can operate at higher efficiencies. In examples discussed herein, the ETIC is configured to determine a time-variant peak of the ET voltage and adjust the supply voltage(s) accordingly. As a result, it may be possible to improve operating efficiency of the ETIC in face of a wide range of bandwidth and/or load-line requirements.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: June 8, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11025458
    Abstract: An adaptive frequency equalizer for wide modulation bandwidth envelope tracking (ET) is provided. In this regard, an ET integrated circuit (ETIC) provides an ET power signal for one or more power amplifiers (PAs). A voltage error can occur in the ET power signal due to variable impedance sources, such as a variable load impedance at the PA and a variable trace inductance between the ETIC and the PA. The adaptive frequency equalizer disclosed herein works to adaptively correct for such voltage errors to provide improved overall power signal tracking at the PA, especially where there is a large trace inductance from the ETIC being located several centimeters (cm) away from the PA. Thus, embodiments of the adaptive frequency equalizer enhance ET performance for radio frequency (RF) systems having a modulation bandwidth of 100 megahertz (MHz) or above.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: June 1, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11025224
    Abstract: RF circuitry, which includes a first acoustic RF resonator (ARFR) and a first compensating ARFR, is disclosed. A first inductive element is coupled between the first compensating ARFR and a first end of the first ARFR. A second inductive element is coupled between the first compensating ARFR and a second end of the first ARFR. The first compensating ARFR, the first inductive element, and the second inductive element at least partially compensate for a parallel capacitance of the first ARFR.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: June 1, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Jean-Frederic Chiron, Marcus Granger-Jones, Andrew F. Folkmann, Robert Aigner
  • Patent number: 11024479
    Abstract: A passive wireless switch circuit and related apparatus are provided. In examples discussed herein, an apparatus includes a smaller number of voltage circuits configured to control a larger number of microelectromechanical systems (MEMS) switches. The voltage circuits passively generate a number of constant voltages based on a number of radio frequency (RF) signals to collectively identify each of the MEMS switches. A decoder circuit decodes the constant voltages to identify a selected MEMS switch and provides a selected constant voltage higher than a defined threshold voltage to close the selected MEMS switch. As such, it may be possible to eliminate active components and/or circuits from the passive wireless switch circuit, thus helping to reduce leakage and power consumption. It may be further possible to reduce conductive traces between the voltage circuits and the MEMS switches, thus helping to reduce routing complexity and footprint of the apparatus.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: June 1, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11018638
    Abstract: A multimode envelope tracking (ET) circuit and related apparatus is provided. The multimode ET circuit is configured to provide an ET voltage(s) to an amplifier circuit(s) for amplifying a radio frequency (RF) signal(s) that may correspond to a wider range of modulation bandwidth. In this regard, the multimode ET circuit is configured to switch dynamically and opportunistically between different operation modes based on the modulation bandwidth of the RF signal(s). In examples discussed herein, the multimode ET circuit is configured to support a single amplifier circuit in a high-modulation-bandwidth mode and an additional amplifier circuit(s) in a mid-modulation-bandwidth mode and a low-modulation-bandwidth mode.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: May 25, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay
  • Patent number: 11018627
    Abstract: A multi-bandwidth envelope tracking (ET) integrated circuit (IC) (ETIC) and related apparatus are provided. In a non-limiting example, the multi-bandwidth ETIC is coupled to an amplifier circuit(s) configured to amplify a radio frequency (RF) signal corresponding to a wide range of modulation bandwidth (e.g., from less than 90 KHz to over 40 MHz). In this regard, the multi-bandwidth ETIC is configured to generate different ET voltages based on the modulation bandwidth of the RF signal. By generating the ET voltages based on the modulation bandwidth of the RF signal, it may be possible to optimize operating efficiency of the amplifier circuit(s). As a result, it may be possible to improve power consumption and reduce heat dissipation in an apparatus employing the multi-bandwidth ETIC, thus making it possible to provide the multi-bandwidth ETIC in a wearable device.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: May 25, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11005450
    Abstract: A filter circuit includes a first input node and a second input node for receiving an input signal, and a first output node and a second output node for providing an output signal. A first series acoustic resonator is coupled in series between the first input node and the first output node. At least one coupled resonator filter (CRF) includes first and second transducers, which may be acoustically coupled to one another. The first transducer has a first electrode coupled to the first input node, a second electrode coupled to the second input node, and a first piezoelectric layer between the first electrode and the second electrode. A second transducer has a third electrode coupled to the first output node, a fourth electrode coupled to the second output node, and a second piezoelectric layer between the third electrode and the fourth electrode.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: May 11, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Robert Aigner
  • Patent number: 11005181
    Abstract: A multi-layer antenna assembly and related antenna array are provided. In one aspect, a multi-layer antenna assembly includes a first radiating layer(s) and a second radiating layer(s). The second radiating layer(s) is provided below and in parallel to the first radiating layer(s). The second radiating layer(s) overlaps at least partially with the first radiating layer(s). In this regard, an electromagnetic wave radiated vertically from the second radiating layer(s) is horizontally guided by an overlapping portion of the first radiating layer(s). In another aspect, an antenna array can be configured to include a number of multi-layer antenna assemblies to enable radio frequency (RF) beamforming. By employing the multi-layer antenna assemblies in the antenna array, it may be possible to flexibly and naturally steer an RF beam in a desired direction(s) without causing oversized side lobes, thus helping to improve power efficiency and performance of the antenna array.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: May 11, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Dirk Robert Walter Leipold, George Maxim, Nadim Khlat, Baker Scott
  • Patent number: 10998859
    Abstract: A dual-input envelope tracking (ET) integrated circuit (ETIC) and related apparatus are provided. The dual-input ETIC includes an ET voltage circuit configured to generate an ET voltage based on an ET voltage and a first set of parameters. The ET voltage may be provided to a power amplifier circuit(s) for amplifying a radio frequency (RF) signal(s) in an ET power range. The dual-input ETIC also includes a target voltage processing circuit configured to generate the ET target voltage based on a second set of parameters. The dual-input ETIC further includes a control circuit configured to determine the first set of parameters and the second set parameters based at least on the ET power range of the power amplifier circuit(s). As such, it may be possible to optimize the dual-input ETIC performance in a wide-range of modulation bandwidth, thus helping to improve linearity and efficiency of the power amplifier circuit(s).
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: May 4, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Publication number: 20210126599
    Abstract: An average power tracking (APT) power amplifier apparatus is provided. In a non-limiting example, the APT power amplifier apparatus includes multiple sets of power amplifier circuits configured to amplify a radio frequency (RF) signal(s) for transmission in different polarizations (e.g., vertical and horizontal). In examples disclosed herein, the APT power amplifier apparatus can be configured to employ a single power management integrated circuit (PMIC) to provide an APT voltage to all of the power amplifier circuits for amplifying the RF signal(s). By employing a single PMIC in the APT power amplifier apparatus, it is possible to reduce footprint, power consumption, and costs of the APT power amplifier apparatus.
    Type: Application
    Filed: October 26, 2020
    Publication date: April 29, 2021
    Inventors: Nadim Khlat, Marcus Granger-Jones
  • Patent number: 10992264
    Abstract: An envelope tracking (ET) circuit is provided. In examples discussed herein, the ET circuit can be configured to operate in a fifth-generation (5G) standalone (SA) mode and a 5G non-standalone (NSA) mode. In the SA mode, the ET circuit can enable a first pair of ET power amplifier circuits to amplify a 5G signal based on ET for concurrent transmission in a 5G band(s). In the NSA mode, the ET circuit can enable a second pair of ET power amplifier circuits to amplify an anchor signal and a 5G signal based on ET for concurrent transmission in an anchor band(s) and a 5G band(s), respectively. As such, the ET circuit may be provided in a 5G-enabled wireless communication device (e.g., a 5G-enabled smartphone) to help improve power amplifier linearity and efficiency in both 5G SA and NSA networks.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: April 27, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 10992270
    Abstract: A power amplifier apparatus supporting reverse intermodulation product (rIMD) cancellation is provided. The power amplifier apparatus includes an amplifier circuit configured to amplify and output a radio frequency (RF) signal for transmission via an antenna port. The antenna port may receive a reverse interference signal, which may interfere with the RF signal to create a rIMD(s) that can fall within an RF receive band(s). A reverse coupling circuit is provided in the power amplifier apparatus to generate an interference cancellation signal based on the reverse interference signal. The amplifier circuit is configured to amplify the interference cancellation signal and the RF signal to create an intermodulation product(s) to suppress the rIMD(s) to a determined threshold. By suppressing the rIMD(s) in the power amplifier apparatus, it is possible to support concurrent transmissions and receptions in a number of RF spectrums while in compliance with stringent regulatory spurious emissions (SEM) requirements.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: April 27, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Marcus Granger-Jones, Dirk Robert Walter Leipold, Nadim Khlat
  • Patent number: 10985731
    Abstract: An acoustic resonator structure is provided. The acoustic resonator structure includes an acoustic resonator configured to resonate in a resonance frequency to pass a radio frequency (RF) signal from an input node to an output node. However, the acoustic resonator may create an electrical capacitance in parallel to the acoustic resonator. The electrical capacitance may cause the acoustic resonator to resonate outside the resonance frequency, thus compromising performance of the acoustic resonator. In this regard, an active circuit is provided in parallel to the acoustic resonator in the acoustic resonator structure. The active circuit can be configured to cause a negative capacitance between the input node and the output node. As such, it may be possible to cancel the electrical capacitance created by the acoustic resonator, thus helping to improve performance of the acoustic resonator.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: April 20, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 10985702
    Abstract: An envelope tracking system is disclosed having an envelope tracking integrated circuit (ETIC) with a first tracker having a first supply output and a second tracker having a second supply output, wherein the ETIC has a first mode in which only one of the first and second trackers supplies voltage and a second mode in which the first and second trackers both supply voltage. A first notch filter is coupled to the first supply output and a second notch filter is coupled to the second supply output. A mode switch coupled between the first supply output and the second supply output is configured to couple the first notch filter and the second notch filter in parallel in the first mode and open the mode switch to decouple the first notch filter from the second notch filter in the second mode in response to first and second switch control signals, respectively.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: April 20, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay
  • Patent number: 10978997
    Abstract: An envelope tracking (ET) integrated circuit (IC) (ETIC) is provided. The ETIC includes a number of ET circuits configured to generate a number of ET voltages based on a number of ET target voltages, respectively. In examples discussed herein, a selected ET circuit among the ET circuits is configured to generate a respective ET voltage based on a maximum ET target voltage among the ET target voltages. In this regard, the respective ET voltage generated by the selected ET circuit can be used as a reference ET voltage for the rest of the ET circuits in the ETIC. As a result, it may be possible to opportunistically turn off or reduce functionality of one or more other ET circuits in the ETIC, thus helping to reduce peak battery current and improve heat dissipation in an ET amplifier apparatus incorporating the ETIC.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: April 13, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 10958244
    Abstract: An acoustic filter apparatus is provided. In examples discussed herein, the acoustic filter apparatus includes an acoustic ladder network configured to pass a signal in a series resonance frequency and block the signal in a number of parallel resonance frequencies. The acoustic ladder network is coupled to a microelectromechanical systems (MEMS) switch circuit that includes a number of MEMS switches. The MEMS switches may be selectively controlled (e.g., closed and/or opened) to cause a modification to a selected parallel resonance frequency(s) among the parallel resonance frequencies. As such, it may be possible to flexibly configure the parallel resonance frequencies of the acoustic ladder network based on application scenarios.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: March 23, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 10958245
    Abstract: A filter circuit includes a first input node and a second input node for receiving an input signal, and a first output node and a second output node for providing an output signal. A first series acoustic resonator is coupled in series between the first input node and the first output node. At least one coupled resonator filter (CRF) includes first and second transducers, which may be acoustically coupled to one another. The first transducer has a first electrode coupled to the first input node, a second electrode coupled to the second input node, and a first piezoelectric layer between the first electrode and the second electrode. A second transducer has a third electrode coupled to the first output node, a fourth electrode coupled to the second output node, and a second piezoelectric layer between the third electrode and the fourth electrode.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: March 23, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Robert Aigner
  • Patent number: 10951183
    Abstract: Power amplifier (PA) output memory neutralization is disclosed, using baseband input/output (I/O) capacitance current compensation. Radio frequency (RF) PAs experience I/O memory effects when used with envelope tracking supply modulation schemes. Envelope tracking supply modulation results in a nonlinear variation of the I/O capacitance. Traditional approaches compensate for such effects with a current provided by a bias circuit which is band-limited. This results in memory effects which distort the amplified signal, becoming more significant as the modulation bandwidth increases. An RF communications system according to embodiments disclosed herein mitigates such memory effects by compensating for the non-linear effect of the I/O capacitance in an RF PA.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: March 16, 2021
    Assignee: Qorvo US, Inc.
    Inventors: George Maxim, Baker Scott, Dirk Robert Walter Leipold, Nadim Khlat
  • Patent number: 10951175
    Abstract: An envelope tracking (ET) circuit and related power amplifier apparatus is provided. An ET power amplifier apparatus includes an ET circuit and a number of amplifier circuits. The ET circuit is configured to provide a number of ET modulated voltages to the amplifier circuits for amplifying concurrently a number of radio frequency (RF) signals. The ET circuit includes a target voltage circuit for generating a number of ET target voltages adapted to respective power levels of the RF signals and/or respective impedances seen by the amplifier circuits, a supply voltage circuit for generating a number of constant voltages, and an ET voltage circuit for generating the ET modulated voltages based on the ET target voltages and a selected one of the constant voltages. By employing a single ET circuit, it may be possible to reduce footprint and improve heat dissipation of the ET power amplifier apparatus.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: March 16, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat