Patents by Inventor Nafea Bishara
Nafea Bishara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9769081Abstract: Some of the embodiments of the present disclosure provide a method comprising managing a plurality of buffer addresses in a system-on-chip (SOC); and if a number of available buffer addresses in the SOC falls below a low threshold value, obtaining one or more buffer addresses from a memory, which is external to the SOC, to the SOC. Other embodiments are also described and claimed.Type: GrantFiled: December 3, 2012Date of Patent: September 19, 2017Assignee: Marvell World Trade Ltd.Inventors: Alon Pais, Nafea Bishara
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Patent number: 9740455Abstract: A physical-layer circuit including a memory, a physical-layer device and a control circuit. The memory receives data from a media access controller (MAC) at a first rate. The MAC is separate from the physical-layer circuit. The physical-layer device receives the data from the memory and transmits the data from the physical-layer circuit to a peer device. The physical-layer device transfers the data from the memory to the peer device at a second rate. An amount of data stored in the memory is based on a difference between the first and second rates. The second rate is less than the first rate. The control circuit is connected between the memory and the physical layer device. The control circuit monitors the amount of the data stored in the memory and, based on the amount of the data stored in the memory, transmits a frame to the MAC to decrease the first rate.Type: GrantFiled: November 18, 2015Date of Patent: August 22, 2017Assignee: Marvell World Trade Ltd.Inventors: Nafea Bishara, William Lo
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Patent number: 9430379Abstract: A memory controller comprises a memory controller core that receives packets of data and generates memory transactions for each of the packets of data. A memory interface transmits each of the memory transactions to one of a plurality of memory banks of a memory. The memory controller directs each of the memory transactions to a different memory bank than an immediately preceding memory transaction.Type: GrantFiled: January 15, 2007Date of Patent: August 30, 2016Assignee: Marvell International Ltd.Inventor: Nafea Bishara
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Patent number: 9344328Abstract: A first port of a network device having a plurality of ports. The first port includes a memory configured to store an identifier of a backup port associated with the first port a redirect circuit, and a loopback circuit. The redirect circuit is configured to, in response to a failure of the first port, redirect first frames of data, to be received from the first port by the network device, to the backup port associated with the first port. The loopback circuit is configured to, in response to the failure of the first port, redirect second frames of data, received by the first port from the network device, to the backup port associated with the first port.Type: GrantFiled: October 22, 2013Date of Patent: May 17, 2016Assignee: Marvell International Ltd.Inventor: Nafea Bishara
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Patent number: 9294397Abstract: A switch includes ports including a first port and a second port. A processor approves associations between the ports and addresses of packets. A memory stores entries having respective indicators indicating approval of an association between respective ports and addresses. The first port receives a first packet sent to the switch. The controller: determines whether one of the entries includes an address of the first packet; if none of the entries includes the address of the first packet, sends a first message to the processor requesting approval of the first packet; if one of the entries includes the address of the first packet, determines whether the indicator of the one of the entries indicates approval and based on this, sends the first message to the processor; receives a response from the processor based on the first message; and based on the response, forwards the first packet to the second port.Type: GrantFiled: June 18, 2013Date of Patent: March 22, 2016Assignees: Marvell Israel (M.I.S.L) Ltd., Marvell International Ltd.Inventors: Nafea Bishara, Tsahi Daniel, David Melman
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Publication number: 20160077797Abstract: A physical-layer circuit including a memory, a physical-layer device and a control circuit. The memory receives data from a media access controller (MAC) at a first rate. The MAC is separate from the physical-layer circuit. The physical-layer device receives the data from the memory and transmits the data from the physical-layer circuit to a peer device. The physical-layer device transfers the data from the memory to the peer device at a second rate. An amount of data stored in the memory is based on a difference between the first and second rates. The second rate is less than the first rate. The control circuit is connected between the memory and the physical layer device. The control circuit monitors the amount of the data stored in the memory and, based on the amount of the data stored in the memory, transmits a frame to the MAC to decrease the first rate.Type: ApplicationFiled: November 18, 2015Publication date: March 17, 2016Inventors: Nafea Bishara, William Lo
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Patent number: 9262374Abstract: In one embodiment, a method performs, by at least a processor, a computer networking function as controlled, at least in part, by a configuration for a networking device. Source commands are received to establish the configuration, wherein the source commands are written in a source command language. The source commands are translated from the source command language to target commands written in a target command language, wherein the translation is based, at least in part, on a function to function translation model. The configuration is then established by executing at least the target commands.Type: GrantFiled: June 28, 2013Date of Patent: February 16, 2016Assignee: MARVELL INTERNATIONAL LTD.Inventors: Nafea Bishara, Michael Orr
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Patent number: 9210107Abstract: A first network device includes a host and a memory. A media access controller receives data from the host and stores the data in the memory at a first rate. A physical-layer device receives the data from the memory and transmits the data from the first network device to a second network device. The memory is connected between the media access controller and the physical-layer device. An amount of the data stored in the memory is based on the first rate and a second rate at which the physical-layer device transfers the data from the memory to the second network device. The first rate is greater than the second rate. A control circuit, based on an amount of the data stored in the memory, transmits a first frame to the media access controller. The media access controller, in response to the first frame, decreases the first rate.Type: GrantFiled: October 7, 2013Date of Patent: December 8, 2015Assignee: Marvell World Trade Ltd.Inventors: Nafea Bishara, William Lo
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Patent number: 9203735Abstract: A network device includes a plurality of physical ports configured to be coupled to one or more networks, and a processor device configured to process packets. The processor device includes a processor configured to implement a logical port assignment mechanism to assign source logical port information to a data packet received via a source physical port of the plurality of physical ports. The source logical port information is assigned based on one or more characteristics of the data packet, and the source logical port information corresponds to a logical entity that is different from any physical port. The processor device also includes a forwarding engine processor configured to determine one or more egress logical ports for forwarding the data packet, map the egress logical port(s) to respective egress physical port(s) of the plurality of physical ports, and forward the data packet to the egress physical port(s) based on the mapping.Type: GrantFiled: February 24, 2014Date of Patent: December 1, 2015Assignees: Marvell International Ltd., Marvell Israel (M.I.S.L) Ltd.Inventors: David Melman, Nir Arad, Nafea Bishara
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Patent number: 9185052Abstract: A switching device comprises a plurality of switch cores, each switch core having a plurality of ports associated with the switch core. A first switch core is configured to perform ingress processing of a data frame. The data frame is then directed to a second switch core that is configured to perform egress processing of the data frame.Type: GrantFiled: January 18, 2013Date of Patent: November 10, 2015Assignees: Marvell International Ltd., Marvell Israel (M.I.S.L.) Ltd.Inventors: Aviran Kadosh, Nafea Bishara
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Patent number: 9118555Abstract: A networking apparatus is used in connection with a virtual local area network (VLAN). The networking apparatus includes a control circuit and a policy circuit. The control circuit is configured to dynamically determine a count of network devices presently belonging to the VLAN. The policy circuit is configured to calculate a first data rate in proportion to the count. The first data rate is less than a total data rate of a physical network including the VLAN. The policy circuit is configured to update the first data rate in response to changes in the count. The policy circuit is configured to limit an aggregate data rate of the VLAN to the first data rate. The policy circuit is configured to update the limiting of the aggregate data rate of the VLAN in response to changes in the first data rate.Type: GrantFiled: July 15, 2013Date of Patent: August 25, 2015Assignee: Marvell International Ltd.Inventor: Nafea Bishara
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Patent number: 9065662Abstract: A network switch including a controller. The controller is configured to use a bridge table to bridge a first network and a second network. The network switch is configured to communicate with the first network and the second network. The controller is configured to determine whether an Ethernet packet received by the network switch from the first network or the second network is (i) an Internet Protocol (IP) multicast packet, or (ii) a media access control (MAC) multicast packet that does not encapsulate an IP multicast packet. The controller is configured to use the bridge table to route the Ethernet packet received by the network switch from the first network or the second network based on whether the Ethernet packet received by the network switch is (i) an Internet Protocol (IP) multicast packet, or (ii) a media access control (MAC) multicast packet that does not encapsulate an IP multicast packet.Type: GrantFiled: December 10, 2013Date of Patent: June 23, 2015Assignee: Marvell International LTD.Inventor: Nafea Bishara
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Patent number: 9065775Abstract: A network device comprises a plurality of physical ports and a packet processing pipeline. The packet processing pipeline is configured to assign a virtual port from a plurality of virtual ports to a packet received via one of the physical ports, wherein a quantity of the virtual ports is larger than a quantity of the physical ports, and wherein, for each of at least some of the physical ports, multiple virtual ports correspond to one physical port. The packet processing pipeline is also configured to assign a virtual domain from a plurality of virtual domains to the packet based on the assigned virtual port, and process the packet based on one or more of i) the assigned virtual port, ii) the assigned virtual domain, and iii) a header field of the packet, including determining zero, one, or more physical ports to which the packet is to be forwarded.Type: GrantFiled: January 6, 2014Date of Patent: June 23, 2015Assignee: Marvell World Trade Ltd.Inventors: Uri Safrai, David Melman, Tsahi Daniel, Nafea Bishara
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Patent number: 8923297Abstract: Methods and apparatus for managing packets in a packet switched network include, in at least one aspect, a device including: an input to receive a packet from one of a plurality of network devices, the plurality of network devices configured to communicate with one or more others of the network devices using a plurality of packets; and circuitry configured to control packet switching of the plurality of packets, at least one packet including: a switch tag including a tag portion embedded with switching information and an extended tag portion embedded with additional switching information, the switching information and the additional switching information configured to control a switching pattern associated with the at least one packet.Type: GrantFiled: March 8, 2012Date of Patent: December 30, 2014Assignee: Marvell International Ltd.Inventors: Tsahi Daniel, Donald Pannell, Nafea Bishara, Yuval Cohen
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Patent number: 8913617Abstract: A network device includes a first port configured to receive an incoming data packet. A memory stores the incoming data packet. A second port is configured to transmit outgoing packets. A packet processor is configured to generate a data structure, corresponding to the incoming data packet, that includes information based on a header portion of the incoming data packet and, in each of a plurality of processing operations, perform at least one processing task on the data packet using the data structure. The processing operations include adding to and/or subtracting from the information stored in the data structure, and preparing the data structure to be further modified in a subsequent processing operation. The packet processor is further configured to modify the header portion according to the data structure as modified at the plurality of processing operations and provide the stored data packet with the modified header portion to the second port.Type: GrantFiled: April 14, 2014Date of Patent: December 16, 2014Assignee: Marvell Israel (M.I.S.L.) Ltd.Inventors: Yaniv Kopelman, Nafea Bishara, Yariv Anafi
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Patent number: 8908499Abstract: A network switch including a plurality of stack units sequentially linked to each other. Each stack unit includes a port, a forwarding engine, a first interface, and a second interface. The second interface of each stack unit is linked to the first interface of a subsequent stack unit. The second interface of a last stack unit is linked to the first interface of a first stack unit. In response to a packet traveling in a first direction from the first stack unit to the last stack unit and a link between a second stack unit and a third stack unit being inoperative, the forwarding engine of the second stack unit returns the packet in a second direction to a preceding stack unit. The packet travels in the second direction from the preceding stack unit to the first stack unit, to the last stack unit, and to the third stack unit.Type: GrantFiled: March 24, 2014Date of Patent: December 9, 2014Assignees: Marvell International Ltd., Marvell Israel (M.I.S.L) Ltd.Inventors: Nafea Bishara, Tsahi Daniel, Amit Avivi
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Patent number: 8867359Abstract: A network device including a port and a processor. The port is configured to receive a packet. The packet includes a first transmit window size for a first communication session handled by the network device. The processor is configured to modify the first transmit window size based on i) a size of a buffer of the network device, and ii) a second transmit window size for a second communication session handled by the network device. The buffer is used to store packets received by the network device. The second communication session is different than the first communication session.Type: GrantFiled: November 12, 2013Date of Patent: October 21, 2014Assignee: Marvell International Ltd.Inventor: Nafea Bishara
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Patent number: 8830997Abstract: A network device including a processor having an internet protocol (IP) address, and a processor port configured to communicate exclusively with the processor. The network device also includes a plurality of network ports configured to communicate with network nodes external to the network device. In addition, the network device includes a forwarding engine configured to selectively transfer packets (i) among the plurality of network ports, and (ii) between the processor port and the plurality of network ports; receive a broadcast packet from one of the plurality of network ports, the broadcast packet including a target IP address; and forward the broadcast packet to the processor, via the processor port, only when both (i) the broadcast packet is a control packet, and (ii) the target IP address of the broadcast packet matches the IP address of processor.Type: GrantFiled: November 1, 2010Date of Patent: September 9, 2014Assignees: Marvell International Ltd., Marvell Israel (M.I.S.L) Ltd.Inventors: Nafea Bishara, Tsahi Daniel, David Melman, Nir Arad
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Patent number: 8824502Abstract: A network interface module includes a physical layer module and a data rate module. The physical layer module is configured to transmit first signals to a network device via a cable at a first data rate while conforming to Ethernet baseband characteristics for the first data rate, and at least one of determine a characteristic of the cable, or perform an autonegotiation process with the network device. The data rate module is configured to select a second data rate based on at least one of the characteristic of the cable, or results of the autonegotiation process. The second data rate is slower than the first data rate. The physical layer module is configured to transmit second signals to the network device at the second data rate while conforming to the Ethernet baseband characteristics for the first data rate.Type: GrantFiled: August 14, 2012Date of Patent: September 2, 2014Assignee: Marvell World Trade Ltd.Inventors: Ozdal Barkan, Nafea Bishara, William Lo
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Patent number: 8793511Abstract: A power sourcing equipment (PSE), a powered device (PD), and an approach for managing PoE power delivered from a PSE to a PD are described. Based on communication between the PD and the PSE, the PSE reduces the power made available to the PD in response to the PD entering an operational mode with reduced power requirements. Further, based on communication between the PD and the PSE, the PSE increases the power made available to the PD in response to the PD entering an operational mode with increased power requirements.Type: GrantFiled: March 12, 2010Date of Patent: July 29, 2014Assignee: Marvell International Ltd.Inventor: Nafea Bishara