Abstract: The present invention is based upon a camera management device coupled to a network camera via a network and the camera management device is provided with an image receiving unit that receives image data projected by the network camera and including control information for controlling the network camera from the network camera, a control information extracting unit that extracts the control information from the image data received by the image receiving unit and a control transmitting unit that transmits a control command according to the control information to the network camera via the network.

Abstract: In a semiconductor memory computer equipped with a flash memory, use of backed-up data is enabled. The semiconductor memory computer includes an address conversion table for detecting physical addresses of at least two pages storing data by designating a logical address from one of logical addresses to be designated by a reading request. The semiconductor memory computer includes a page status register for detecting one page status allocated to each page, and page statuses to be detected include the at least following four statuses: (1) a latest data storage status, (2) a not latest data storage status, (3) an invalid data storage status, and (4) an unwritten status. By using the address conversion table and the page status register, at least two data s (latest data and past data) can be read for one designated logical address from a host computer.

Abstract: A storage system is configured to perform the host write process including the following process (a1) and (a2), (a1) selecting W blocks (W is a natural number) from the multiple blocks, (a 2) writing the write target data in accordance with the write command, to the W next write destination pages which the W blocks include respectively. Each block selected at (a 1) process is a block whose next write destination page is the first kind page. Each block consists of multiple pages. The multiple pages are two or more first kind pages and two or more second kind pages. Each second kind page is the one with a lower write performance than that of each first kind page.

Abstract: In a semiconductor memory computer equipped with a flash memory, use of backed-up data is enabled. The semiconductor memory computer includes an address conversion table for detecting physical addresses of at least two pages storing data by designating a logical address from one of logical addresses to be designated by a reading request. The semiconductor memory computer includes a page status register for detecting one page status allocated to each page, and page statuses to be detected include the at least following four statuses: (1) a latest data storage status, (2) a not latest data storage status, (3) an invalid data storage status, and (4) an unwritten status. By using the address conversion table and the page status register, at least two data s (latest data and past data) can be read for one designated logical address from a host computer.

Abstract: According to this invention, a highly reliable memory device that uses up a life of a flash memory can be provided. The memory device is a nonvolatile memory device including a plurality of memory cells, in which: each of the plurality of memory cells is an FET which includes a floating gate; the plurality of memory cells are divided into a plurality of deletion blocks; and the nonvolatile memory device reads data stored in a first deletion block, detects and corrects an error contained in the read data, stores, when the number of bits of the detected error exceeds a threshold, the corrected data in a second deletion block, sets a smaller value as the threshold as an error frequency detected in the first deletion block is higher, and sets a smaller value as the threshold as the number of deletion times executed in the first deletion block is larger.

Abstract: An electronic device comprises an error correction coding device. The error correction coding device comprises a parity code generator. This generator is a circuit for computing a remainder polynomial by dividing a user data polynomial by a generator polynomial and generating a parity code from this remainder polynomial. This generator computes the remainder polynomial by dividing and inputting either a bit string comprising coefficients of the generator polynomial, or a bit string comprising coefficients of the generator polynomial and a bit string comprising coefficients of the generator polynomial, and dividing a minimal unit multiple times based on either a division width of the user polynomial or a division width of the user polynomial and the generator polynomial, and outputs a bit string comprising the coefficient of this remainder polynomial.

Abstract: According to this invention, a highly reliable memory device that uses up a life of a flash memory can be provided. The memory device is a nonvolatile memory device including a plurality of memory cells, in which: each of the plurality of memory cells is an FET which includes a floating gate; the plurality of memory cells are divided into a plurality of deletion blocks; and the nonvolatile memory device reads data stored in a first deletion block, detects and corrects an error contained in the read data, stores, when the number of bits of the detected error exceeds a threshold, the corrected data in a second deletion block, sets a smaller value as the threshold as an error frequency detected in the first deletion block is higher, and sets a smaller value as the threshold as the number of deletion times executed in the first deletion block is larger.

Abstract: The processing load when rewriting portions of compressed data is alleviated. A storage apparatus comprises a storage unit which stores data which is read/written by the host apparatus, a compression/expansion unit which compresses the data using a predetermined algorithm to generate compressed data, and expands the compressed data, and a control unit which controls writing of data to the storage unit, wherein the control unit manages, as compression block units, divided compressed data which is obtained by dividing compressed data compressed by the compression/expansion unit into predetermined units, and padding data.

Abstract: A monitoring camera control terminal and a monitoring camera apparatus respectively correspond to a plurality of protocols defining messages instructing a variety of settings and operations between the monitoring camera control terminal and the monitoring camera apparatus, and the monitoring camera control terminal uses a first protocol to request the monitoring camera apparatus for information related to the monitoring camera apparatus, receives the requested information from the monitoring camera apparatus, and if the requested information does not match the setting or operation information recorded in a storage part of the monitoring camera control terminal, changes the first protocol to a second protocol.

Abstract: Disclosed is a secure remote access system for improving convenience of a user by utilizing a storage device including an anti-tampering device as a user authentication device in the secure remote access system for making access and execution of job while a user is making the encrypted communication to a server from an unspecified client. Usability can be improved and thereby the job executing function can be used smoothly at the internal and external sides of the working office by providing a server client system where the server can be manipulated remotely by distributing a storage device loading the authorized anti-tampering device to users, connecting the storage device to unspecified clients by users, and using the authentication information and application stored in the storage device. A remote access system having improved security and convenient during usage of client from the user can also be provided by reducing the secret information remaining in the manipulated client.

Abstract: In a semiconductor memory computer equipped with a flash memory, use of backed-up data is enabled. The semiconductor memory computer includes an address conversion table for detecting physical addresses of at least two pages storing data by designating a logical address from one of logical addresses to be designated by a reading request. The semiconductor memory computer includes a page status register for detecting one page status allocated to each page, and page statuses to be detected include the at least following four statuses: (1) a latest data storage status, (2) a not latest data storage status, (3) an invalid data storage status, and (4) an unwritten status. By using the address conversion table and the page status register, at least two data (latest data and past data) can be read for one designated logical address from a host computer.

Abstract: An electronic device comprises an error correction coding device. The error correction coding device comprises a parity code generator. This generator is a circuit for computing a remainder polynomial by dividing a user data polynomial by a generator polynomial and generating a parity code from this remainder polynomial. This generator computes the remainder polynomial by dividing and inputting either a bit string comprising coefficients of the generator polynomial, or a bit string comprising coefficients of the generator polynomial and a bit string comprising coefficients of the generator polynomial, and dividing a minimal unit multiple times based on either a division width of the user polynomial or a division width of the user polynomial and the generator polynomial, and outputs a bit string comprising the coefficient of this remainder polynomial.

Abstract: In a semiconductor storage device, a memory controller divides each of blocks in each of chips into a first page set composed of pages and a second page set composed of pages, divides a logical address space into groups, and divides each group into lines. Block units are created each of which is obtained by assembling a predetermined number of blocks from the blocks in each chip. A predetermined number of block units from the block units are managed as standard block units, and the other block units are managed as spare block units. Each standard block unit is made to correspond to one group. The corresponding group data is stored in the pages in the first page set in each block constituting the standard block unit, and unwritten pages for recording update data for the group data are provided to be included in the second page set.

Abstract: In a semiconductor memory computer equipped with a flash memory, use of backed-up data is enabled. The semiconductor memory computer includes an address conversion table for detecting physical addresses of at least two pages storing data by designating a logical address from one of logical addresses to be designated by a reading request. The semiconductor memory computer includes a page status register for detecting one page status allocated to each page, and page statuses to be detected include the at least following four statuses: (1) a latest data storage status, (2) a not latest data storage status, (3) an invalid data storage status, and (4) an unwritten status. By using the address conversion table and the page status register, at least two data (latest data and past data) can be read for one designated logical address from a host computer.

Abstract: In a semiconductor memory computer equipped with a flash memory, use of backed-up data is enabled. The semiconductor memory computer includes an address conversion table for detecting physical addresses of at least two pages storing data by designating a logical address from one of logical addresses to be designated by a reading request. The semiconductor memory computer includes a page status register for detecting one page status allocated to each page, and page statuses to be detected include the at least following four statuses: (1) a latest data storage status, (2) a not latest data storage status, (3) an invalid data storage status, and (4) an unwritten status. By using the address conversion table and the page status register, at least two data s (latest data and past data) can be read for one designated logical address from a host computer.

Abstract: The present invention is based upon a camera management device coupled to a network camera via a network and the camera management device is provided with an image receiving unit that receives image data projected by the network camera and including control information for controlling the network camera from the network camera, a control information extracting unit that extracts the control information from the image data received by the image receiving unit and a control transmitting unit that transmits a control command according to the control information to the network camera via the network.

Abstract: Disclosed is a secure remote access system for improving convenience of a user by utilizing a storage device including an anti-tampering device as a user authentication device in the secure remote access system for making access and execution of job while a user is making the encrypted communication to a server from an unspecified client. Usability can be improved and thereby the job executing function can be used smoothly at the internal and external sides of the working office by providing a server client system where the server can be manipulated remotely by distributing a storage device loading the authorized anti-tampering device to users, connecting the storage device to unspecified clients by users, and using the authentication information and application stored in the storage device. A remote access system having improved security and convenient during usage of client from the user can also be provided by reducing the secret information remaining in the manipulated client.

Abstract: Provided is a storage system having a storage device including memory drives formed of the non-volatile memory, a group is constituted by the memory drives whose number is larger than the number of memory drives necessary to provide the memory capacity, the divided storage areas are managed in each of segments that includes at least one of the divided storage areas, the data storage area or the temporary storage area is allocated to the divided storage areas, upon receiving a data write request, the data storage area in which the write data is written and the segment are specified, the updated data is written in the temporary storage area included in the specified segment, the temporary storage area in which the data is written is set as a new data storage area, and data stored in the data storage area is erased and set as a new temporary storage area.

Abstract: Provided is a storage system capable of inhibiting the deterioration of its write performance. This storage system includes a flash memory, a cache memory, and a controller for controlling the reading, writing and deletion of data of the flash memory and the reading and writing of data of the cache memory, and detecting the generation of a defective block in the flash memory. When the controller detects the generation of a defective block in the flash memory, it migrates prescribed data stored in the flash memory to the cache memory and, even upon receiving from the host computer a command for updating the migrated data, disables the writing of data in the flash memory based on the command.

Abstract: A memory card has external interface terminals, an interface controller connected to each of the terminals, a rewritable nonvolatile memory connected to the interface controller, and a data processor connected to the interface controller. The interface controller can perform an operation based on another command supplied from the outside in parallel with the operations of transferring a command for a data process supplied from the outside to the data processor and operating it. The interface controller has plural buffers and, after completely inputting the command for a data process from an outside to a first buffer of the plural buffers, allows data related to the other command supplied from the outside to be inputted to a second buffer of the plural buffers. The memory card can receive a command data and data to be processed subsequently from the outside without the need of waiting for the completion of the communication process between the data processor and the interface controller.