Abstract: A memory device is provided which is connected to operate with power and clocks supplied from a host apparatus. The memory device includes external terminals, a flash memory chip to store data, an IC chip to process data; and a controller chip connected with the external terminals, the flash memory chip and the IC chip. The flash memory chip, the IC chip and the controller chip are discrete chips. The controller chip writes data inputted from the host apparatus into the flash memory chip or the IC chip and transfers data read from the flash memory chip or the IC chip to the host apparatus, based upon commands from the host apparatus.

Abstract: A memory card has: a flash memory chip for storing digital certificates and a seed of random numbers; a controller chip which can execute a managing process for managing the digital certificates and a random number generating process for generating the pseudo random numbers by using the seed of random numbers; and an IC card chip which can execute an authenticating process for authenticating personal identification information (PIN) inputted from a host apparatus and an encrypting process for encrypting the seed of random numbers. Thus, a processing time of security processes is reduced while assuring safety of the security processes.

Abstract: The size of a memory management unit in a low-performance non-volatile memory device is maintained, and the size of write data is compared with the size of the memory management unit. If the size of the write data is smaller than that of the memory management unit, the write data is cached by the high-performance non-volatile memory device; or if the size of the write data is not smaller, the write data is written to the low-performance device. Subsequently, a plurality of address values for the write data cached by the high-performance device are referred to; an address segment that is equal to the size of the memory management unit and in which the cached address values are consecutive; and data contained in that address segment is copied from the high-performance device to the low-performance device.

Abstract: Provided is a semiconductor memory system including a plurality of main memory chips and sub-memory chips as alternatives, in which each main memory chip includes a plurality of reserved memory blocks in the same chip as alternatives to an abnormal memory block. When it is detected that the number of the remaining reserved memory blocks unused as blocks to be reassigned has reached a first predetermined value in the main memory chip, the memory blocks in the sub-memory chip starts to be formatted. When the number of the remaining reserved memory blocks unused in the main memory chip reaches a second predetermined value, read/write with respect to the main memory chip is switched to the sub-memory chip, while bypassing the format process for the memory block in the sub-memory chip. Thus, in the semiconductor memory system including a main flash memory, an alternative flash memory, and a write cache memory, the capacity of a RAM for the write cache memory can be reduced.

Abstract: In a SIM card having a flash memory chip, a memory controller chip, and contact/contactless card interfaces, the memory controller chip has a function of executing user authentication of a host equipment, executes processing of data transmitted through the contactless IC card interface (executing reading or writing of data to the flash memory chip) using power supplied from the host equipment to the contact IC card interface, and executes initialization of the flash memory chip between activation of the host equipment and completion of user authentication instructed by the host equipment.

Abstract: According to this invention, a highly reliable memory device that uses up a life of a flash memory can be provided. The memory device is a nonvolatile memory device including a plurality of memory cells, in which: each of the plurality of memory cells is an FET which includes a floating gate; the plurality of memory cells are divided into a plurality of deletion blocks; and the nonvolatile memory device reads data stored in a first deletion block, detects and corrects an error contained in the read data, stores, when the number of bits of the detected error exceeds a threshold, the corrected data in a second deletion block, sets a smaller value as the threshold as an error frequency detected in the first deletion block is higher, and sets a smaller value as the threshold as the number of deletion times executed in the first deletion block is larger.

Abstract: In a semiconductor storage device, a memory controller divides each of blocks in each of chips into a first page set composed of pages and a second page set composed of pages, divides a logical address space into groups, and divides each group into lines. Block units are created each of which is obtained by assembling a predetermined number of blocks from the blocks in each chip. A predetermined number of block units from the block units are managed as standard block units, and the other block units are managed as spare block units. Each standard block unit is made to correspond to one group. The corresponding group data is stored in the pages in the first page set in each block constituting the standard block unit, and unwritten pages for recording update data for the group data are provided to be included in the second page set.

Abstract: A memory device is provided which is connected to operate with power and clocks supplied from a host apparatus. The memory device includes external terminals, a flash memory chip to store data, an IC chip to process data; and a controller chip connected with the external terminals, the flash memory chip and the IC chip. The flash memory chip, the IC chip and the controller chip are discrete chips. The controller chip writes data inputted from the host apparatus into the flash memory chip or the IC chip and transfers data read from the flash memory chip or the IC chip to the host apparatus, based upon commands from the host apparatus.

Abstract: In a memory card including an IC card chip which can store and execute an application program, a flash memory chip which can store confidential data relating to the application program, and a controller chip which is connected to the chips, the IC card chip performs verification of a host apparatus, and the controller chip permits transmission of the confidential data between the flash memory chip and the host apparatus when the host apparatus is authenticated through the verification.

Abstract: Provided is a storage system capable of inhibiting the deterioration of its write performance. This storage system includes a flash memory, a cache memory, and a controller for controlling the reading, writing and deletion of data of the flash memory and the reading and writing of data of the cache memory, and detecting the generation of a defective block in the flash memory. When the controller detects the generation of a defective block in the flash memory, it migrates prescribed data stored in the flash memory to the cache memory and, even upon receiving from the host computer a command for updating the migrated data, disables the writing of data in the flash memory based on the command.

Abstract: Provided is a storage system having a storage device including memory drives formed of the non-volatile memory, a group is constituted by the memory drives whose number is larger than the number of memory drives necessary to provide the memory capacity, the divided storage areas are managed in each of segments that includes at least one of the divided storage areas, the data storage area or the temporary storage area is allocated to the divided storage areas, upon receiving a data write request, the data storage area in which the write data is written and the segment are specified, the updated data is written in the temporary storage area included in the specified segment, the temporary storage area in which the data is written is set as a new data storage area, and data stored in the data storage area is erased and set as a new temporary storage area.

Abstract: A storage device allows expanding user utilizable applications by storing information permitted to be read according to a certificate and information permitted to be read according to information determined by a user. An information distributor receives a certificate from the storage device and after verifying the certificate, transmits data of a license and access control conditions to the storage device. After receiving data of a certificate from an information browser, verifying the certificate and imposing a limit on access based upon one of access control conditions, the storage device transmits data of the license and the other to the information browser. The information browser permits utilization of the license under the limitation defined by the access control condition. The certificate includes either or both of a certificate approved by a certificate authority and a PIN (personal identifying number) determined by the user.

Abstract: Disclosed is a secure remote access system for improving convenience of a user by utilizing a storage device including an anti-tampering device as a user authentication device in the secure remote access system for making access and execution of job while a user is making the encrypted communication to a server from an unspecified client. Usability can be improved and thereby the job executing function can be used smoothly at the internal and external sides of the working office by providing a server client system where the server can be manipulated remotely by distributing a storage device loading the authorized anti-tampering device to users, connecting the storage device to unspecified clients by users, and using the authentication information and application stored in the storage device. A remote access system having improved security and convenient during usage of client from the user can also be provided by reducing the secret information remaining in the manipulated client.

Abstract: In a semiconductor memory computer equipped with a flash memory, use of backed-up data is enabled. The semiconductor memory computer includes an address conversion table for detecting physical addresses of at least two pages storing data by designating a logical address from one of logical addresses to be designated by a reading request. The semiconductor memory computer includes a page status register for detecting one page status allocated to each page, and page statuses to be detected include the at least following four statuses: (1) a latest data storage status, (2) a not latest data storage status, (3) an invalid data storage status, and (4) an unwritten status. By using the address conversion table and the page status register, at least two data s (latest data and past data) can be read for one designated logical address from a host computer.

Abstract: Provided is a semiconductor memory system including a plurality of main memory chips and sub-memory chips as alternatives, in which each main memory chip includes a plurality of reserved memory blocks in the same chip as alternatives to an abnormal memory block. When it is detected that the number of the remaining reserved memory blocks unused as blocks to be reassigned has reached a first predetermined value in the main memory chip, the memory blocks in the sub-memory chip starts to be formatted. When the number of the remaining reserved memory blocks unused in the main memory chip reaches a second predetermined value, read/write with respect to the main memory chip is switched to the sub-memory chip, while bypassing the format process for the memory block in the sub-memory chip. Thus, in the semiconductor memory system including a main flash memory, an alternative flash memory, and a write cache memory, the capacity of a RAM for the write cache memory can be reduced.

Abstract: A memory card has: a flash memory chip for storing digital certificates and a seed of random numbers; a controller chip which can execute a managing process for managing the digital certificates and a random number generating process for generating the pseudo random numbers by using the seed of random numbers; and an IC card chip which can execute an authenticating process for authenticating personal identification information (PIN) inputted from a host apparatus and an encrypting process for encrypting the seed of random numbers. Thus, a processing time of security processes is reduced while assuring safety of the security processes.

Abstract: A memory device is provided which is connected to operate with power and clocks supplied from a host apparatus. The memory device includes external terminals, a flash memory chip to store data, an IC chip to process data; and a controller chip connected with the external terminals, the flash memory chip and the IC chip, wherein, the flash memory chip, the IC chip and the controller chip are discrete chips. The controller chip writes data inputted from the host apparatus into the flash memory chip or the IC chip and transfers data read from the flash memory chip or the IC chip to the host apparatus, based upon commands from the host apparatus.

Abstract: A storage device to store data includes an external interface, a controller, a nonvolatile memory, and an IC card. In response to a first indication from the external device, the controller receives a program to be executed in the IC card from the nonvolatile memory or the external device and writes the program in the IC card. In response to a second indication from the external device, the controller deletes the program written in the IC card.

Abstract: In a SIM card having a flash memory chip, a memory controller chip, and contact/contactless card interfaces, the memory controller chip has a function of executing user authentication of a host equipment, executes processing of data transmitted through the contactless IC card interface (executing reading or writing of data to the flash memory chip) using power supplied from the host equipment to the contact IC card interface, and executes initialization of the flash memory chip between activation of the host equipment and completion of user authentication instructed by the host equipment.

Abstract: In one aspect of the present invention, a memory device comprises an interface which interfaces with an external device, an IC chip which stores one or more application programs and executes the application programs, a memory which stores associated data associated with the one or more application programs, and a controller connected with the interface, the IC chip, and the memory. In response to a predetermined command received from the external device by way of the interface, the controller performs transfer of the associated data between the IC chip and the memory without passing the associated data to the host device during transfer of the associated data between the IC chip and the memory.