Patents by Inventor Nan Chen

Nan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230208299
    Abstract: A power converter having a smooth transition control mechanism is provided. An oscillator circuit outputs a clock signal. A control circuit receives the clock signal from the oscillator circuit and outputs a control signal based on the clock signal. A driver circuit outputs a high-side conduction signal and a low-side conduction signal according to the control signal. A high-side switch is turned on or off according to the high-side conduction signal from the driver circuit. A low-side switch is turned on or off according to the low-side conduction signal from the driver circuit. The oscillator circuit receives the high-side conduction signal from the driver circuit. The oscillator circuit, according to the high-side conduction signal, determines whether or not the clock signal outputted to the control circuit needs to be adjusted.
    Type: Application
    Filed: February 14, 2022
    Publication date: June 29, 2023
    Inventors: CHIEN-NAN CHEN, FU-CHUAN CHEN
  • Patent number: 11672788
    Abstract: The present disclosure generally relates to compounds class I HDAC inhibitors, their production and applications. The compounds possess epigenetic immunomodulatory activities in the tumor microenvironment (TME) and thus inhibit growth of tumor cells.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: June 13, 2023
    Assignee: Great Novel Therapeutics Biotech & Medicals Corporation
    Inventors: Jia-Shiong Chen, Mu-Hsuan Yang, Yi-Hong Wu, Sz-Hao Chu, Cheng-Han Chou, Ye-Su Chao, Chia-Nan Chen
  • Patent number: 11675856
    Abstract: Content for products can be identified. For each identified content, at least one class to which the first content pertains can be predicted using an artificial intelligence multiclass model. For each identified first content that corresponds to the at least one class, a support level of the product with regard to at least one class can be predicted using artificial intelligence binary class models. For each identified product, data indicating the product and the support level of the product with regard to the at least one class can be added to a data table. A product features map based on the data indicating the products and a support level of each product with regard to the at least one class can be generated and output.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: June 13, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: June-Ray Lin, Nan Chen, Ju Ling Liu, Li Na Wang, Shun Xian Wu
  • Patent number: 11664411
    Abstract: A semiconductor structure includes: a substrate; a first passivation layer over the substrate; a second passivation layer over the first passivation layer; and a magnetic core in the second passivation layer, wherein the magnetic core includes a first magnetic material layer and a second magnetic material layer over the first magnetic material layer, the first magnetic material layer and the second magnetic material layer are separated by a high resistance isolation layer, and the high resistance isolation layer has a resistivity greater than about 1.3 ohm-cm.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: May 30, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ming-Che Lee, Sheng-Chau Chen, I-Nan Chen, Cheng-Hsien Chou, Cheng-Yuan Tsai
  • Publication number: 20230153977
    Abstract: An array checker (AC) is described. The array checker may include software configured to implement a method. By implementing the method, the array checker may detect a location of a defect and then compensate for a shift in the defect. In particular, the method may include generating one or more reference lines in a panel. The reference lines may include a location which is known prior to generating an image of the panel. The array checker may then capture an image of the panel. The image may be captured by voltage imaging. The image may include the defect and the one or more reference lines. The method may then include calculating an offset of the reference line from the known location. The offset may then be applied to the defect location for compensating the shift in the defect.
    Type: Application
    Filed: September 28, 2022
    Publication date: May 18, 2023
    Inventors: Nai-Wei Chen, Yueh-Nan Chen, Chih-Chang Lai, Gwan Sub Lee, Jongho Lee
  • Patent number: 11643743
    Abstract: Embodiments of methods and apparatuses for forming the metal oxide nanostructure on surfaces are disclosed. In certain embodiments, the nanostructures can be formed on a substrate made of a nickel titanium alloy, resulting in a nanostructure that can include both titanium oxide and nickel oxide. The nanostructure can be formed on the surface(s) of an implantable medical device, such as a stent.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: May 9, 2023
    Assignee: ALFRED E. MANN INSTITUTE FOR BIOMEDICAL ENGINEERING AT THE UNIVERSITY OF SOUTHERN CALIFORNIA
    Inventors: David Alvin Tyvoll, Bharat Kumar Menon, Nan Chen, Heather Michelle Grandin, Harald Nuhn, Jenna Brynne Lubet
  • Patent number: 11645032
    Abstract: Embodiments of the invention are directed to a computer-implemented method of operating a multi-screen virtual reality environment. The computer-implemented method includes performing a wall arrangement and transmission (WA&T) protocol that includes receiving at a second module a function transmitted by a first module over a network to the second module. The second module and the function received over the network are used to generate priority data that identifies a priority of each of a plurality of individual video streams generated by a plurality of video sources. Based at least in part on the priority, the second module is used to generate reduced-size video streams that include selected ones of the plurality of individual video streams. The second module transmits the priority data and a multi-screen video stream that includes the reduced-size video streams and non-reduced-size video streams of the plurality of individual video streams.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: May 9, 2023
    Assignee: International Business Machines Corporation
    Inventors: June-Ray Lin, Li Na Wang, Ju Ling Liu, Ye Chuan Wang, Nan Chen, Yu Zhu
  • Patent number: 11631886
    Abstract: The present disclosure relates to an ionic liquid-based quasi-solid-state electrolyte in a lithium battery and a preparation method thereof. The quasi-solid-state electrolyte is of a porous network structure, which is obtained by a condensation reaction of a lithium salt, ionic liquid, a silane coupling agent and a catalyst, and has a high ionic conductivity. The quasi-solid-state electrolyte can stabilize a stripping/deposition process of lithium metal and inhibit growth of lithium dendrites, and shows a low overpotential and long-term cycle stability in a constant current polarization process. The interface impedance of a lithium metal sheet and the quasi-solid-state electrolyte is low, and is hardly increased with the age of the battery.
    Type: Grant
    Filed: December 1, 2019
    Date of Patent: April 18, 2023
    Assignee: BEIJING INSTITUTE OF TECHNOLOGY
    Inventors: Renjie Chen, Nan Chen, Feng Wu, Lili Wang, Yujuan Dai
  • Publication number: 20230106533
    Abstract: A process of overlay offset measurement includes providing a substrate; forming a first pattern layer with a predetermined first pattern on the substrate; forming a first photoresist layer on the substrate and the first pattern layer; forming a second photoresist layer on the first photoresist layer; forming a second pattern layer with a predetermined second pattern on the second photoresist layer; patterning the second photoresist layer to form a trench having a predetermined third pattern being substantially aligned with the predetermined first pattern of the first pattern layer; and performing overlay offset measurement according to the second pattern layer and the trench.
    Type: Application
    Filed: December 9, 2022
    Publication date: April 6, 2023
    Inventors: Ya-Jing Yang, Po Nan Chen, Yu-Jui Hsieh
  • Publication number: 20230097129
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer and a second spacer around the gate structure; forming a recess adjacent to two sides of the second spacer; performing a cleaning process to trim the second spacer for forming a void between the first spacer and the substrate; and forming an epitaxial layer in the recess.
    Type: Application
    Filed: December 1, 2022
    Publication date: March 30, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Patent number: 11608565
    Abstract: Embodiments of nanostructures comprising metal oxide and methods for forming the nanostructure on surfaces are disclosed. In certain embodiments, the nanostructures can be formed on a substrate made of a nickel titanium alloy, resulting in a nanostructure containing both titanium oxide and nickel oxide. The nanostructure can include a lattice layer disposed on top of a nanotube layer. The distal surface of the lattice layer can have a titanium oxide to nickel oxide ratio of greater than 10:1, or about 17:1, resulting in a nanostructure that promotes human endothelial cell migration and proliferation at the interface between the lattice layer and human cells or tissue. The nanostructure may be formed on the outer surface of an implantable medical device, such a stent or an orthopedic implant (e.g. knee implant, bone screw, or bone staple).
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: March 21, 2023
    Assignee: Alfred E. Mann Institute for Biomedical Engineering at the University of Southern California
    Inventors: David Alvin Tyvoll, Nan Chen, Bharat Kumar Menon, Heather Michelle Grandin, Cesar Escobar Blanco
  • Patent number: 11599733
    Abstract: Methods, systems, computer program products for Program Integrated Information (PII) translation management of an application are provided. The method, according to an embodiment of the present invention, PII translation corresponding to the application of a base version is determined as PII translation of a base version by one or more processing units, and then differences between PII translation corresponding to the application of a subsequent version and PII translation of the base version is determined as PII translation of a subsequent version. Then, in a data structure, it is recorded with PII translation of the base version as a starting node of the data structure and PII translation of the subsequent version as a subsequent node of the starting node, wherein nodes in the data structure are correlated to and accessible to the application of corresponding versions.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: March 7, 2023
    Assignee: International Business Machines Corporation
    Inventors: Li Bo Zhang, Jin Zhang, Nan Chen, Ju Ling Liu, Xin Peng Liu
  • Publication number: 20230049869
    Abstract: A positioning fixture including a shielding member and a driving member is provided. The shielding member includes a sliding part slidably connected to a functional module, a guiding part, and a shielding part. The sliding part and the shielding part respectively extend from two opposite ends of the guiding part. The driving member is movably disposed on the functional module corresponding to the shielding member. The driving member includes a base part, a driving part that contacts the guiding part, and a pillar part, which protrudes from the base part and is adapted to pass through the guiding groove. When the functional module is positioned on the circuit board, the base part of the driving member is pushed by the electronic component, and the guiding part is pushed by the driving part, so that the shielding member slides and the shielding part shields a screw hole of the circuit board.
    Type: Application
    Filed: June 16, 2022
    Publication date: February 16, 2023
    Applicant: PEGATRON CORPORATION
    Inventors: Chun-Nan Chen, Ming-Te Lin, Chi-Ming Tsai
  • Patent number: 11579447
    Abstract: A head-up display capable of adjusting an imaging position is provided. The head-up display includes an image generation module, a reflector, a holographic diffraction optical element and a control unit. The image generation module is configured to display and project an image. The reflector is configured to reflect the image and further project the image on a transparent screen through the reflector. The holographic diffraction optical element is disposed on the transparent screen to reflect the image to a visible range of the user's eyes. The control unit is coupled to the reflector or the transparent screen to adjust the viewing angle of the holographic diffraction optical element having a pre-determined angle with the reflector.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: February 14, 2023
    Inventors: Yu-Chih Lin, Tzu-Nan Chen, Ming-Ping Lai
  • Patent number: 11581353
    Abstract: A process of overlay offset measurement includes providing a substrate; forming a first pattern layer with a predetermined first pattern on the substrate; forming a first photoresist layer on the substrate and the first pattern layer; forming a second photoresist layer on the first photoresist layer; forming a second pattern layer with a predetermined second pattern on the second photoresist layer; patterning the second photoresist layer to form a trench having a predetermined third pattern being substantially aligned with the predetermined first pattern of the first pattern layer; and performing overlay offset measurement according to the second pattern layer and the trench.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: February 14, 2023
    Assignee: Himax Technologies Limited
    Inventors: Ya-Jing Yang, Po Nan Chen, Yu-Jui Hsieh
  • Publication number: 20230045752
    Abstract: A system and method for cooling electronic equipment having a power supply unit separate from the equipment, sprayers that spray a dielectric liquid coolant on the top of the equipment lengthwise along one or more fins of one or more heat sinks on the equipment, a reservoir, connectors, and pumps for pumping the liquid coolant from the reservoir and through the sprayer, and an external housing.
    Type: Application
    Filed: August 4, 2022
    Publication date: February 9, 2023
    Inventors: Nan Chen, He Zhao, Yunshui Chen
  • Publication number: 20230031883
    Abstract: A dynamic random access memory (DRAM) and its manufacturing method are provided. The DRAM includes bit line contact structures, bit line structures, first insulating structures, a capacitor contact structure, a first connecting pad, a second insulating structure, and a capacitor structure. The bit line structure extends along a first direction. The first insulating structure extends along a second direction that intersects the first direction. The capacitor contact structure is located between two of the bit lines and two of the first insulating structures. The first connecting pad is formed on the capacitor contact structure. The second insulating structure surrounds the first connecting pad, in which the top width of the second insulating structure is greater than the bottom width thereof.
    Type: Application
    Filed: July 29, 2021
    Publication date: February 2, 2023
    Inventor: Huang-Nan CHEN
  • Publication number: 20230027621
    Abstract: A stretchable electronic device includes a substrate, a plurality of electronic elements, and a conductive wiring. The electronic elements and the conductive wiring are disposed on the substrate, and the conductive wiring is electrically connected to the electronic elements. The conductive wiring is formed by stacking an elastic conductive layer and a non-elastic conductive layer. A fracture strain of the elastic conductive layer is greater than a fracture strain of the non-elastic conductive layer, and the non-elastic conductive layer includes a plurality of first fragments which are separated from one another.
    Type: Application
    Filed: October 6, 2022
    Publication date: January 26, 2023
    Applicant: AUO Corporation
    Inventors: Tsung-Ying Ke, Chun-Nan Chen, Zih-Shuo Huang
  • Publication number: 20230013390
    Abstract: A detection apparatus and an anti-bending device thereof are provided. The detection apparatus includes a probe card circuit board, at least one probe, and the anti-bending device. The probe card circuit board has a first board surface and a second board surface on opposite sides thereof The at least one probe is mounted on the first board surface. The anti-bending device includes an anti-bending frame, at least one sensor, a processing circuit, and a transmission part. The anti-bending frame is mounted on the second board surface of the probe card circuit board, and the at least one sensor is disposed on the anti-bending frame or the probe card circuit board. The processing circuit is disposed inside the anti-bending frame. The transmission part is mounted on the anti-bending frame, and is electrically coupled to the processing circuit.
    Type: Application
    Filed: February 24, 2022
    Publication date: January 19, 2023
    Inventor: CHEN-NAN CHEN
  • Patent number: D977319
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: February 7, 2023
    Assignee: 4D BIOS Co., Ltd.
    Inventor: Nan Chen