Patents by Inventor Naoki Kimura
Naoki Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9612761Abstract: According to one embodiment, a semiconductor device includes a nonvolatile memory, a volatile memory, and a controller. The controller is configured to transition a part of the volatile memory to a self-refresh mode when a request for stopping supplying of power to the nonvolatile memory is received.Type: GrantFiled: January 29, 2016Date of Patent: April 4, 2017Assignee: KABUSHIKI KAISHA TOSHIBAInventor: Naoki Kimura
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Publication number: 20170092635Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.Type: ApplicationFiled: December 14, 2016Publication date: March 30, 2017Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hayato MASUBUCHI, Naoki KIMURA, Manabu MATSUMOTO, Toyota MORIMOTO
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Publication number: 20170075403Abstract: A semiconductor device includes a substrate having a serial advanced technology attachment (SATA) connector that has a plurality of power supply terminals and a plurality of signal terminals, a nonvolatile semiconductor memory unit disposed on the substrate, and a memory control circuit disposed on the substrate, configured to control the nonvolatile semiconductor memory unit, and having a data input terminal connected to a first power supply terminal of the SATA connector and a data output terminal connected to a second power supply terminal of the SATA connector. A serial signal of input data is transmitted from the first power supply terminal to the data input terminal, and a serial signal of output data is transmitted from the data output terminal to the second power supply terminal.Type: ApplicationFiled: March 4, 2016Publication date: March 16, 2017Inventor: Naoki KIMURA
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Publication number: 20170064833Abstract: According to one embodiment, an electronic device includes a substrate including a first face, a plurality of first conductors on the first face, a plurality of second conductors on the first face, and a first electronic component mounted on the first face, and including a first terminal connected to the plurality of first conductors, and a second terminal connected to the plurality of second conductors.Type: ApplicationFiled: March 1, 2016Publication date: March 2, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Naoki KIMURA, Tatsuro HIRUTA
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Patent number: 9543579Abstract: A lithium ion secondary battery includes: a positive electrode including a positive electrode active material; a negative electrode formed by coating a negative electrode active material mixture onto a surface of a negative electrode collector, the negative electrode active material mixture including a negative electrode active material, a conductive additive, and a binder; a separator interposed between the positive electrode and the negative electrode; and an electrolyte, in which the negative electrode active material includes graphite and an Si alloy, inequities of 0.43?x?9.0 and 8?y<18 are satisfied when a mass ratio of the graphite and the Si alloy is defined as x and a coating amount of the negative electrode active material mixture is defined as y (mg/cm2). Thus, an initial capacity thereof can be increased and a capacity retention rate thereof can be improved in the lithium ion secondary battery which includes the Si alloy in the negative electrode.Type: GrantFiled: June 16, 2015Date of Patent: January 10, 2017Assignee: Hitachi, Ltd.Inventors: Eiji Seki, Naoki Kimura, Seogchul Shin
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Publication number: 20160372159Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.Type: ApplicationFiled: September 1, 2016Publication date: December 22, 2016Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hayato MASUBUCHI, Naoki KIMURA, Manabu MATSUMOTO, Toyota MORIMOTO
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Publication number: 20160351232Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: ApplicationFiled: August 12, 2016Publication date: December 1, 2016Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Masato SUGITA, Naoki Kimura, Daisuke Kimura
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Patent number: 9449654Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: GrantFiled: July 10, 2014Date of Patent: September 20, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Masato Sugita, Naoki Kimura, Daisuke Kimura
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Patent number: 9437533Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.Type: GrantFiled: October 10, 2014Date of Patent: September 6, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Hayato Masubuchi, Naoki Kimura, Manabu Matsumoto, Toyota Morimoto
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Patent number: 9399854Abstract: A work vehicle cab includes a floor, a ceiling, a left supporting member, a right supporting member, a front panel, a front panel reinforcement member, a front-left pillar, and a front-right pillar. The ceiling is arranged above the floor. The left supporting member extends upward from the front section of the floor. The right supporting member extends upward from the front section of the floor. The front panel is arranged between the left supporting member and the right supporting member. The front panel reinforcement member, arranged above the front panel, extends in a left-right direction and connects the left supporting member and the right supporting member. The front-left pillar extends from the front section of the ceiling to the front panel reinforcement member. The front-right pillar extends from the front section of the ceiling to the front panel reinforcement member.Type: GrantFiled: March 28, 2014Date of Patent: July 26, 2016Assignee: KOMATSU LTD.Inventors: Masato Kitashou, Makoto Yomogita, Naoki Kimura, Masahiko Hamaguchi, Junichi Suneya, Takanori Yamahata
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Patent number: 9373363Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: GrantFiled: June 5, 2015Date of Patent: June 21, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Masato Sugita, Naoki Kimura, Daisuke Kimura
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Publication number: 20160156025Abstract: A lithium ion secondary battery having a negative electrode includes a negative electrode active material containing at least one of two material of silicon and a silicon compound and carbon, a weight mixing ratio of at least one of two material of the silicon and the silicon compound and the carbon is 20:80 to 50:50, when D90 of particles of at least one of two material of the silicon and the silicon compound is x, D50 of particles of the carbon is y, and the weight mixing ratio of the carbon is z, y??1.17x+0.45z is satisfied, the x is between 2 ?m and 10 ?m, the y is between 10 ?m and 23 ?m, and the z is between 50% and 80% by weight, and a coefficient of expansion when the negative electrode is fully charged is 110% or more and 140% or less.Type: ApplicationFiled: November 25, 2015Publication date: June 2, 2016Applicant: HITACHI, LTD.Inventors: Seogchul SHIN, Naoki KIMURA, Eiji SEKI
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Publication number: 20160147473Abstract: According to one embodiment, a semiconductor device includes a nonvolatile memory, a volatile memory, and a controller. The controller is configured to transition a part of the volatile memory to a self-refresh mode when a request for stopping supplying of power to the nonvolatile memory is received.Type: ApplicationFiled: January 29, 2016Publication date: May 26, 2016Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Naoki KIMURA
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Patent number: 9312215Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.Type: GrantFiled: July 7, 2014Date of Patent: April 12, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Hayato Masubuchi, Naoki Kimura, Manabu Matsumoto, Toyota Morimoto
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Publication number: 20160077561Abstract: According to one embodiment, a memory system includes a volatile memory, a power supply circuit, and a controller. The power supply circuit includes a first power supply path in which power supplied from a host device is supplied to the volatile memory, a second, power supply path in which the power is supplied from the internal power supply to the volatile memory, and a switching device that switches between the first power supply path and the second power supply path. In response to an instruction for a transition to a low power consumption mode received from the host device, the controller outputs, to the switching device, an instruction to switch the power supply circuit from the first power supply path to the second power supply path.Type: ApplicationFiled: February 26, 2015Publication date: March 17, 2016Applicant: Kabushiki Kaisha ToshibaInventor: Naoki KIMURA
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Patent number: 9286985Abstract: According to one embodiment, a semiconductor device includes a nonvolatile memory, a volatile memory, and a controller. The controller is configured to transition a part of the volatile memory to a self-refresh mode when a request for stopping supplying of power to the nonvolatile memory is received.Type: GrantFiled: June 25, 2013Date of Patent: March 15, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventor: Naoki Kimura
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Patent number: 9284716Abstract: A box section of a cab is detachable in a motor grader. The motor grader is provided with a bracket and a first controller. The bracket is attachable to a floor section. The first controller is attachable in a selective manner to the box section and the bracket and controls equipment required for travel.Type: GrantFiled: May 8, 2013Date of Patent: March 15, 2016Assignee: KOMATSU LTD.Inventors: Naoki Kimura, Masahiko Hamaguchi, Takanori Yamahata, Shu Ishida, Hidenori Tatsuta
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Publication number: 20160072125Abstract: A lithium-ion secondary battery of the present invention contains: a laminated electrode group formed of a rectangular positive electrode; a rectangular negative electrode; and a separator. In such a laminated electrode group, the positive electrode includes a positive electrode current collector foil, and a positive electrode mixture layer containing a positive electrode active material, the negative electrode includes a negative electrode current collector foil, and a negative electrode mixture layer containing a negative electrode active material. The negative electrode active material includes a silicon-based material, and a carbonaceous material. A mass ratio of the silicon-based material and the carbonaceous material is 20:80 to 80:20. The silicon-based material is a Si alloy or SiOx (0.5?x?1.5). The positive electrode and the negative electrode have a collection terminal protruding from a same side of the laminated electrode group.Type: ApplicationFiled: August 19, 2015Publication date: March 10, 2016Applicant: HITACHI, LTD.Inventors: Naoki KIMURA, Eiji SEKI
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Patent number: 9273447Abstract: A duct connected to an air-conditioning apparatus includes a portion positioned closer to a side window than a console when viewed from above. A tray is arranged on the console on a side close to the side window, and covers an area above the duct. A lower end of the side window is positioned lower than an upper end of the console positioned on the side close to the side window in terms of height from a floor surface. The tray is positioned on or below an imaginary straight line A-A connecting the upper end to the lower end of the side window, and is not positioned above imaginary straight line A-A. Accordingly, high visibility can be ensured in an obliquely downward direction lateral to an operator while a satisfactory aesthetic appearance of indoor space in a cab is maintained.Type: GrantFiled: March 26, 2013Date of Patent: March 1, 2016Assignee: KOMATSU LTD.Inventors: Naoki Kimura, Motoo Furukawa, Takanori Yamahata, Masahiko Hamaguchi
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Publication number: 20160013484Abstract: A lithium ion secondary battery includes: a positive electrode including a positive electrode active material; a negative electrode formed by coating a negative electrode active material mixture onto a surface of a negative electrode collector, the negative electrode active material mixture including a negative electrode active material, a conductive additive, and a binder; a separator interposed between the positive electrode and the negative electrode; and an electrolyte, in which the negative electrode active material includes graphite and an Si alloy, inequities of 0.43?x?9.0 and 8?y<18 are satisfied when a mass ratio of the graphite and the Si alloy is defined as x and a coating amount of the negative electrode active material mixture is defined as y (mg/cm2). Thus, an initial capacity thereof can be increased and a capacity retention rate thereof can be improved in the lithium ion secondary battery which includes the Si alloy in the negative electrode.Type: ApplicationFiled: June 16, 2015Publication date: January 14, 2016Applicant: Hitachi, Ltd.Inventors: Eiji SEKI, Naoki KIMURA, Seogchul SHIN