Patents by Inventor Naoki Matsuoka

Naoki Matsuoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020099900
    Abstract: The packet switch performs a scheduling process by selecting a unicast packet or a multicast packet to be output from each of N input buffers such that input lines and output lines cannot conflict each other for a unicast packet, and such that the input lines cannot conflict each other for the multicast packet.
    Type: Application
    Filed: August 31, 2001
    Publication date: July 25, 2002
    Inventors: Kenichi Kawarai, Hiroshi Tomonaga, Naoki Matsuoka, Masakatsu Nagata, Tsuguo Kato, Tetsuaki Wakabayashi
  • Publication number: 20020080796
    Abstract: A packet switch which can cyclically use &agr; scheduling process results to determine one of M output lines as a destination of a packet stored in each of N input buffer sections by &agr; scheduler sections independently performing scheduling processes is disclosed.
    Type: Application
    Filed: August 31, 2001
    Publication date: June 27, 2002
    Inventors: Naoki Matsuoka, Hiroshi Tomonaga, Kenichi Kawarai, Masakatsu Nagata
  • Publication number: 20020031092
    Abstract: A switching apparatus that is used for high-speed large-capacity routing and a communication apparatus and communication system that are used for an efficient recursive multicast. A matrix switch performs self-routing on a packet on the basis of a tag including output route information set in the packet. Selectors are located so as to correspond to N output ports P#1 through P#N of the matrix switch and perform N-to-one selection control. Setting registers hold selection information used by the selectors to select a signal.
    Type: Application
    Filed: August 29, 2001
    Publication date: March 14, 2002
    Inventors: Tetsuaki Wakabayashi, Kenichi Okabe, Shiro Uriu, Hiroshi Tomonaga, Naoki Matsuoka
  • Publication number: 20020024949
    Abstract: Packets input from input HWs #0 to #3 to a packet switch device are buried in time slots A through D. The packet switch device alternately switches the input packets in units of time slots, and inputs the packets to two 4×4 switches. The 4×4 switches make normal switching, and distribute the packets to respective output ports. Then, the packets output from the two 4×4 switches after being switched are alternately multiplexed, and output to output HWs #0 through #3. By making switching in units of packets as described above, a process overhead is prevented from being increased, and also expansion can be easily made. Besides, hardware scale can be made small.
    Type: Application
    Filed: March 13, 2001
    Publication date: February 28, 2002
    Inventors: Hiroshi Tomonaga, Masakatsu Nagata, Kenichi Kawarai, Naoki Matsuoka, Kenichi Okabe, Shiro Uriu
  • Publication number: 20020009082
    Abstract: A buffer unit fragments variable-length packets into fixed-length packets for processing in units of fixed-length packets. The buffer unit includes a fixed-length packet storing section for storing the fixed-length packets for each of output paths, a multicasting processor for storing multicasting packets having a plurality of destinations and transferring the multicasting packets to the fixed-length packet storing section depending on the plurality of destinations, and a controller for monitoring a storage state of the fixed-length packet storing section and carrying out a control so that the multicasting packets are transferred within a variable-length packet formed by a plurality of fixed-length packets.
    Type: Application
    Filed: March 26, 2001
    Publication date: January 24, 2002
    Inventors: Naoki Matsuoka, Hiroshi Tomonaga, Kenichi Kawarai
  • Publication number: 20010033581
    Abstract: To achieve QoS control, drop control and multicast control of a variable-length packet at high speed in small scale hardware, a packet divider divides a variable-length packet into fixed-length packets, and an input buffer section stores the divided fixed-length packets into queues by output lines and by QoS classes. A large number of QoS classes are mapped into only two kinds of classes including a guaranteed bandwidth class for which an assigned bandwidth is guaranteed and a best effort class for which a surplus bandwidth is allocated, thereby to achieve scheduling at the input side by an inter-line scheduler. An output buffer section assembles a variable-length packet from fixed-length packets that have been obtained by switching at a switch section in an output buffer section. A QoS control is performed based on a packet length.
    Type: Application
    Filed: March 20, 2001
    Publication date: October 25, 2001
    Inventors: Kenichi Kawarai, Hiroshi Tomonaga, Naoki Matsuoka, Tsuguo Kato
  • Publication number: 20010021451
    Abstract: A pressure-sensitive adhesive composition, wherein the storage elastic modulus [G′] at room temperature is at least 2×106 dyne/cm2 and the adhesive strength at room temperature is 1 kg/20 mm width or higher.
    Type: Application
    Filed: January 31, 2001
    Publication date: September 13, 2001
    Inventors: Yasuyuki Tokunaga, Masahiko Ando, Takeshi Yamanaka, Waka Hikosaka, Makoto Kojima, Shin-Ichi Kouno, Hiroaki Mashiko, Hiroshi Wada, Hiroshi Yamamoto, Yoshikazu Soeda, Naoki Matsuoka, Katsuya Kume, Mitsuo Kuramoto
  • Publication number: 20010007562
    Abstract: A packet switch device having a plurality of input buffers; a packet switch; a plurality of schedulers, having a pipeline scheduling process module wherein a plurality of time units corresponding to the number of output lines is spent in scheduled sending process of the fixed length packets from the input buffer, and wherein the scheduled sending process is executed in a number of processes, in parallel, the number of processes corresponding to the number of the input lines, having a sending status management module wherein sending status of the fixed length packets which constitute one frame is managed for each of the input lines, and provided corresponding to any of the output lines; and at least one result notification module for notifying the input buffer of result information from the scheduled sending process performed by each of the plurality of schedulers.
    Type: Application
    Filed: January 12, 2001
    Publication date: July 12, 2001
    Applicant: Fujitsu Limited
    Inventors: Naoki Matsuoka, Hiroshi Tomonaga, Kenichi Kawarai
  • Patent number: 6218006
    Abstract: A pressure-sensitive adhesive composition, wherein the storage elastic modulus [G′] at room temperature is at least 2×106 dyne/cm2 and the adhesive strength at room temperature is 1 kg/20 mm width or higher. Preferably, a pressure-sensitive adhesive composition comprising a polymer having a polycarbonate structure having a repeating unit represented by the following formula wherein R represents a straight chain or branched hydrocarbon group having from 2 to 20 carbon atoms, a pressure-sensitive adhesive sheet, a sealing material, a reinforcing sheet, and a pressure-sensitive sheet for printing, each having the pressure-sensitive adhesive composition.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: April 17, 2001
    Assignee: Nitto Denko Corporation
    Inventors: Yasuyuki Tokunaga, Masahiko Ando, Takeshi Yamanaka, Waka Hikosaka, Makoto Kojima, Shin-ichi Kouno, Hiroaki Mashiko, Hiroshi Wada, Hiroshi Yamamoto, Yoshikazu Soeda, Naoki Matsuoka, Katsuya Kume, Mitsuo Kuramoto
  • Patent number: 6072394
    Abstract: The present invention provides a resonance circuit tag that comprises an insulating substrate and a resonance circuit formed on the substrate. Additionally, the resonance circuit contains at least a capacitor and an inductor. Further, a dielectric of the capacitor satisfies at least either being foamable by heating or being capable of changing its thickness by not less than 10% by heating. The resonance circuit of the present invention also provides various advantages in that it can easily cease functioning, it does not inhibit labor-saving and speedy operation at the cash register, it facilitates large-scale production, and it eliminates degradation of the function of the article to which the tag has been attached.
    Type: Grant
    Filed: February 29, 1996
    Date of Patent: June 6, 2000
    Assignee: Nitto Denko Corporation
    Inventors: Yoshitsugu Hasegawa, Hiroshi Yamamoto, Hiroshi Wada, Toshiharu Konishi, Naoki Matsuoka
  • Patent number: 5898357
    Abstract: A fuse comprising: a fusible portion constituted by a connection portion which is formed of the same metal base material as a pair of terminals so as to connect the pain of terminals to each other, and a low-melting metal having a melting point lower than that of the connection portion and stacked by welding on at least a portion of the connection portion; and at least one protrusion formed on the fusible portion by making the connection portion and the low-melting metal project in a direction parallel to the plane of an interface between the connection portion and the low-melting metal. Further disclosed is a method of manufacturing the fuse. The fuse can be manufactured with a simple manufacturing process in comparison with a conventional method, and in the fuse, only the fusing-off time in a layer short-circuit range can be shortened by use of diffusion between the low-melting metal and base material.
    Type: Grant
    Filed: December 9, 1997
    Date of Patent: April 27, 1999
    Assignee: Yazaki Corporation
    Inventors: Takayoshi Endo, Takashi Ishii, Naoki Matsuoka
  • Patent number: 5883562
    Abstract: There is disclosed an arcless fuse in which adverse effects on an equipment due to an arc discharge, produced when the fuse is melted, are prevented, and also melted metal is prevented from dissipating. An arcless fuse includes a fuse element 25 having opposite ends connected respectively to a pair of terminals 23 and 23, the fuse element being in the form of one of a wire and a strip. A part of the fuse element 25 intermediate the opposite ends thereof is formed into such a non-linear configuration that a plurality of portions are arranged in closely spaced relation to one another, and the fuse element 25 is molded in a housing 27 of a synthetic resin. Preferably, an amorphous resin is used as the synthetic resin molding the fuse element 25 therein.
    Type: Grant
    Filed: October 20, 1997
    Date of Patent: March 16, 1999
    Assignee: Yazaki Corporation
    Inventors: Naoki Matsuoka, Kenji Muramatsu
  • Patent number: 5883561
    Abstract: A secondary short preventing mechanism of a fuse is constituted by a pair of female terminal members in which male terminal receiving portions are formed at their longitudinally one ends respectively so that the male terminal receiving portions are to be engaged with and electrically connected to male terminal portions, and a fuse fusing portion is formed between their longitudinally other ends connected to each other; and a housing for housing the female terminal portions, and having a vertically extending insulation partition for horizontally separating the female terminal portions from each other. Each of the male terminal receiving portions has raised pressing contact portions which face each other at different levels, that is, at upper and lower positions in its longitudinal direction, the upper pressing contact portion being projected toward the insulation partition and having elasticity, respectively.
    Type: Grant
    Filed: November 20, 1997
    Date of Patent: March 16, 1999
    Assignee: Yazaki Corporation
    Inventors: Goro Nakamura, Kenji Muramatsu, Naoki Matsuoka
  • Patent number: 5880666
    Abstract: A fuse 15 includes a housing 2 of an insulative resin having a lid 13 and a housing body 11, and a fuse body 1 having a melting portion formed between a pair of press-connecting terminals 4 and 5 arranged in a staggered manner, the fuse body being received in the housing 2. A sheathed wire is press-connected to and retained by the press-connecting terminals 4 and 5 of the fuse body 1, a portion of the sheathed wire, mounted between the press-connecting terminals 4 and 5, being cut, to thereby provide a fuse which has a simple construction, and can be easily mounted at an existing circuit, and also to provide a method of mounting such a fuse.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: March 9, 1999
    Assignee: Yazaki Corporation
    Inventors: Naoki Matsuoka, Kenji Muramatsu
  • Patent number: 5878025
    Abstract: A plurality of switching modules arrayed in a plurality of columns and in at least one row switch over paths in accordance with path data contained in cells to transfer inputted data to a target line on the cell-unit. One or more path switching units are provided between two adjacent columns of switching modules among plural columns of switching modules and switch paths between the respective switching modules, disposed in a side-by-side relationship in a row direction, of one column of switching modules of the two adjacent columns of switching modules and the respective switching modules, disposed in the side-by-side relationship in the row direction, of the other column of the two adjacent columns of switching modules.
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: March 2, 1999
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Tomonaga, Naoki Matsuoka, Masaaki Kawai, Masafumi Katoh, Yoshimi Watanabe, Hidenao Nakajima
  • Patent number: 5818320
    Abstract: A fuse having a pair of blade-type male terminals inserted into one opening of a fuse housing, which is made of synthetic resin, having a through hole. An element portion of the fuse is removably inserted into the other opening of the housing. The element portion includes a pair of leg portions fitted at their distal ends in element holding portions on the terminals. A fusible portion interconnecting proximal ends of the leg portions and one end of a connecting portion extending in a direction opposite to a direction of extending of the terminals. A heat-radiating plate portion is formed integrally on the other end of the connecting portion, and is covered with a cover. The cover is exposed exteriorly of the housing when the element portion is inserted into the housing.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: October 6, 1998
    Assignee: Yazaki Corporation
    Inventor: Naoki Matsuoka
  • Patent number: 5748067
    Abstract: There is provided a fusing portion constituted by a high-melting point fusible metal element for coupling a pair of box-type terminals in the form of a link, and a low-melting point fusible metal element disposed at a substantially center portion of the high-melting point fusible metal element and containing a reducing element.
    Type: Grant
    Filed: December 19, 1996
    Date of Patent: May 5, 1998
    Assignee: Yazaki Corporation
    Inventors: Takashi Ishii, Naoki Matsuoka
  • Patent number: 5696759
    Abstract: A switching equipment accommodates lines and includes a line interface for processing data from the line on the unit of cell. The line interface has a basic processing unit and an additional processing unit. The basic processing unit performs a basic process on the cell. The additional processing unit separated from the basic processing unit but disconnectably connected to the basic processing unit executes an additional process on the cell. The additional processing unit includes a plurality of processing blocks for effecting a plurality of additional processes on the cells. Each processing block is individually disconnectably connected to the basic processing unit. The basic processing unit includes a selecting portion for selecting, when one or more processing blocks within the additional processing unit are connected, the connected processing blocks and performing the additional process on the cell.
    Type: Grant
    Filed: November 6, 1995
    Date of Patent: December 9, 1997
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Tomonaga, Naoki Matsuoka, Masaaki Kawai
  • Patent number: 5680089
    Abstract: A fuse in which molten metal can be positively held or retained in a housing when a fuse element melts, and the melting of the fuse element can be easily confirmed. The fuse includes the fuse element including opposite side portions respectively defining a pair of metal terminals which are connected together through an element having a fusible portion, and are disposed in a generally common plane, and a flap of a metal material which is bendable at the boundary between the flap and the element, an insulating member being formed on at least one face of the flap; and a housing including opposite side portions respectively defining a pair of terminal receiving portions for respectively receiving the pair of terminals, and a central portion defining an element receiving portion for receiving the element, the element receiving portion having an open portion at its upper side. When the flap is bent, that face of the flap having the insulating member formed thereon is exposed to the exterior.
    Type: Grant
    Filed: October 18, 1996
    Date of Patent: October 21, 1997
    Assignee: Yazaki Corporation
    Inventor: Naoki Matsuoka
  • Patent number: 5610913
    Abstract: Switching equipment in provided for performing a switching process of a fixed length cell consisting of data and a cell header. A line interface provided in the switching equipment accommodates a plurality of lines and, at the same time, processes the data from each line on a cell unit. The line interface includes individual units and a common unit. The individual units are individually connected to the plurality of lines accommodated therein and individually process the cells. The common unit is connected to the individual units and, at the same time, effects batch-processing of the cells processed by the individual units.
    Type: Grant
    Filed: March 8, 1995
    Date of Patent: March 11, 1997
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Tomonaga, Naoki Matsuoka, Miwako Watanabe, Satoshi Kuroyanagi, Yutaka Ezaki, Akira Hakata, Ryuichi Takechi, Masaaki Kawai