Patents by Inventor Naoki Nakagawa

Naoki Nakagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130082964
    Abstract: A touch screen includes a base substrate, a bundle of rectangular wirings in a column direction including a plurality of detection column wirings that are electrically connected in common, and a bundle of rectangular wirings in a row direction including a plurality of detection row wirings that are electrically connected in common, the bundle of wirings being formed on the base substrate. Also, a plurality of block areas obtained by dividing an intersection area in which the bundle of wirings in the column direction and the bundle of wirings in the row direction intersect in a plan view are defined, and only the detection column wiring or only the detection row wiring is provided in each of the block areas.
    Type: Application
    Filed: October 2, 2012
    Publication date: April 4, 2013
    Inventors: Masafumi AGARI, Naoki Nakagawa, Takeshi Ono, Seiichiro Mori, Takashi Miyayama, Takuji Imamura, Tatsuya Nakamura
  • Patent number: 8405091
    Abstract: A display device includes a metal conductive layer formed on a substrate, a transparent electrode film formed on the substrate and joined to the metal conductive layer and an interlayer insulating film isolating the metal conductive layer and the transparent conductive film. The metal conductive layer has a lower aluminum layer made of aluminum or aluminum alloy, an intermediate impurity containing layer made of aluminum or aluminum alloy containing impurities and formed on a substantially entire upper surface of the lower aluminum layer and an upper aluminum layer made of aluminum or aluminum alloy and formed on the intermediate impurity containing layer. In the interlayer insulating film and the upper aluminum layer, a contact hole penetrates therethrough and locally exposes the intermediate impurity containing layer, and the transparent electrode film is joined to the metal conductive layer in the intermediate impurity containing layer exposed from the contact hole.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: March 26, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takumi Nakahata, Kazunori Inoue, Koji Oda, Naoki Nakagawa, Nobuaki Ishiga
  • Patent number: 8390598
    Abstract: A detection column wiring includes a set of a first metal wiring having a zigzag pattern and a second metal wiring having a structure axisymmetric with the first metal wiring about a column direction. The first metal wiring includes first sloped portions obliquely sloped by an inclination angle of 45° with respect to the column direction, and first parallel portions parallel with the column direction and continuous with the first sloped portions; the first sloped portions and the first parallel portions being repeatedly placed in a zigzag shape along the column direction. Each detection row wiring has the same structure. A sloped portion of the first sloped portions of the first metal wiring is always orthogonally and spatially intersected, at its middle point, with a sloped portion of the second sloped portions of the third metal wiring at its middle point. Other portions have the same orthogonal relationship.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: March 5, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masafumi Agari, Takeshi Ono, Naoki Nakagawa, Isao Nojiri, Hiroyuki Murai, Takahiro Nishioka
  • Publication number: 20120293457
    Abstract: A detection column wiring includes a set of a first metal wiring having a zigzag pattern and a second metal wiring having a structure axisymmetric with the first metal wiring about a column direction. The first metal wiring includes first sloped portions obliquely sloped by an inclination angle of 45° with respect to the column direction, and first parallel portions parallel with the column direction and continuous with the first sloped portions; the first sloped portions and the first parallel portions being repeatedly placed in a zigzag shape along the column direction. Each detection row wiring has the same structure. A sloped portion of the first sloped portions of the first metal wiring is always orthogonally and spatially intersected, at its middle point, with a sloped portion of the second sloped portions of the third metal wiring at its middle point. Other portions have the same orthogonal relationship.
    Type: Application
    Filed: July 17, 2012
    Publication date: November 22, 2012
    Applicant: Mitsubishi Electric Corporation
    Inventors: Masafumi Agari, Takeshi Ono, Naoki Nakagawa, Isao Nojiri, Hiroyuki Murai, Takahiro Nishioka
  • Patent number: 8272116
    Abstract: A method for fixing a boot includes mounting a tubular anchoring areas, defined in opposite ends of a resinous boot, on an outer periphery of a counterpart member, and applying a clamping force to boot bands mounted around respective outer peripheries of the tubular anchoring areas to thereby fix the tubular anchoring areas to the outer periphery of the counterpart member. Coils are disposed around respective outer peripheries of the boot bands to generate an induction current in the boot bands. In this way, a reactive force of the magnetic field is generated between the coils and the boot bands to plastically deform the boot bands and reduce their diameters, whereby the tubular anchoring areas are fixed to the outer periphery of the counterpart member.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: September 25, 2012
    Assignee: NTN Corporation
    Inventor: Naoki Nakagawa
  • Patent number: 8269908
    Abstract: A method of manufacturing a thin-film transistor according to an embodiment of the present invention includes the step of forming a gate insulator on a gate electrode. The gate insulator includes at least a first region being in contact with a hydrogenated amorphous silicon film, and a second region positioned below the first region. The first and second regions are deposited using a source gas including NH3, N2, and SiH4, and H2 gas or a mixture of H2 and He. The first region is deposited by setting the flow-rate ratio NH3/SiH4 in a range from 11 to 14 and the second region is deposited by setting the flow-rate ratio NH3/SiH4 to be equal to or less than 4. It is thus possible to provide a thin-film transistor having excellent characteristics and high reliability, a method of manufacturing the same, and a display device including the thin-film transistor mounted thereon.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: September 18, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Koji Oda, Naoki Nakagawa, Takeshi Ono, Yusuke Uchida
  • Patent number: 8269744
    Abstract: Each detection column wiring is constituted by a set of a first metal wiring having a zigzag pattern and a second metal wiring having a structure axisymmetric with the first metal wiring about a column direction as an axis, wherein the first metal wiring is constituted by first sloped portions which are obliquely sloped by an inclination angle of 45 degrees with respect to the column direction, and first parallel portions which are parallel with the column direction and are continuous with the first sloped portions, such that the first sloped portions and the first parallel portions are repeatedly placed in a zigzag shape along the column direction. Each detection row wiring also has the same structure. A sloped portion out of the first sloped portions of the first metal wiring is always orthogonally and spatially intersected, at its middle point, with a sloped portion out of the second sloped portions of the third metal wiring at its middle point.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: September 18, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masafumi Agari, Takeshi Ono, Naoki Nakagawa, Isao Nojiri, Hiroyuki Murai, Takahiro Nishioka
  • Patent number: 8259086
    Abstract: A touch panel capable of calculating touch position coordinates of an indicator with high accuracy in a desired detection time even if a large number of detection wire groups are provided. An oscillator circuit selects one of detection wires and selected by a circuit or the like according to a command from a detection control circuit and oscillates. A circuit counts an output signal from the oscillator circuit up to a first count value. A circuit measures a period of the count. A circuit determines that there is a touch when it detects the detection wire of which the measured period is equal to or higher than a threshold value and sends the detection wire giving a maximum value equal to or higher than the threshold value to a circuit as a touch detection wire.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: September 4, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masafumi Agari, Naoki Nakagawa, Seiichiro Mori, Hiroyuki Murai
  • Publication number: 20120112194
    Abstract: It is an object to provide a technique to improve electric characteristics after a high-temperature treatment even when a high melting point metal barrier layer is not formed. A semiconductor device includes a gate electrode formed on a transparent insulation substrate, a semiconductor layer having a Si semiconductor active film and an ohmic low resistance Si film having an n-type conductivity, being formed in this order on the gate electrode with a gate insulation film interposed between the gate electrode and the semiconductor layer, and the source and drain electrodes directly connected to the semiconductor layer and containing at least aluminum (Al). At least nitrogen (N) is contained in a first region that is in the vicinity of an interface between a side surface of the SI semiconductor active film and the source and drain electrodes.
    Type: Application
    Filed: September 14, 2011
    Publication date: May 10, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takeshi Ono, Naoki Nakagawa, Yusuke Yamagata, Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Naoki Tsumura, Toru Takeguchi
  • Patent number: 8159749
    Abstract: An antireflection coating is formed on a transparent substrate and includes an Al film having a transmittance of lower than 10% at a wavelength of 550 nm with a thickness of 25 nm and predominantly composed of aluminum (Al), and an Al—N film formed in at least one of an upper layer and a lower layer of the Al film, having a transmittance of equal to or higher than 10% at a wavelength of 550 nm with a thickness of 25 nm, predominantly composed of Al and at least containing a nitrogen (N) element as an additive. A specific resistance of the antireflection coating is equal to or lower than 1.0×10?2 O·cm, and a reflectance of a surface of the Al—N film is equal to or lower than 50% in a visible light region.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: April 17, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunori Inoue, Naoki Tsumura, Nobuaki Ishiga, Takeshi Ono, Naoki Nakagawa, Masafumi Agari, Yusuke Yamagata, Kensuke Nagayama
  • Publication number: 20120020056
    Abstract: A display device where concentration of a stress in a display panel is suppressed, to allow improvement in display quality, reliability and the like. A display device includes a display panel, an adhesive layer and a supporting substrate. The adhesive layer is provided on the display panel. The supporting substrate is made up of a member previously provided with curved surfaces. The display panel is bonded onto the curved surface of the supporting substrate by the adhesive layer. The supporting substrate supports the display panel in a curved form along the curved surface.
    Type: Application
    Filed: April 23, 2010
    Publication date: January 26, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yusuke Yamagata, Naoki Nakagawa, Toshiaki Fujino, Takanori Okumura, Toshiyuki Yoneda, Toru Kokogawa, Kenji Arita
  • Patent number: 8080450
    Abstract: On a translucent substrate, an insulating film having a refractive index n and an amorphous silicon film are deposited successively. By irradiating the amorphous silicon film with a laser beam having a beam shape of a band shape extending along a length direction with a wavelength ?, a plurality of times from a side of amorphous silicon film facing the insulating film, while an irradiation position of the laser beam is shifted each of the plurality of times in a width direction of the band shape by a distance smaller than a width dimension of the band shape, a polycrystalline silicon film is formed from the amorphous silicon film. Forming the polycrystalline silicon film forms crystal grain boundaries which extend in the width direction and are disposed at a mean spacing measured along the length direction and ranging from (?/n)×0.95 to (?/n)×1.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: December 20, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuyuki Sugahara, Naoki Nakagawa, Shinsuke Yura, Toru Takeguchi, Tomoyuki Irizumi, Kazushi Yamayoshi, Atsuhiro Sono
  • Patent number: 8040476
    Abstract: The display device includes a pair of insulating substrates arranged so as to be opposed, a bonding layer, and a strain suppressing plate. The bonding layer is provided on the outer surface side of one insulating substrate. The strain suppressing plate has rigidity higher than that of the insulating substrate to suppress the strain caused by curving the insulating substrate. The strain suppressing plate is fixed to the insulating substrate by the bonding layer.
    Type: Grant
    Filed: May 26, 2009
    Date of Patent: October 18, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takumi Nakahata, Takanori Okumura, Yusuke Yamagata, Naoki Nakagawa, Masafumi Agari, Tetsuya Satake, Toru Kokogawa, Kenji Arita
  • Publication number: 20110198606
    Abstract: An exemplary aspect of the present invention is a thin film transistor including: a gate electrode formed on a substrate; a gate insulating film that includes a nitride film and covers the gate electrode; and a semiconductor layer that is disposed to be opposed to the gate electrode with the gate insulating film interposed therebetween, and has a microcrystalline semiconductor layer formed in at least an interface in contact with the nitride film, in which the microcrystalline semiconductor layer contains oxygen at a concentration higher than that of contained nitrogen in at least the vicinity of the interface with the nitride film, the nitrogen being diffused from the nitride film.
    Type: Application
    Filed: January 20, 2011
    Publication date: August 18, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Koji Oda, Tomoyuki Irizumi, Naoki Nakagawa, Takeshi Ono
  • Patent number: 7918649
    Abstract: A double-row self-aligning roller bearing includes left and right rows of rollers, arranged between an inner race and an outer race. A raceway surface of the outer race represents a spherical shape and the rollers have an outer peripheral surface following the shape of the raceway surface of the outer race. The rollers of the left and right roller rows have respective lengths different from each other. Also, the left and right roller rows have respective contact angles different from each other.
    Type: Grant
    Filed: November 16, 2004
    Date of Patent: April 5, 2011
    Assignee: NTN Corporation
    Inventors: Naoki Nakagawa, Masaharu Hori, Takeshi Maeda, Souichi Yagi, Mitsuo Sasabe, Nobuyuki Mori
  • Patent number: 7847295
    Abstract: A thin film transistor includes a gate electrode, a gate insulating film formed to cover the gate electrode, a semiconductor layer including a channel region formed over the gate electrode, a source electrode and a drain electrode including a region connected to the semiconductor layer, where at least a part of the region is overlapped with the gate electrode, an upper insulating film formed to cover the semiconductor layer, the source electrode and the drain electrode, where the upper insulating film is directly in contact with the channel region of the semiconductor layer and discharges moisture by a heat treatment and a second upper insulating film formed to cover the first protective film and suppress moisture out-diffusion.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: December 7, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hitoshi Nagata, Naoki Nakagawa
  • Publication number: 20100295256
    Abstract: Provided is a mounting structure for a boot for a constant velocity universal joint, which is capable of ensuring a stable sealing performance at low cost. The resin boot (1) for the constant velocity universal joint includes a smaller-diameter end portion (2) and a larger-diameter end portion (3), each of which has a cylindrical shape. The smaller-diameter end portion (2) of the boot (1) is fixed to a shaft (17) constituting an inner member, and the larger-diameter end portion (3) is fixed to an outer joint member (11) serving as an outer member. An inner peripheral surface of the smaller-diameter end portion (2) of the boot (1) is integrally bonded to an outer peripheral surface of a boot-mounting portion (18) of the shaft (17) in an abutting state due to a physical interaction between a resin constituting the boot (1) and a metal constituting the shaft (17).
    Type: Application
    Filed: January 8, 2009
    Publication date: November 25, 2010
    Inventors: Tatsuo Nakajima, Naoki Nakagawa, Seiji Katayama, Yousuke Kawahito
  • Patent number: 7834962
    Abstract: In a liquid crystal display (10) having a curved display surface, long sides of pixel structures (11) are arranged along the curve direction (Y) of the display surface and on a side of counter substrate provided is a black matrix having a black matrix opening (41a) whose length in the curve direction (Y) is not longer than E?L {(T1/2)+(T2/2)+d}/R, assuming that the length of the display surface in the curve direction (Y) is L, the thickness of an array substrate is T1, the thickness of the counter substrate is T2, the size of the gap between the array substrate and the counter substrate is d, the radius of curvature of the curved display surface is R and the length of a long side of a pixel electrode (29) provided in each of the pixel structures (11) is E. It thereby becomes possible to suppress display unevenness resulting from positional misalignment of the two substrates due to curvature and provide a liquid crystal display achieving a high-quality display image.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: November 16, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tetsuya Satake, Takumi Nakahata, Takanori Okumura, Yusuke Yamagata, Takeshi Ono, Naoki Nakagawa, Suguru Nagae
  • Publication number: 20100253647
    Abstract: A touch panel capable of calculating touch position coordinates of an indicator with high accuracy in a desired detection time even if a large number of detection wire groups are provided. An oscillator circuit selects one of detection wires selected by a circuit or the like according to a command from a detection control circuit and oscillates. A circuit counts an output signal from the oscillator circuit up to a first count value. A circuit measures a period of the count. A circuit determines that there is a touch when it detects the detection wire of which the measured period is equal to or higher than a threshold value and sends the detection wire giving a maximum value equal to or higher than the threshold value to a circuit as a touch detection wire.
    Type: Application
    Filed: November 10, 2008
    Publication date: October 7, 2010
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masafumi Agari, Naoki Nakagawa, Seiichiro Mori, Hiroyuki Murai
  • Patent number: D634425
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: March 15, 2011
    Assignee: Nipro Corporation
    Inventors: Kazuhiro Watanabe, Naoki Nakagawa, Yuki Hiraoka